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Title: Semiconductor structure and recess formation etch technique

Patent ·
OSTI ID:1343744
; ;

A semiconductor structure has a first layer that includes a first semiconductor material and a second layer that includes a second semiconductor material. The first semiconductor material is selectively etchable over the second semiconductor material using a first etching process. The first layer is disposed over the second layer. A recess is disposed at least in the first layer. Also described is a method of forming a semiconductor structure that includes a recess. The method includes etching a region in a first layer using a first etching process. The first layer includes a first semiconductor material. The first etching process stops at a second layer beneath the first layer. The second layer includes a second semiconductor material.

Research Organization:
Massachusetts Inst. of Technology (MIT), Cambridge, MA (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
AR0000123
Assignee:
Massachusetts Institute of Technology
Patent Number(s):
9,570,600
Application Number:
14/442,546
OSTI ID:
1343744
Resource Relation:
Patent File Date: 2013 Nov 15
Country of Publication:
United States
Language:
English

References (17)

Nitride-based transistors and methods of fabrication thereof using non-etched contact recesses patent January 2006
Nitride-based transistors with a protective layer and a low-damage recess and methods of fabrication thereof patent May 2006
Two stage plasma etching method for enhancement mode GaN HFET patent February 2012
Method of manufacturing high frequency device structure patent December 2012
Composite passivation process for nitride FET patent April 2013
Enhancement mode III-N HEMTs patent August 2013
Compound semiconductor device and method of manufacturing the same patent May 2016
Method of Group III Metal - Nitride Material Growth Using Metal Organic Vapor Phase Epitaxy patent-application October 2011
V-Gate GaN HEMTs With Engineered Buffer for Normally Off Operation journal November 2008
AlGaN/GaN HEMT With 300-GHz fmax journal March 2010
Enhancement-Mode GaN MIS-HEMTs With n-GaN/i-AlN/n-GaN Triple Cap Layer and High- k Gate Dielectrics journal March 2010
Digital etching of III-N materials using a two-step Ar/KOH technique journal April 2006
An Etch-Stop Barrier Structure for GaN High-Electron-Mobility Transistors journal March 2013
High-Performance Integrated Dual-Gate AlGaN/GaN Enhancement-Mode Transistor journal September 2010
Nitride-based high electron mobility transistors with a GaN spacer journal August 2006
Origin and passivation of fixed charge in atomic layer deposited aluminum oxide gate insulators on chemically treated InGaAs substrates journal April 2010
Fabrication of Normally Off AlGaN/GaN MOSFET Using a Self-Terminating Gate Recess Etching Technique journal July 2013

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