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Title: Silicon nanowire device and method for its manufacture

Patent ·
OSTI ID:1338051
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There is provided an electronic device and a method for its manufacture. The device comprises an elongate silicon nanowire less than 0.5 .mu.m in cross-sectional dimensions and having a hexagonal cross-sectional shape due to annealing-induced energy relaxation.

Research Organization:
Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
AC04-94AL85000
Assignee:
Sandia Corporation (Albuquerque, NM
Patent Number(s):
9,536,947
Application Number:
13/966,553
OSTI ID:
1338051
Resource Relation:
Patent File Date: 2013 Aug 14
Country of Publication:
United States
Language:
English

References (11)

Multiple orientation nanowires with gate stack stressors patent February 2013
Nanoscale wires and related devices patent-application May 2003
Insulated gate silicon nanowire transistor and method of manufacture patent-application November 2007
Field Effect Transistor Using Carbon Nanotube, Method Of Fabricating Same, And Sensor patent-application March 2009
Maskless Process for Suspending and Thinning Nanowires patent-application August 2010
Nanowire Fet Having Induced Radial Strain patent-application June 2011
Generation Of Multiple Diameter Nanowire Field Effect Transistors patent-application November 2011
Process for Forming a Surrounding Gate for a Nanowire Using a Sacrificial Patternable Dielectric patent-application January 2012
Nanowires, Nanowire Fielde-Effect Transistors And Fabrication Method patent-application June 2014
Radiation Response of a Gate-All-Around Silicon Nano-Wire Transistor journal December 2009
Gate-all-arround single-crystalline silicon nanowire optical sensor conference June 2011

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