Area-efficient physically unclonable function circuit architecture
Abstract
Generating a physically a physically unclonable function ("PUF") circuit value includes comparing each of first identification components in a first bank to each of second identification components in a second bank. A given first identification component in the first bank is not compared to another first identification component in the first bank and a given second identification component in the second bank is not compared to another second identification component in the second bank. A digital bit value is generated for each comparison made while comparing each of the first identification components to each of the second identification components. A PUF circuit value is generated from the digital bit values from each comparison made.
- Inventors:
- Publication Date:
- Research Org.:
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1178669
- Patent Number(s):
- 9,018,972
- Application Number:
- 13/906,628
- Assignee:
- Sandia Corporation (Albuquerque, NM)
- DOE Contract Number:
- AC04-94AL85000
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 2013 May 31
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 97 MATHEMATICS AND COMPUTING
Citation Formats
Gurrieri, Thomas, Hamlet, Jason, Bauer, Todd, Helinski, Ryan, and Pierson, Lyndon G. Area-efficient physically unclonable function circuit architecture. United States: N. p., 2015.
Web.
Gurrieri, Thomas, Hamlet, Jason, Bauer, Todd, Helinski, Ryan, & Pierson, Lyndon G. Area-efficient physically unclonable function circuit architecture. United States.
Gurrieri, Thomas, Hamlet, Jason, Bauer, Todd, Helinski, Ryan, and Pierson, Lyndon G. 2015.
"Area-efficient physically unclonable function circuit architecture". United States. https://www.osti.gov/servlets/purl/1178669.
@article{osti_1178669,
title = {Area-efficient physically unclonable function circuit architecture},
author = {Gurrieri, Thomas and Hamlet, Jason and Bauer, Todd and Helinski, Ryan and Pierson, Lyndon G},
abstractNote = {Generating a physically a physically unclonable function ("PUF") circuit value includes comparing each of first identification components in a first bank to each of second identification components in a second bank. A given first identification component in the first bank is not compared to another first identification component in the first bank and a given second identification component in the second bank is not compared to another second identification component in the second bank. A digital bit value is generated for each comparison made while comparing each of the first identification components to each of the second identification components. A PUF circuit value is generated from the digital bit values from each comparison made.},
doi = {},
url = {https://www.osti.gov/biblio/1178669},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Apr 28 00:00:00 EDT 2015},
month = {Tue Apr 28 00:00:00 EDT 2015}
}
Works referenced in this record:
A Digital 1.6 pJ/bit Chip Identification Circuit Using Process Variations
journal, January 2008
- Su, Ying; Holleman, Jeremy; Otis, Brian P.
- IEEE Journal of Solid-State Circuits, Vol. 43, Issue 1
A technique to build a secret key in integrated circuits for identification and authentication applications
conference, January 2004
- Lee, J. W.; Gassend, B.
- 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525)
Energy Scalable Universal Hashing
journal, December 2005
- Kaps, J.; Yuksel, K.; Sunar, B.
- IEEE Transactions on Computers, Vol. 54, Issue 12
Extended abstract: The butterfly PUF protecting IP on every FPGA
conference, June 2008
- Kumar, Sandeep S.; Guajardo, Jorge; Maes, Roel
- 2008 IEEE International Workshop on Hardware-Oriented Security and Trust (HOST)
Fuzzy Extractors: How to Generate Strong Keys from Biometrics and Other Noisy Data
journal, January 2008
- Dodis, Yevgeniy; Ostrovsky, Rafail; Reyzin, Leonid
- SIAM Journal on Computing, Vol. 38, Issue 1
LFSR-based Hashing and Authentication
conference, January 1994
- Krawczyk, Hugo; Desmedt, Yvo G.
- Advances in Cryptology — CRYPTO ’94, p. 129-139
Physical unclonable functions for device authentication and secret key generation
conference, January 2007
- Suh, G. Edward; Devadas, Srinivas
- Proceedings of the 44th annual conference on Design automation - DAC '07
Physical Unclonable Functions and Public-Key Crypto for FPGA IP Protection
conference, August 2007
- Guajardo, Jorge; Kumar, Sandeep S.; Schrijen, Geert-Jan
- 2007 International Conference on Field Programmable Logic and Applications
Silicon physical random functions
conference, January 2002
- Gassend, Blaise; Clarke, Dwaine; van Dijk, Marten
- Proceedings of the 9th ACM conference on Computer and communications security - CCS '02
A physical unclonable function defined using power distribution system equivalent resistance variations
conference, January 2009
- Helinski, Ryan; Acharyya, Dhruva; Plusquellic, Jim
- Proceedings of the 46th Annual Design Automation Conference on ZZZ - DAC '09
IC identification circuit using device mismatch
conference, January 2000
- Lofstrom, K.; Daasch, W. R.; Taylor, D.
- 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056)
Quality metric evaluation of a physical unclonable function derived from an IC's power distribution system
conference, January 2010
- Helinski, Ryan; Acharyya, Dhruva; Plusquellic, Jim
- Proceedings of the 47th Design Automation Conference on - DAC '10
An artificial fingerprint device (AFD): a study of identification number applications utilizing characteristics variation of polycrystalline silicon TFTs
journal, June 2003
- Maeda, S.; Kuriyama, H.; Ipposhi, T.
- IEEE Transactions on Electron Devices, Vol. 50, Issue 6
Comb Capacitor Structures for On-Chip Physical Uncloneable Function
journal, February 2009
- Roy, Deepu; Klootwijk, Johan H.; Verhaegh, Nynke A. M.
- IEEE Transactions on Semiconductor Manufacturing, Vol. 22, Issue 1
LISA: Maximizing RO PUF's secret extraction
conference, June 2010
- Yin, Chi-En; Qu, Gang
- 2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2010), 2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST)
Circuit having increased noise immunity and capable of generating a reference voltage or terminating a transmission line
patent, October 2002
- Desroches, Alan R.
- US Patent Document 6,472,927
Data processing systems and methods with enhanced bios functionality
patent, May 2008
- Calhoon, Sean; Carr, J. Scott; Rodriguez, Tony F.
- US Patent Document 7,370,190
Self-timed thermally-aware circuits and methods of use thereof
patent, August 2008
- Fang, David; Akopyan, Filipp A.; Manohar, Rajit
- US Patent Document 7,411,436
Volatile device keys and applications thereof
patent, July 2009
- Devadas, Srinivas; Ziola, Thomas J.
- US Patent Document 7,564,345
System and method of reliable forward secret key sharing with physical random functions
patent, January 2010
- Van Dijk, Marten
- US Patent Document 7,653,197
Reliable generation of a device-specific value
patent, March 2010
- Devadas, Srinivas; Gassend, Blaise
- US Patent Document 7,681,103
Securely field configurable device
patent, April 2010
- Devadas, Srinivas; Ziola, Thomas J.
- US Patent Document 7,702,927
Integrated circuit that uses a dynamic characteristic of the circuit
patent, July 2010
- Devadas, Srinivas; Gassend, Blaise
- US Patent Document 7,757,083
Data protection and cryptographic functions using a device-specific value
patent, October 2010
- Devadas, Srinivas; Gassend, Blaise
- US Patent Document 7,818,569
Volatile device keys and applications thereof
patent, November 2010
- Devadas, Srinivas; Ziola, Thomas J.
- US Patent Document 7,839,278
Authentication of integrated circuits
patent, November 2010
- Clarke, Dwaine; Gassend, Blaise; Dijk, Marten Van
- US Patent Document 7,840,803
Reception comparator for signal modulation upon a supply line
patent, April 2011
- Walker, Thomas; Ng, Herman Jalli
- US Patent Document 7,919,994
Method and system for authentication of a physical object
patent, October 2011
- Tuyls, Pim Theo; Denteneer, Theodorus Jacobus Johannes; Linnartz, Johan Paul Marie Gerard
- US Patent Document 8,032,760
Hardware device to physical structure binding and authentication
patent, August 2013
- Hamlet, Jason; Stein, David J.; Bauer, Todd
- US Patent Document 8,516,269
Physically unclonable function implemented through threshold voltage comparison
patent, December 2013
- Ficke, Joel T.; Hall, William E.; Hook, Terence B.
- US Patent Document 8,619,979
Authentication with physical unclonable functions
patent, July 2014
- Ziola, Thomas J.; Paral, Zdenek; Devadas, Srinivas
- US Patent Document 8,782,396
Deterrence of device counterfeiting, cloning, and subversion by substitution using hardware fingerprinting
patent, September 2014
- Hamlet, Jason; Bauer, Todd; Pierson, Lyndon G.
- US Patent Document 8,848,905
Method for protecting information carrier comprising an integrated circuit
patent-application, February 2007
- Kahlman, Josephus Arnoldus Henricus Maria; Akkermans, Antonius Hermanus Maria
- US Patent Application 10/576393; 20070038871
Controlling Access to Device-Specific Information
patent-application, August 2007
- Devadas, Srinvas; Gassend, Blaise; Clarke, Dwaine
- US Patent Application 11/421609; 20070183194
Sharing a secret by using random function
patent-application, March 2008
- Van Dijk, Marten Erik
- US Patent Application 11/575313; 20080059809
Authentication with Physical Unclonable Functions
patent-application, March 2009
- Ziola, Thomas; Paral, Zdenek; Devadas, Srinivas
- US Patent Application 12/234095; 20090083833
Integrated Circuit and Method for Preventing an Unauthorized Access to a Digital Value
patent-application, April 2010
- Luzzi, Raimondo; Bucci, Marco
- US Patent Application 12/244209; 20100085075
Physically Unclonable Function Implemented Through Threshold Voltage Comparison
patent-application, December 2011
- Ficke, Joel T.; Hall, William E.; Hook, Terence B.
- US Patent Application 12/823278; 20110317829
Works referencing / citing this record:
Area-efficient physically unclonable function circuit architecture
patent, April 2015
- Gurrieri, Thomas M.; Hamlet, Jason; Bauer, Todd
- US Patent Document 9,018,972