Calorimeter Preamplifier Hybrid Circuit Test Jig
There are two ways in which the testing may be initiated, remotely or locally. If the remote operation is desired, an external TTL level signal must be provided to the test jig with the remotellocal switch on the side of the test jig switched to remote. A logic high will initiate the test. A logic low will terminate the test. In the event that an external signal is connected to the test jig while local operation occurs, the local control takes precedence over remote control. Once a DVT has been locked in the ZIF socket and the DIP switches are selected, the Push-to-Test button may be depressed. Momentarily depressing the button will initiate a test with a minimum 400 ms duration. At the same time a PBCLOCK and PBLATCH pulses will be initiated and the power rails +12V, +8V, and -6V will be ramped to full voltage. The time at which the power rails reach the full voltage is about 13 ms and it is synchronized with bypass capacitors placed on COMP input of U20 and U22 and on the output of U23 voltage regulators. The voltage rails are supplied to a {+-}10% window comparator. A red LED indicates the rail is below or above 10% of the design value. A green LED indicates the rail is within acceptable limits. For DDT with a 5 pF and 10 pF feed back capacitor, the +12V and +8V rails are current-regulated to 19rnA and 22 rnA respectively and the -6V rail is short-circuit protected within the regulator. For DUT with a 22 pF feed back capacitor the current regulation is the same as above except that the +8V rail is current regulated to 43 rnA. The power rails are supplied to the DUT via a 10 {Omega} resistor. The voltage drop across this resistor is sensed by a differential amplifier AD620 and amplified by a gain of 10. An external BNC connection is provided from this point to allow for current measurements by the vendor. The current value for each rail is calculated by measuring the voltage value at this point and divided by (10*10{Omega}). The next stage inverts and amplifies the voltage signal by a factor of 5 for + 12V and -6V rails and by a factor of 1 for +8V rail. For DUT with 22 pF feed back capacitor the amplification factors are same as above except that the amplification factor for +8V rail is a gain of 2. An offset null potentiometer is provided between the AD620 and the inverting stage which eliminates device offset current errors. The inverted and amplified voltage is presented to two window comparators. One of them compares the inverted and amplified voltage to the low threshold point and the other one compares the inverted and amplified voltage to the high threshold point. If the inverted and amplified voltage is within the low and high threshold points, both the low and the high current LEDs illuminate green indicating the current is within acceptable limits. If the inverted and amplified voltage is below the low threshold point or above the high threshold point, the low current LED or the high current LED illuminates red, respectively, indicating the current is outside acceptable limits.
- Research Organization:
- Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States)
- Sponsoring Organization:
- USDOE Office of Science (SC)
- DOE Contract Number:
- AC02-07CH11359
- OSTI ID:
- 1032094
- Report Number(s):
- FERMILAB-D0-EN-512; TRN: US1200461
- Country of Publication:
- United States
- Language:
- English
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