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  1. Data parallelism

    Data locality is fundamental to performance on distributed memory parallel architectures. Application programmers know this well and go to great pains to arrange data for optimal performance. Data Parallelism, a model from the Single Instruction Multiple Data (SIMD) architecture, is finding a new home on the Multiple Instruction Multiple Data (MIMD) architectures. This style of programming, distinguished by taking the computation to the data, is what programmers have been doing by hand for a long time. Recent work in this area holds the promise of making the programmer's task easier.
  2. Data parallelism

    Data locality is fundamental to performance on distributed memory parallel architectures. Application programmers know this well and go to great pains to arrange data for optimal performance. Data Parallelism, a model from the Single Instruction Multiple Data (SIMD) architecture, is finding a new home on the Multiple Instruction Multiple Data (MIMD) architectures. This style of programming, distinguished by taking the computation to the data, is what programmers have been doing by hand for a long time. Recent work in this area holds the promise of making the programmer`s task easier.
  3. Data parallel programming

    Parallel programming today can be a tedious and error prone activity. Specifically, with recent massively parallel systems, the coding investment in managing data layout and communication can easily exceed that required to describe the algorithm. The resulting algorithm is married to the data layout so tightly that changes in one require changes in the other. Optimizing the program involves careful handling of fragile algorithmic code which is dependent on the layout. The data parallel model with data distribution directives separates the algorithm from the data layout specification. The programmer can thus modify one with no effect on the other. Themore » model holds the promise of reducing the code cost of well turned applications in addition to greatly increasing the portability among vendors supporting the impending industry standard. This paper briefly describes the model being worked on and provides some preliminary performance estimates on the BBN TC2000.« less
  4. Data parallel programming

    Parallel programming today can be a tedious and error prone activity. Specifically, with recent massively parallel systems, the coding investment in managing data layout and communication can easily exceed that required to describe the algorithm. The resulting algorithm is married to the data layout so tightly that changes in one require changes in the other. Optimizing the program involves careful handling of fragile algorithmic code which is dependent on the layout. The data parallel model with data distribution directives separates the algorithm from the data layout specification. The programmer can thus modify one with no effect on the other. Themore » model holds the promise of reducing the code cost of well turned applications in addition to greatly increasing the portability among vendors supporting the impending industry standard. This paper briefly describes the model being worked on and provides some preliminary performance estimates on the BBN TC2000.« less
  5. PDDP: Data-driven parallelism and shared memory

    The Parallel Data Distribution Preprocessor, PDDP, exploits the cycle time of local shared memory blocks to achieve efficient data parallelization on a MIMD distributed shared memory machine. Shared memory arrays are distributed among the processors. PDDP treats a subset of Fortran D primitives and provides semi-automatic parallelization when Fortran 90 array syntax is used.
  6. PDDP: Data-driven parallelism and shared memory

    The Parallel Data Distribution Preprocessor, PDDP, exploits the cycle time of local shared memory blocks to achieve efficient data parallelization on a MIMD distributed shared memory machine. Shared memory arrays are distributed among the processors. PDDP treats a subset of Fortran D primitives and provides semi-automatic parallelization when Fortran 90 array syntax is used.
  7. Gang scheduling a parallel machine

    Program development on parallel machines can be a nightmare of scheduling headaches. We have developed a portable time sharing mechanism to handle the problem of scheduling gangs of processes. User programs and their gangs of processes are put to sleep and awakened by the gang scheduler to provide a time sharing environment. Time quantum are adjusted according to priority queues and a system of fair share accounting. The initial platform for this software is the 128 processor BBN TC2000 in use in the Massively Parallel Computing Initiative at the Lawrence Livermore National Laboratory.
  8. Gang scheduling a parallel machine. Revision 1

    Program development on parallel machines can be a nightmare of scheduling headaches. We have developed a portable time sharing mechanism to handle the problem of scheduling gangs of processes. User programs and their gangs of processes are put to sleep and awakened by the gang scheduler to provide a time sharing environment. Time quantum are adjusted according to priority queues and a system of fair share accounting. The initial platform for this software is the 128 processor BBN TC2000 in use in the Massively Parallel Computing Initiative at the Lawrence Livermore National Laboratory.
  9. Gang scheduling a parallel machine

    Program development on parallel machines can be a nightmare of scheduling headaches. We have developed a portable time sharing mechanism to handle the problem of scheduling gangs of processors. User program and their gangs of processors are put to sleep and awakened by the gang scheduler to provide a time sharing environment. Time quantums are adjusted according to priority queues and a system of fair share accounting. The initial platform for this software is the 128 processor BBN TC2000 in use in the Massively Parallel Computing Initiative at the Lawrence Livermore National Laboratory. 2 refs., 1 fig.
  10. The PCP/PFP programming models on the BBN TC2000

    We describe the PCP/PFP programming models which we are using on the BBN TC2000. The parallel programming models are implemented in a portable manner and will be useful on the scalable shared memory machines we expect to see in the future. We then describe the TC2000 machine architecture which is a scalable general purpose parallel architecture capable of efficiently supporting both shared memory and message passing programming paradigms. We also briefly describe a PCP implementation of the Gauss elimination algorithm which exploits the large local memories on the TC2000.
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"Gorda, B.C."

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