I/O control system using buffer full/empty and zero words signals to control DMA read/write commands
|
patent
|
June 1990 |
Network communications adapter with dual interleaved memory banks servicing multiple processors
|
patent
|
June 1990 |
Congestion free packet network
|
patent
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September 1991 |
Bulk-synchronous parallel computer
|
patent
|
January 1992 |
Memory management system and method for network controller
|
patent
|
August 1992 |
Arrangement of DMA, interrupt and timer functions to implement symmetrical processing in a multiprocessor computer system
|
patent
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July 1995 |
Inter-processor communication system in which messages are stored at locations specified by the sender
|
patent
|
September 1995 |
Message passing system for distributed shared memory multiprocessor system and message passing method using the same
|
patent
|
April 1997 |
Expedited message transfer in a multi-nodal data processing system
|
patent
|
May 1997 |
Static routing system
|
patent
|
October 1997 |
Apparatus and method for packetizing and segmenting MPEG packets
|
patent
|
November 1997 |
Barrier and eureka synchronization architecture for multiprocessors
|
patent
|
February 1998 |
Multimedia communication apparatus and methods
|
patent
|
May 1998 |
Parallel process scheduling method in a parallel computer and a processing apparatus for a parallel computer
|
patent
|
July 1998 |
Message-passing multiprocessor system
|
patent
|
August 1998 |
System and method for transmission rate control in a segmentation and reassembly (SAR) circuit under ATM protocol
|
patent
|
August 1998 |
Parallel I/O network file server architecture
|
patent
|
September 1998 |
Parallel computer system with communications network for selecting computer nodes for barrier synchronization
|
patent
|
July 1999 |
Computer system data I/O by reference among I/O devices and multiple memory units
|
patent
|
September 1999 |
Independent simultaneous queueing of message descriptors
|
patent
|
October 1999 |
Signaling communication events in a computer network
|
patent
|
May 2000 |
Multi-tasking adapter for parallel network applications
|
patent
|
June 2000 |
Seralized race-free virtual barrier network
|
patent
|
July 2000 |
I/O protocol for highly configurable multi-node processing system
|
patent
|
August 2000 |
System for providing transaction indivisibility in a transaction processing system upon recovery from a host processor failure by monitoring source message sequencing
|
patent
|
December 2000 |
System for parsing a packet for conformity with a predetermined protocol using mask and comparison values included in a parsing instruction
|
patent
|
March 2002 |
Method and apparatus for write-back caching with minimal interrupts
|
patent
|
March 2004 |
Method and apparatus for improving bus efficiency given an array of frames to transmit
|
patent
|
May 2004 |
Mechanism for completing messages in memory
|
patent
|
June 2004 |
System and method for efficient data transfer management
|
patent
|
June 2004 |
Methods, system and article of manufacture for pre-fetching descriptors
|
patent
|
February 2005 |
Method and apparatus for discarding data packets through the use of descriptors
|
patent
|
December 2005 |
Descriptor-based load balancing
|
patent
|
December 2005 |
Apparatus and method for programmable memory access slot assignment
|
patent
|
April 2006 |
Apparatus and method for responding to a interruption of a packet flow to a high level data link controller in a signal processing system
|
patent
|
May 2006 |
Mechanisms for efficient message passing with copy avoidance in a distributed system using advanced network devices
|
patent
|
August 2006 |
Buffer management technique for a hypertransport data path protocol
|
patent
|
September 2006 |
Protocol agnostic web listener
|
patent
|
October 2006 |
Tables with direct memory access descriptor lists for distributed direct memory access
|
patent
|
December 2006 |
Chaining direct memory access data transfer operations for compute nodes in a parallel computer
|
patent
|
September 2010 |
Low latency, high bandwidth data communications between compute nodes in a parallel computer
|
patent
|
November 2010 |
Message communications of particular message types between compute nodes using DMA shadow buffers
|
patent
|
November 2010 |
Direct memory access transfer completion notification
|
patent
|
February 2011 |
Systems for distributing data over a computer network and methods for arranging nodes for distribution of data over a computer network
|
patent
|
July 2012 |
DMA controller and method for checking address of data to be transferred with DMA
|
patent-application
|
December 2003 |
Controlling flow of data between data processing systems via a memory
|
patent-application
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March 2004 |
Efficient implementation of a multidimensional fast fourier transform on a distributed-memory parallel multi-node computer
|
patent-application
|
April 2004 |
Method and apparatus for implementing packet work area accesses and buffer sharing
|
patent-application
|
November 2004 |
Direct memory access using memory descriptor list
A
|
patent-application
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February 2005 |
Exponential channelized timer
|
patent-application
|
April 2005 |
System and method for high performance message passing
|
patent-application
|
April 2005 |
Method for performing DMA transfers with dynamic descriptor structure
|
patent-application
|
May 2005 |
Lightweight input/output protocol
|
patent-application
|
September 2005 |
Hardware filtering support for denial-of-service attacks
|
patent-application
|
September 2005 |
Failover mechanisms in RDMA operations
|
patent-application
|
March 2006 |
Early interrupt notification in RDMA and in DMA operations
|
patent-application
|
March 2006 |
RDMA server (OSI) global TCE tables
|
patent-application
|
March 2006 |
Interface internet protocol fragmentation of large broadcast packets in an environment with an unaccommodating maximum transfer unit
|
patent-application
|
March 2006 |
Remote direct memory access system and method
|
patent-application
|
April 2006 |
Memory-controller-embedded apparatus and procedure for achieving system-directed checkpointing without operating-system kernel support
|
patent-application
|
July 2006 |
Host buffer queues
|
patent-application
|
July 2006 |
Concurrency technique for shared objects
|
patent-application
|
July 2006 |
Data transfer system and data transfer method
|
patent-application
|
August 2006 |
DMA engine for protocol processing
|
patent-application
|
September 2006 |
Method and system for configuring a timer
|
patent-application
|
September 2006 |
Apparatus and method for packet transmission over a high speed network supporting remote direct memory access operations
|
patent-application
|
October 2006 |
Virtualization for device sharing
|
patent-application
|
November 2006 |
Third party node initiated remote direct memory access
|
patent-application
|
February 2007 |
Apparatus and method for stateless CRC calculation
|
patent-application
|
July 2007 |
Executing an Allgather Operation with an Alltoallv Operation in a Parallel Computer
|
patent-application
|
January 2008 |
Packet transferring/transmitting method and mobile communication system
|
patent-application
|
May 2008 |
RDMA systems and methods for sending commands from a source node to a target node for local execution of commands at the target node
|
patent-application
|
May 2008 |
Data Flow Control Within and Between DMA Channels
|
patent-application
|
September 2008 |
Signaling Completion of a Message Transfer from an Origin Compute Node to a Target Compute Node
|
patent-application
|
November 2008 |
Ultrascalable Petaflop Parallel Supercomputer
|
patent-application
|
January 2009 |
Low Latency, High Bandwidth Data Communications Between Compute Nodes in a Parallel Computer
|
patent-application
|
January 2009 |
Repeating Direct Memory Access Data Transfer Operations for Compute Nodes in a Parallel Computer
|
patent-application
|
January 2009 |
Self-Pacing Direct Memory Access Data Transfer Operations for Compute Nodes in a Parallel Computer
|
patent-application
|
January 2009 |
Third Party, Broadcast, Multicast and Conditional RDMA Operations
|
patent-application
|
May 2009 |
External Memory Controller Node
|
patent-application
|
November 2009 |
Increasing Available FIFO Space to Prevent Messaging Queue Deadlocks in a DMA Environment
|
patent-application
|
April 2010 |
Scalable Interface for Connecting Multiple Computer Systems Which Performs Parallel MPI Header Matching
|
patent-application
|
September 2010 |
The Blue Gene/L Supercomputer: A Hardware and Software Story
|
journal
|
May 2007 |
An analysis of NIC resource usage for offloading MPI
|
conference
|
January 2004 |
The impact of MPI queue usage on message latency
|
conference
|
January 2004 |
A Hardware Acceleration Unit for MPI Queue Processing
|
conference
|
January 2005 |
A network on chip architecture and design methodology
|
conference
|
January 2002 |