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Title: A novel FPGA-based bunch purity monitor system at the APS storage ring.

Conference ·

Bunch purity is an important source quality factor for the magnetic resonance experiments at the Advanced Photon Source. Conventional bunch-purity monitors utilizing time-to-amplitude converters are subject to dead time. We present a novel design based on a single field- programmable gate array (FPGA) that continuously processes pulses at the full speed of the detector and front-end electronics. The FPGA provides 7778 single-channel analyzers (six per rf bucket). The starting time and width of each single-channel analyzer window can be set to a resolution of 178 ps. A detector pulse arriving inside the window of a single-channel analyzer is recorded in an associated 32-bit counter. The analyzer makes no contribution to the system dead time. Two channels for each rf bucket count pulses originating from the electrons in the bucket. The other four channels on the early and late side of the bucket provide estimates of the background. A single-chip microcontroller attached to the FPGA acts as an EPICS IOC to make the information in the FPGA available to the EPICS clients.

Research Organization:
Argonne National Lab. (ANL), Argonne, IL (United States)
Sponsoring Organization:
USDOE Office of Science (SC)
DOE Contract Number:
DE-AC02-06CH11357
OSTI ID:
972594
Report Number(s):
ANL/AES/CP-59567; TRN: US1001639
Resource Relation:
Conference: Particle Accelerator Conference (PAC07); Jun. 25, 2007 - Jun. 29, 2007; Albuquerque, NM
Country of Publication:
United States
Language:
ENGLISH