The chip-scale atomic clock : prototype evaluation.
Abstract
The authors have developed a chip-scale atomic clock (CSAC) for applications requiring atomic timing accuracy in portable battery-powered applications. At PTTI/FCS 2005, they reported on the demonstration of a prototype CSAC, with an overall size of 10 cm{sup 3}, power consumption > 150 mW, and short-term stability sy(t) < 1 x 10-9t-1/2. Since that report, they have completed the development of the CSAC, including provision for autonomous lock acquisition and a calibrated output at 10.0 MHz, in addition to modifications to the physics package and system architecture to improve performance and manufacturability.
- Authors:
-
- Charles Stark Draper Laboratory, Cambridge, MA
- Symmetricom - Technology Realization Center, Beverly, MA
- Publication Date:
- Research Org.:
- Sandia National Laboratories (SNL), Albuquerque, NM, and Livermore, CA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 946267
- Report Number(s):
- SAND2007-7800C
TRN: US200903%%277
- DOE Contract Number:
- AC04-94AL85000
- Resource Type:
- Conference
- Resource Relation:
- Conference: Proposed for presentation at the Precise Time and Time Interval (PTTI) 2007 Meeting held November 26-29, 2007 in Long Beach, CA.
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 47 OTHER INSTRUMENTATION; ATOMIC CLOCKS; MINIATURIZATION; PERFORMANCE; DESIGN
Citation Formats
Mescher, Mark, Varghese, Mathew, Lutwak, Robert, Serkland, Darwin Keith, Tepolt, Gary, Geib, Kent Martin, Leblanc, John, Peake, Gregory Merwin, and Rashid, Ahmed. The chip-scale atomic clock : prototype evaluation.. United States: N. p., 2007.
Web.
Mescher, Mark, Varghese, Mathew, Lutwak, Robert, Serkland, Darwin Keith, Tepolt, Gary, Geib, Kent Martin, Leblanc, John, Peake, Gregory Merwin, & Rashid, Ahmed. The chip-scale atomic clock : prototype evaluation.. United States.
Mescher, Mark, Varghese, Mathew, Lutwak, Robert, Serkland, Darwin Keith, Tepolt, Gary, Geib, Kent Martin, Leblanc, John, Peake, Gregory Merwin, and Rashid, Ahmed. 2007.
"The chip-scale atomic clock : prototype evaluation.". United States.
@article{osti_946267,
title = {The chip-scale atomic clock : prototype evaluation.},
author = {Mescher, Mark and Varghese, Mathew and Lutwak, Robert and Serkland, Darwin Keith and Tepolt, Gary and Geib, Kent Martin and Leblanc, John and Peake, Gregory Merwin and Rashid, Ahmed},
abstractNote = {The authors have developed a chip-scale atomic clock (CSAC) for applications requiring atomic timing accuracy in portable battery-powered applications. At PTTI/FCS 2005, they reported on the demonstration of a prototype CSAC, with an overall size of 10 cm{sup 3}, power consumption > 150 mW, and short-term stability sy(t) < 1 x 10-9t-1/2. Since that report, they have completed the development of the CSAC, including provision for autonomous lock acquisition and a calibrated output at 10.0 MHz, in addition to modifications to the physics package and system architecture to improve performance and manufacturability.},
doi = {},
url = {https://www.osti.gov/biblio/946267},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Sat Dec 01 00:00:00 EST 2007},
month = {Sat Dec 01 00:00:00 EST 2007}
}
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