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Title: Effect of low and high temperature anneal on process-induced damage of gate oxide

Journal Article · · IEEE Electron Device Letters (Institute of Electrical and Electronics Engineers); (United States)
DOI:https://doi.org/10.1109/55.334672· OSTI ID:6655318
;  [1]
  1. Univ. of California, Berkeley, CA (United States). Dept. of Electrical Engineering and Computer Sciences

The authors have investigated the ability of high and low temperature anneals to repair the gate oxide damage due to simulated electrical stress caused by wafer charging resulting from plasma etching, etc. Even 800 C anneal cannot restore the stability in interface trap generation. Even 900 C anneal cannot repair the deteriorated charge-to-breakdown and oxide charge trapping. As a small consolation, the ineffectiveness of anneal in repairing the process-induced damage allows them to monitor the damages even at the end of the fabrication process.

OSTI ID:
6655318
Journal Information:
IEEE Electron Device Letters (Institute of Electrical and Electronics Engineers); (United States), Vol. 15:11; ISSN 0741-3106
Country of Publication:
United States
Language:
English

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