Design of a 2*2 fault-tolerant switching element
Conference
·
OSTI ID:5000172
The architecture of a 2*2 fault-tolerant switching element which can be used to modularly construct interconnection networks for multiprocessing and local computer networking is described. The switching element uses distributed control and circuit switching. Its good gate-to-pin ratio can facilitate VLSI implementation. 18 references.
- OSTI ID:
- 5000172
- Resource Relation:
- Conference: Sponsored by IEEE, Austin, TX, USA, 26 Apr 1982
- Country of Publication:
- United States
- Language:
- English
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