Effect of Si interface surface roughness to the tunneling current of the Si/Si{sub 1-x}Ge{sub x}/Si heterojunction bipolar transistor
Journal Article
·
· AIP Conference Proceedings
- Department of Physics Education, Universitas Pendidikan Indonesia, Jl. Setiabudhi 229 Bandung 40154 (Indonesia)
- Department Kimia, Universitas Pendidikan Indonesia, Jl. Setiabudhi 229 Bandung 40154 (Indonesia)
- Graduate School of Advanced Sciences of Matter, Hiroshima University, Higashi-Hiroshima 739-8527 (Japan)
- Physics of Electronic Materials Research Division, Institut Teknologi Bandung, Bandung 40132 (Indonesia)
In this work we discuss the surface roughness of Si interface impact to the tunneling current of the Si/Si{sub 1-x}Ge{sub x}/Si heterojunction bipolar transistor. The Si interface surface roughness can be analyzed from electrical characteristics through the transversal electron velocity obtained as fitting parameter factor. The results showed that surface roughness increase as Ge content of virtual substrate increase This model can be used to investigate the effect of Ge content of the virtual substrate to the interface surface condition through current-voltage characteristic.
- OSTI ID:
- 22494577
- Journal Information:
- AIP Conference Proceedings, Vol. 1708, Issue 1; Conference: MSCEIS 2015: International seminar on mathematics, science, and computer science education, Bandung (Indonesia), 17 Oct 2015; Other Information: (c) 2016 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA); ISSN 0094-243X
- Country of Publication:
- United States
- Language:
- English
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