Correlation between stress-induced leakage current and dielectric degradation in ultra-porous SiOCH low-k materials
Abstract
Stress-Induced Leakage Current (SILC) behavior during the dielectric degradation of ultra-porous SiOCH low-k materials was investigated. Under high voltage stress, SILC increases to a critical value before final hard breakdown. This SILC increase rate is mainly driven by the injected charges and is negligibly influenced by temperature and voltage. SILC is found to be transient and shows a t{sup −1} relaxation behavior, where t is the storage time at low voltages. This t{sup −1} transient behavior, described by the tunneling front model, is caused by both electron charging of neutral defects in the dielectric close to the cathode interface and discharging of donor defects close to the anode interface. These defects have a uniform density distribution within the probed depth range, which is confirmed by the observed flat band voltage shift results collected during the low voltage storage. By applying an additional discharging step after the low voltage storage, the trap energies and spatial distributions are derived. In a highly degraded low-k dielectric, the majority of defects have a trap depth between 3.4 eV and 3.6 eV and a density level of 1 × 10{sup 18 }eV{sup −1 }cm{sup −3}. The relation between the defect density N and the total amount of the injected charges Qmore »
- Authors:
-
- imec, Kapeldreef 75, 3001 Leuven (Belgium)
- Publication Date:
- OSTI Identifier:
- 22492853
- Resource Type:
- Journal Article
- Journal Name:
- Journal of Applied Physics
- Additional Journal Information:
- Journal Volume: 118; Journal Issue: 16; Other Information: (c) 2015 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA); Journal ID: ISSN 0021-8979
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSICS; ANODES; CATHODES; DEPTH; DIELECTRIC MATERIALS; ELECTRIC POTENTIAL; INTERFACES; LEAKAGE CURRENT; POROUS MATERIALS; RELAXATION; SPATIAL DISTRIBUTION; STRESSES; TRANSIENTS; TRAPS; TUNNEL EFFECT
Citation Formats
Wu, C., E-mail: Chen.Wu@imec.be, De Wolf, I., Department of Materials Engineering, KU Leuven, 3000 Leuven, Li, Y., Leśniewska, A., Varela Pedreira, O., Marneffe, J.-F. de, Ciofi, I., Verdonck, P., Baklanov, M. R., Bömmels, J., Tőkei, Zs., and Croes, K. Correlation between stress-induced leakage current and dielectric degradation in ultra-porous SiOCH low-k materials. United States: N. p., 2015.
Web. doi:10.1063/1.4934520.
Wu, C., E-mail: Chen.Wu@imec.be, De Wolf, I., Department of Materials Engineering, KU Leuven, 3000 Leuven, Li, Y., Leśniewska, A., Varela Pedreira, O., Marneffe, J.-F. de, Ciofi, I., Verdonck, P., Baklanov, M. R., Bömmels, J., Tőkei, Zs., & Croes, K. Correlation between stress-induced leakage current and dielectric degradation in ultra-porous SiOCH low-k materials. United States. https://doi.org/10.1063/1.4934520
Wu, C., E-mail: Chen.Wu@imec.be, De Wolf, I., Department of Materials Engineering, KU Leuven, 3000 Leuven, Li, Y., Leśniewska, A., Varela Pedreira, O., Marneffe, J.-F. de, Ciofi, I., Verdonck, P., Baklanov, M. R., Bömmels, J., Tőkei, Zs., and Croes, K. 2015.
"Correlation between stress-induced leakage current and dielectric degradation in ultra-porous SiOCH low-k materials". United States. https://doi.org/10.1063/1.4934520.
@article{osti_22492853,
title = {Correlation between stress-induced leakage current and dielectric degradation in ultra-porous SiOCH low-k materials},
author = {Wu, C., E-mail: Chen.Wu@imec.be and De Wolf, I. and Department of Materials Engineering, KU Leuven, 3000 Leuven and Li, Y. and Leśniewska, A. and Varela Pedreira, O. and Marneffe, J.-F. de and Ciofi, I. and Verdonck, P. and Baklanov, M. R. and Bömmels, J. and Tőkei, Zs. and Croes, K.},
abstractNote = {Stress-Induced Leakage Current (SILC) behavior during the dielectric degradation of ultra-porous SiOCH low-k materials was investigated. Under high voltage stress, SILC increases to a critical value before final hard breakdown. This SILC increase rate is mainly driven by the injected charges and is negligibly influenced by temperature and voltage. SILC is found to be transient and shows a t{sup −1} relaxation behavior, where t is the storage time at low voltages. This t{sup −1} transient behavior, described by the tunneling front model, is caused by both electron charging of neutral defects in the dielectric close to the cathode interface and discharging of donor defects close to the anode interface. These defects have a uniform density distribution within the probed depth range, which is confirmed by the observed flat band voltage shift results collected during the low voltage storage. By applying an additional discharging step after the low voltage storage, the trap energies and spatial distributions are derived. In a highly degraded low-k dielectric, the majority of defects have a trap depth between 3.4 eV and 3.6 eV and a density level of 1 × 10{sup 18 }eV{sup −1 }cm{sup −3}. The relation between the defect density N and the total amount of the injected charges Q is measured to be sub-linear, N ∼ Q{sup 0.45±0.07}. The physical nature of these stress-induced defects is suggested to be caused by the degradation of the Si-O based skeleton in the low-k dielectric.},
doi = {10.1063/1.4934520},
url = {https://www.osti.gov/biblio/22492853},
journal = {Journal of Applied Physics},
issn = {0021-8979},
number = 16,
volume = 118,
place = {United States},
year = {Wed Oct 28 00:00:00 EDT 2015},
month = {Wed Oct 28 00:00:00 EDT 2015}
}