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Title: Multilevel characteristics and memory mechanisms for nonvolatile memory devices based on CuInS{sub 2} quantum dot-polymethylmethacrylate nanocomposites

Nonvolatile memory devices based on CuInS{sub 2} (CIS) quantum dots (QDs) embedded in a polymethylmethacrylate (PMMA) layer were fabricated using spin-coating method. The memory window widths of the capacitance-voltage (C-V) curves for the Al/CIS QDs embedded in PMMA layer/p-Si devices were 0.3, 0.6, and 1.0 V for sweep voltages of ±3, ±5, and ±7 V, respectively. Capacitance-cycle data demonstrated that the charge-trapping capability of the devices with an ON/OFF ratio value of 2.81 × 10{sup −10} was maintained for 8 × 10{sup 3} cycles without significant degradation and that the extrapolation of the ON/OFF ratio value to 1 × 10{sup 6} cycles converged to 2.40 × 10{sup −10}, indicative of the good stability of the devices. The memory mechanisms for the devices are described on the basis of the C-V curves and the energy-band diagrams.
Authors:
; ;  [1] ;  [2]
  1. Department of Electronics and Computer Engineering, Hanyang University, Seoul 133-791 (Korea, Republic of)
  2. Department of Molecular Science and Technology, Ajou University, Suwon 443-749 (Korea, Republic of)
Publication Date:
OSTI Identifier:
22395501
Resource Type:
Journal Article
Resource Relation:
Journal Name: Applied Physics Letters; Journal Volume: 105; Journal Issue: 23; Other Information: (c) 2014 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA)
Country of Publication:
United States
Language:
English
Subject:
77 NANOSCIENCE AND NANOTECHNOLOGY; CAPACITANCE; COPPER SULFIDES; ELECTRIC POTENTIAL; ELECTRONIC STRUCTURE; EXTRAPOLATION; INDIUM SULFIDES; LAYERS; MEMORY DEVICES; NANOCOMPOSITES; PHASE STABILITY; PMMA; QUANTUM DOTS; SPIN-ON COATING; TRAPPING