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Title: Superior model for fault tolerance computation in designing nano-sized circuit systems

As CMOS technology scales nano-metrically, reliability turns out to be a decisive subject in the design methodology of nano-sized circuit systems. As a result, several computational approaches have been developed to compute and evaluate reliability of desired nano-electronic circuits. The process of computing reliability becomes very troublesome and time consuming as the computational complexity build ups with the desired circuit size. Therefore, being able to measure reliability instantly and superiorly is fast becoming necessary in designing modern logic integrated circuits. For this purpose, the paper firstly looks into the development of an automated reliability evaluation tool based on the generalization of Probabilistic Gate Model (PGM) and Boolean Difference-based Error Calculator (BDEC) models. The Matlab-based tool allows users to significantly speed-up the task of reliability analysis for very large number of nano-electronic circuits. Secondly, by using the developed automated tool, the paper explores into a comparative study involving reliability computation and evaluation by PGM and, BDEC models for different implementations of same functionality circuits. Based on the reliability analysis, BDEC gives exact and transparent reliability measures, but as the complexity of the same functionality circuits with respect to gate error increases, reliability measure by BDEC tends to be lower than themore » reliability measure by PGM. The lesser reliability measure by BDEC is well explained in this paper using distribution of different signal input patterns overtime for same functionality circuits. Simulation results conclude that the reliability measure by BDEC depends not only on faulty gates but it also depends on circuit topology, probability of input signals being one or zero and also probability of error on signal lines.« less
Authors:
;  [1] ;  [2]
  1. Fundamental and Applied Sciences Department, Universiti Teknologi PETRONAS, Bandar Seri Iskandar, Perak (Malaysia)
  2. Electrical and Electronics Engineering Department, Universiti Teknologi PETRONAS, Bandar Seri Iskandar, Perak (Malaysia)
Publication Date:
OSTI Identifier:
22308051
Resource Type:
Journal Article
Resource Relation:
Journal Name: AIP Conference Proceedings; Journal Volume: 1621; Journal Issue: 1; Conference: ICSAS 2014: 3. international conference on fundamental and applied sciences: Innovative research in applied sciences for a sustainable future, Kuala Lumpur (Malaysia), 3-5 Jun 2014; Other Information: (c) 2014 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA)
Country of Publication:
United States
Language:
English
Subject:
71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSICS; DESIGN; ERRORS; EVALUATION; INTEGRATED CIRCUITS; MATHEMATICAL MODELS; NANOSTRUCTURES; PROBABILISTIC ESTIMATION; PROBABILITY; RELIABILITY; SIGNALS; TOLERANCE