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Title: Valence and conduction band offsets at low-k a-SiO{sub x}C{sub y}:H/a-SiC{sub x}N{sub y}:H interfaces

In order to understand the fundamental electrical leakage and reliability failure mechanisms in nano-electronic low-k dielectric/metal interconnect structures, we have utilized x-ray photoelectron spectroscopy and reflection electron energy loss spectroscopy to determine the valence and conduction band offsets present at interfaces between non-porous and porous low-k a-SiO{sub x}C{sub y}:H interlayer dielectrics and a-SiC{sub x}N{sub y}:H metal capping layers. The valence band offset for such interfaces was determined to be 2.7±0.2 eV and weakly dependent on the a-SiOC:H porosity. The corresponding conduction band offset was determined to be 2.1±0.2 eV. The large band offsets indicate that intra metal layer leakage is likely dominated by defects and trap states in the a-SiOC:H and a-SiCN:H dielectrics.
Authors:
; ; ; ;  [1] ;  [2]
  1. Logic Technology Development, Intel Corporation, Hillsboro, Oregon 97124 (United States)
  2. Ocotillo Materials Laboratory, Intel Corporation, Chandler, Arizona 85248 (United States)
Publication Date:
OSTI Identifier:
22305995
Resource Type:
Journal Article
Resource Relation:
Journal Name: Journal of Applied Physics; Journal Volume: 116; Journal Issue: 11; Other Information: (c) 2014 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA)
Publisher:
American Institute of Physics (AIP)
Country of Publication:
United States
Language:
English
Subject:
75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY; DEFECTS; DIELECTRIC MATERIALS; ENERGY-LOSS SPECTROSCOPY; FAILURES; HYDROGENATION; INTERFACES; LAYERS; LEAKAGE CURRENT; METALS; NANOELECTRONICS; POROSITY; POROUS MATERIALS; REFLECTION; RELIABILITY; SILICON CARBIDES; SILICON OXIDES; TRAPS; VALENCE; X-RAY PHOTOELECTRON SPECTROSCOPY