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Title: Wafer-scale solution-derived molecular gate dielectrics for low-voltage graphene electronics

Graphene field-effect transistors are integrated with solution-processed multilayer hybrid organic-inorganic self-assembled nanodielectrics (SANDs). The resulting devices exhibit low-operating voltage (2 V), negligible hysteresis, current saturation with intrinsic gain >1.0 in vacuum (pressure < 2 × 10{sup −5} Torr), and overall improved performance compared to control devices on conventional SiO{sub 2} gate dielectrics. Statistical analysis of the field-effect mobility and residual carrier concentration demonstrate high spatial uniformity of the dielectric interfacial properties and graphene transistor characteristics over full 3 in. wafers. This work thus establishes SANDs as an effective platform for large-area, high-performance graphene electronics.
Authors:
; ; ; ;  [1] ;  [2] ;  [3] ; ;  [1] ;  [4]
  1. Department of Materials Science and Engineering, Northwestern University, Evanston, Illinois 60208 (United States)
  2. Department of Chemistry, Northwestern University, Evanston, Illinois 60208 (United States)
  3. Department of Electrical Engineering and Computer Science, Northwestern University, Evanston, Illinois 60208 (United States)
  4. (United States)
Publication Date:
OSTI Identifier:
22293111
Resource Type:
Journal Article
Resource Relation:
Journal Name: Applied Physics Letters; Journal Volume: 104; Journal Issue: 8; Other Information: (c) 2014 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA)
Country of Publication:
United States
Language:
English
Subject:
75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY; CARRIER MOBILITY; CARRIERS; CONCENTRATION RATIO; DIELECTRIC MATERIALS; ELECTRIC POTENTIAL; FIELD EFFECT TRANSISTORS; GAIN; GRAPHENE; HYSTERESIS; NANOSTRUCTURES; PERFORMANCE; SILICA