Effects of thermal annealing process on the electrical properties of p{sup +}-Si/n-SiC heterojunctions

Journal Article · Mon Apr 21 00:00:00 EDT 2014 · Applied Physics Letters

DOI:https://doi.org/10.1063/1.4873113· OSTI ID:22262564

Nishida, S.; Shigekawa, N. ^[1]; Arai, M. ^[2]

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1. Department of Electrical Engineering, Osaka City University, 3-3-138 Sugimoto, Sumiyoshi, Osaka 558-8585 (Japan)
2. New Japan Radio Co., Ltd., Fukuoka 2-1-1, Fujimino, Saitama 356-8510 (Japan)

The effects of thermal annealing process on the interface in p{sup +}-Si/n-SiC heterojunctions fabricated by using surface-activated bonding are investigated. It is found by measuring their current-voltage (I-V) characteristics that the reverse-bias current and the ideality factor decreased to 2.98 × 10{sup −6} mA/cm{sup 2} and 1.03, respectively, by annealing the junctions at 1000 °C. Observation by using transmission electron microscopy indicates that an amorphous layer with a thickness of ∼6 nm is formed at the unannealed interface, which vanishes after annealing at 1000 °C. No structural defects at the interface are observed even after annealing at such a high temperature.

• OSTI ID: 22262564
• Journal Information: Applied Physics Letters, Vol. 104, Issue 16; Other Information: (c) 2014 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA); ISSN 0003-6951
• Country of Publication: United States
• Language: English

Related Subjects

36 MATERIALS SCIENCE
ANNEALING
BONDING
ELECTRIC CONDUCTIVITY
HETEROJUNCTIONS
PHOSPHORUS IONS
SILICON CARBIDES
TRANSMISSION ELECTRON MICROSCOPY