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Title: System for processing an encrypted instruction stream in hardware

A system and method of processing an encrypted instruction stream in hardware is disclosed. Main memory stores the encrypted instruction stream and unencrypted data. A central processing unit (CPU) is operatively coupled to the main memory. A decryptor is operatively coupled to the main memory and located within the CPU. The decryptor decrypts the encrypted instruction stream upon receipt of an instruction fetch signal from a CPU core. Unencrypted data is passed through to the CPU core without decryption upon receipt of a data fetch signal.
Authors:
; ;
Publication Date:
OSTI Identifier:
1246889
Report Number(s):
9,311,493
13/954,487
DOE Contract Number:
AC05-76RL01830
Resource Type:
Patent
Resource Relation:
Patent File Date: 2013 Jul 30
Research Org:
Pacific Northwest National Laboratory (PNNL), Richland, WA (United States)
Sponsoring Org:
USDOE
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING; 99 GENERAL AND MISCELLANEOUS