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Title: AYUSH: A Technique for Extending Lifetime of SRAM-NVM Hybrid Caches

Recently, researchers have explored way-based hybrid SRAM-NVM (non-volatile memory) last level caches (LLCs) to bring the best of SRAM and NVM together. However, the limited write endurance of NVMs restricts the lifetime of these hybrid caches. We present AYUSH, a technique to enhance the lifetime of hybrid caches, which works by using data-migration to preferentially use SRAM for storing frequently-reused data. Microarchitectural simulations confirm that AYUSH achieves larger improvement in lifetime than a previous technique and also maintains performance and energy efficiency. For single, dual and quad-core workloads, the average increase in cache lifetime with AYUSH is 6.90X, 24.06X and 47.62X, respectively.
 [1] ;  [1]
  1. ORNL
Publication Date:
OSTI Identifier:
DOE Contract Number:
Resource Type:
Journal Article
Resource Relation:
Journal Name: IEEE Computer Architecture Letters
Research Org:
Oak Ridge National Laboratory (ORNL)
Sponsoring Org:
SC USDOE - Office of Science (SC)
Country of Publication:
United States
Non-volatile memory (NVM); hybrid cache; SRAM-NVM cache; device lifetime; write endurance; low power; sustainable computing