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Title: Constructing a logical, regular axis topology from an irregular topology

Abstract

Constructing a logical regular topology from an irregular topology including, for each axial dimension and recursively, for each compute node in a subcommunicator until returning to a first node: adding to a logical line of the axial dimension a neighbor specified in a nearest neighbor list; calling the added compute node; determining, by the called node, whether any neighbor in the node's nearest neighbor list is available to add to the logical line; if a neighbor in the called compute node's nearest neighbor list is available to add to the logical line, adding, by the called compute node to the logical line, any neighbor in the called compute node's nearest neighbor list for the axial dimension not already added to the logical line; and, if no neighbor in the called compute node's nearest neighbor list is available to add to the logical line, returning to the calling compute node.

Inventors:
Publication Date:
Research Org.:
International Business Machines Corp., Armonk, NY (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1149607
Patent Number(s):
8,788,649
Application Number:
13/742,453
Assignee:
International Business Machines Corporation (Armonk, NY)
DOE Contract Number:  
B554331
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Faraj, Daniel A. Constructing a logical, regular axis topology from an irregular topology. United States: N. p., 2014. Web.
Faraj, Daniel A. Constructing a logical, regular axis topology from an irregular topology. United States.
Faraj, Daniel A. 2014. "Constructing a logical, regular axis topology from an irregular topology". United States. https://www.osti.gov/servlets/purl/1149607.
@article{osti_1149607,
title = {Constructing a logical, regular axis topology from an irregular topology},
author = {Faraj, Daniel A.},
abstractNote = {Constructing a logical regular topology from an irregular topology including, for each axial dimension and recursively, for each compute node in a subcommunicator until returning to a first node: adding to a logical line of the axial dimension a neighbor specified in a nearest neighbor list; calling the added compute node; determining, by the called node, whether any neighbor in the node's nearest neighbor list is available to add to the logical line; if a neighbor in the called compute node's nearest neighbor list is available to add to the logical line, adding, by the called compute node to the logical line, any neighbor in the called compute node's nearest neighbor list for the axial dimension not already added to the logical line; and, if no neighbor in the called compute node's nearest neighbor list is available to add to the logical line, returning to the calling compute node.},
doi = {},
url = {https://www.osti.gov/biblio/1149607}, journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Jul 22 00:00:00 EDT 2014},
month = {Tue Jul 22 00:00:00 EDT 2014}
}

Works referenced in this record:

Virtual channel assignment in large torus systems
patent, August 2000


Storage array interconnection fabric using a torus topology
patent, April 2004


Blue Gene system software---Topology mapping for Blue Gene/L supercomputer
conference, January 2006


Topology Mapping for Blue Gene/L Supercomputer
conference, November 2006


Implementing the MPI Process Topology Mechanism
conference, January 2002