Direct access inter-process shared memory

Brightwell, Ronald B; Pedretti, Kevin; Hudson, Trammell B

Title: Direct access inter-process shared memory

Abstract

A technique for directly sharing physical memory between processes executing on processor cores is described. The technique includes loading a plurality of processes into the physical memory for execution on a corresponding plurality of processor cores sharing the physical memory. An address space is mapped to each of the processes by populating a first entry in a top level virtual address table for each of the processes. The address space of each of the processes is cross-mapped into each of the processes by populating one or more subsequent entries of the top level virtual address table with the first entry in the top level virtual address table from other processes.

Inventors:: Brightwell, Ronald B; Pedretti, Kevin; Hudson, Trammell B

Publication Date:: Tue Oct 22 00:00:00 EDT 2013

Research Org.:: Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1107593

Patent Number(s):: 8,566,536

Application Number:: 12/551,666

Assignee:: Sandia Corporation (Albuquerque, NM)

DOE Contract Number:: AC04-94AL850(X)

Resource Type:: Patent

Country of Publication:: United States

Language:: English

Subject:: 97 MATHEMATICS AND COMPUTING

Citation Formats


                    Brightwell, Ronald B, Pedretti, Kevin, and Hudson, Trammell B. Direct access inter-process shared memory.  United States: N. p., 2013. 
        Web.

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                    Brightwell, Ronald B, Pedretti, Kevin, & Hudson, Trammell B. Direct access inter-process shared memory.  United States.

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                    Brightwell, Ronald B, Pedretti, Kevin, and Hudson, Trammell B. 2013.  
        "Direct access inter-process shared memory".  United States.  https://www.osti.gov/servlets/purl/1107593.

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@article{osti_1107593,

  title        = {Direct access inter-process shared memory},

  author       = {Brightwell, Ronald B and Pedretti, Kevin and Hudson, Trammell B},

  abstractNote = {A technique for directly sharing physical memory between processes executing on processor cores is described. The technique includes loading a plurality of processes into the physical memory for execution on a corresponding plurality of processor cores sharing the physical memory. An address space is mapped to each of the processes by populating a first entry in a top level virtual address table for each of the processes. The address space of each of the processes is cross-mapped into each of the processes by populating one or more subsequent entries of the top level virtual address table with the first entry in the top level virtual address table from other processes.},

  doi          = {},

  url          = {https://www.osti.gov/biblio/1107593},
  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {Tue Oct 22 00:00:00 EDT 2013},

  month        = {Tue Oct 22 00:00:00 EDT 2013}

}

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Works referenced in this record:

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Buntinas, Darius; Mercier, Guillaume; Gropp, William
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Similar Records

Title: Direct access inter-process shared memory

Abstract

Citation Formats

Implementation and evaluation of shared-memory communication and synchronization operations in MPICH2 using the Nemesis communication subsystem journal, September 2007

An Ultrahigh Performance MPI Implementation on SGI® ccNUMA Altix® Systems journal, January 2006

Designing an Efficient Kernel-Level and User-Level Hybrid Approach for MPI Intra-Node Communication on Multi-Core Systems conference, September 2008

Method and system for collective file access using an mmap (memory-mapped file) patent, January 2010

Data Transfers between Processes in an SMP System: Performance Study and Application to MPI conference, January 2006

Cache-Efficient, Intranode, Large-Message MPI Communication with MPICH2-Nemesis conference, September 2009

Implementation and Shared-Memory Evaluation of MPICH2 over the Nemesis Communication Subsystem book, January 2006

LiMIC: Support for High-Performance MPI Intra-node Communication on Linux Cluster conference, June 2005

Fbufs: a high-bandwidth cross-domain transfer facility journal, December 1993

Implementation and evaluation of shared-memory communication and synchronization operations in MPICH2 using the Nemesis communication subsystem
journal, September 2007

An Ultrahigh Performance MPI Implementation on SGI® ccNUMA Altix® Systems
journal, January 2006

Designing an Efficient Kernel-Level and User-Level Hybrid Approach for MPI Intra-Node Communication on Multi-Core Systems
conference, September 2008

Method and system for collective file access using an mmap (memory-mapped file)
patent, January 2010

Data Transfers between Processes in an SMP System: Performance Study and Application to MPI
conference, January 2006

Cache-Efficient, Intranode, Large-Message MPI Communication with MPICH2-Nemesis
conference, September 2009

Implementation and Shared-Memory Evaluation of MPICH2 over the Nemesis Communication Subsystem
book, January 2006

LiMIC: Support for High-Performance MPI Intra-node Communication on Linux Cluster
conference, June 2005

Fbufs: a high-bandwidth cross-domain transfer facility
journal, December 1993