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Title: FPGA-based Klystron linearization implementations in scope of ILC

Abstract

We report the development and implementation of four FPGA-based predistortion-type klystron linearization algorithms. Klystron linearization is essential for the realization of ILC, since it is required to operate the klystrons 7% in power below their saturation. The work presented was performed in international collaborations at the Fermi National Accelerator Laboratory (FNAL), USA and the Deutsches Elektronen Synchrotron (DESY), Germany. With the newly developed algorithms, the generation of correction factors on the FPGA was improved compared to past algorithms, avoiding quantization and decreasing memory requirements. At FNAL, three algorithms were tested at the Advanced Superconducting Test Accelerator (ASTA), demonstrating a successful implementation for one algorithm and a proof of principle for two algorithms. Furthermore, the functionality of the algorithm implemented at DESY was demonstrated successfully in a simulation.

Authors:
 [1];  [2];  [2];  [2];  [2];  [3];  [3];  [4];  [4];  [5]
+ Show Author Affiliations
  1. The Graduate Univ. of Advanced Studies, Hayama (Japan)
  2. The Graduate Univ. of Advanced Studies/High Energy Accelerator Research Organization, Tsukuba (Japan)
  3. Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States)
  4. Deutsches Elektronen-Synchrotron (DESY), Hamburg (Germany)
  5. Lodz Univ. of Technology, Lodz (Poland)
Publication Date:
Research Org.:
Fermi National Accelerator Laboratory (FNAL), Batavia, IL (United States)
Sponsoring Org.:
USDOE Office of Science (SC), High Energy Physics (HEP)
OSTI Identifier:
1235037
Report Number(s):
FERMILAB-PUB-15-317-AD
Journal ID: ISSN 0168-9002
Grant/Contract Number:  
AC02-07CH11359
Resource Type:
Accepted Manuscript
Journal Name:
Nuclear Instruments and Methods in Physics Research. Section A, Accelerators, Spectrometers, Detectors and Associated Equipment
Additional Journal Information:
Journal Volume: 780; Journal Issue: C; Journal ID: ISSN 0168-9002
Publisher:
Elsevier
Country of Publication:
United States
Language:
English
Subject:
43 PARTICLE ACCELERATORS; accelerators; ILC; Klystron linearization; FPGA; Klystron-cavity simulator

Citation Formats

Omet, M., Michizono, S., Matsumoto, T., Miura, T., Qiu, F., Chase, B., Varghese, P., Schlarb, H., Branlard, J., and Cichalewski, W. FPGA-based Klystron linearization implementations in scope of ILC. United States: N. p., 2015. Web. doi:10.1016/j.nima.2015.01.056.
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Omet, M., Michizono, S., Matsumoto, T., Miura, T., Qiu, F., Chase, B., Varghese, P., Schlarb, H., Branlard, J., & Cichalewski, W. FPGA-based Klystron linearization implementations in scope of ILC. United States. https://doi.org/10.1016/j.nima.2015.01.056
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Omet, M., Michizono, S., Matsumoto, T., Miura, T., Qiu, F., Chase, B., Varghese, P., Schlarb, H., Branlard, J., and Cichalewski, W. Fri . "FPGA-based Klystron linearization implementations in scope of ILC". United States. https://doi.org/10.1016/j.nima.2015.01.056. https://www.osti.gov/servlets/purl/1235037.
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@article{osti_1235037,
title = {FPGA-based Klystron linearization implementations in scope of ILC},
author = {Omet, M. and Michizono, S. and Matsumoto, T. and Miura, T. and Qiu, F. and Chase, B. and Varghese, P. and Schlarb, H. and Branlard, J. and Cichalewski, W.},
abstractNote = {We report the development and implementation of four FPGA-based predistortion-type klystron linearization algorithms. Klystron linearization is essential for the realization of ILC, since it is required to operate the klystrons 7% in power below their saturation. The work presented was performed in international collaborations at the Fermi National Accelerator Laboratory (FNAL), USA and the Deutsches Elektronen Synchrotron (DESY), Germany. With the newly developed algorithms, the generation of correction factors on the FPGA was improved compared to past algorithms, avoiding quantization and decreasing memory requirements. At FNAL, three algorithms were tested at the Advanced Superconducting Test Accelerator (ASTA), demonstrating a successful implementation for one algorithm and a proof of principle for two algorithms. Furthermore, the functionality of the algorithm implemented at DESY was demonstrated successfully in a simulation.},
doi = {10.1016/j.nima.2015.01.056},
journal = {Nuclear Instruments and Methods in Physics Research. Section A, Accelerators, Spectrometers, Detectors and Associated Equipment},
number = C,
volume = 780,
place = {United States},
year = {Fri Jan 23 00:00:00 EST 2015},
month = {Fri Jan 23 00:00:00 EST 2015}
}
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Journal Article:
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Publisher's Version of Record
https://doi.org/10.1016/j.nima.2015.01.056
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Works referenced in this record:

FPGA-based implementation of a cavity field controller for FLASH and X-FEL
journal, July 2007

  • Fafara, Przemyslaw; Jalmuzna, Wojciech; Koprek, Waldemar
  • Measurement Science and Technology, Vol. 18, Issue 8
  • DOI: 10.1088/0957-0233/18/8/010

Development and test of klystron linearization packages for FPGA-based low level RF control systems of ILC-like electron accelerators
conference, May 2014

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    Works referencing / citing this record:

    Real-time cavity simulator-based low-level radio-frequency test bench and applications for accelerators
    journal, March 2018

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