A Sub-Electron-Noise Multi-Channel Cryogenic Skipper-CCD Readout ASIC
The MIDNA application specific integrated circuit (ASIC) is a skipper-CCD readout chip fabricated in a 65 nm LP-CMOS process that is capable of working at cryogenic temperatures. The chip integrates four front-end channels that process the skipper-CCD signal and performs differential averaging using a dual slope integration (DSI) circuit. Each readout channel contains a pre-amplifier, a DC restorer, and a dual-slope integrator with chopping capability. The integrator chopping is a key system design element in order to mitigate the effect of low-frequency noise produced by the integrator itself, and it is not often required with standard CCDs. Each channel consumes 4.5 mW of power, occupies 0.156 mm$${^2}$$ area and has an input referred noise of 2.7$${\mu\nu}_{rms}$$. It is demonstrated experimentally to achieve sub-electron noise when coupled with a skipper-CCD by means of averaging samples of each pixel. Here, sub-electron noise is shown in three different acquisition approaches. The signal range is 6000 electrons. The readout system achieves 0.2$${e^{-}}$$ RMS by averaging 1000 samples with MIDNA both at room temperature and at 180 Kelvin.
- Research Organization:
- Fermi National Accelerator Laboratory (FNAL), Batavia, IL (United States)
- Sponsoring Organization:
- USDOE Office of Science (SC), High Energy Physics (HEP)
- Grant/Contract Number:
- AC02-07CH11359
- OSTI ID:
- 1971811
- Report Number(s):
- FERMILAB-PUB-22-743-PPD-SCD; arXiv:2304.13088; oai:inspirehep.net:2654675; TRN: US2313731
- Journal Information:
- IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 70, Issue 6; ISSN 1549-8328
- Publisher:
- IEEECopyright Statement
- Country of Publication:
- United States
- Language:
- English
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