Ultra-low latency recurrent neural network inference on FPGAs for physics applications with hls4ml
Abstract Recurrent neural networks have been shown to be effective architectures for many tasks in high energy physics, and thus have been widely adopted. Their use in low-latency environments has, however, been limited as a result of the difficulties of implementing recurrent architectures on field-programmable gate arrays (FPGAs). In this paper we present an implementation of two types of recurrent neural network layers—long short-term memory and gated recurrent unit—within the hls4ml framework. We demonstrate that our implementation is capable of producing effective designs for both small and large models, and can be customized to meet specific design requirements for inference latencies and FPGA resources. We show the performance and synthesized designs for multiple neural networks, many of which are trained specifically for jet identification tasks at the CERN Large Hadron Collider.
- Research Organization:
- SLAC National Accelerator Laboratory (SLAC), Menlo Park, CA (United States)
- Sponsoring Organization:
- National Science Foundation (NSF); USDOE
- Grant/Contract Number:
- AC02-76SF00515; SC0021943
- OSTI ID:
- 1968930
- Journal Information:
- Machine Learning: Science and Technology, Journal Name: Machine Learning: Science and Technology Journal Issue: 2 Vol. 4; ISSN 2632-2153
- Publisher:
- IOP PublishingCopyright Statement
- Country of Publication:
- United Kingdom
- Language:
- English
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