Multiplexer System for the SPEAR3 Booster BPM Upgrade
- SLAC National Accelerator Lab., Menlo Park, CA (United States)
- SLAC National Accelerator Lab., Menlo Park, CA (United States); Sapienza Univ. di Roma, Rome (Italy)
BPM measurements in booster synchrotrons are often only critical during accelerator commissioning or when a problem occurs. As a result, many facilities do not make large investments in booster BPM signal processors; they either have very few BPMs and/or use older generation processors. The SPEAR3 booster BPM processor system, for instance, has operated since 1990 with commercial multiplexers to switch between BPM button signals into a single dated analog BPM processor that was developed at SLAC*. This system has reached its end-of-life so we are in the process of upgrading to modern multiplexers that feed a pair of turn-by-turn Libera SPARK-ERXR processors. This low-cost solution gives us the ability to arbitrarily multiplex between BPM signals during the energy ramp with modern BPM processors. The system can either measure 2 BPMs turn-by-turn in parallel during the entire energy ramp, or sequentially measure all BPMs (2 at a time) at different time slices within the ramp. Here we show measurements of the MiniCircuits switch we chose as well as our architecture for the upgrade.
- Research Organization:
- SLAC National Accelerator Laboratory (SLAC), Menlo Park, CA (United States)
- Sponsoring Organization:
- USDOE Office of Science (SC)
- Grant/Contract Number:
- AC02-76SF00515
- OSTI ID:
- 1820181
- Report Number(s):
- SLAC-PUB-17565; TRN: US2214228
- Journal Information:
- Proceedings of the International Beam Instrumentation Conference (IBIC), Vol. 2; Conference: 9th International Beam Instrumentation Conference (IBIC2020), Santos, Brazil, 14-18 Sept. 2020; ISSN 2673-5350
- Publisher:
- JACoW PublishingCopyright Statement
- Country of Publication:
- United States
- Language:
- English
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