Methodology of Low Inductance Busbar Design for Three-Level Converters
Three-level (3L) converters are more susceptible to parasitics compared with two-level converters because of their complicated structure with multiple switching loops. In this article, the methodology of busbar layout design for 3L converters based on the magnetic cancellation effect is presented. The methodology can fit for 3L converters with symmetric and asymmetric configurations. A detailed design example is provided for a high-power 3L-active neutral point clamped (ANPC) converter, which includes the module selection, busbar layout, and dc-link capacitor placement. The loop inductance of the busbar is verified with simulation, impedance measurements, and converter experiments. Furthermore, the results match with each other, and the inductances of short and long loops are 6.5 and 17.5 nH, respectively, which are significantly lower than the busbars of NPC-type converters in other references.
- Research Organization:
- Oak Ridge National Laboratory (ORNL), Oak Ridge, TN (United States)
- Sponsoring Organization:
- USDOE Office of Electricity Delivery and Energy Reliability (OE)
- Grant/Contract Number:
- AC05-00OR22725
- OSTI ID:
- 1817400
- Journal Information:
- IEEE Journal of Emerging and Selected Topics in Power Electronics, Journal Name: IEEE Journal of Emerging and Selected Topics in Power Electronics Journal Issue: 3 Vol. 9; ISSN 2168-6777
- Publisher:
- IEEECopyright Statement
- Country of Publication:
- United States
- Language:
- English
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