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Title: Gate field effects on the topological insulator BiSbTeSe2 interface

Journal Article · · Applied Physics Letters
DOI: https://doi.org/10.1063/1.5127065 · OSTI ID:1800058
ORCiD logo [1];  [2]; ORCiD logo [3];  [4]; ORCiD logo [5]; ORCiD logo [6]
  1. University of Florida (United States). Department of Physics; University of Florida (United States). Quantum Theory Project; OSTI
  2. Purdue University (United States). Department of Physics and Astronomy.
  3. University of Florida (United States). Department of Physics; University of Florida (United States). Quantum Theory Project
  4. Purdue University (United States). Department of Physics and Astronomy; Purdue University (United States). School of Electrical and Computer Engineering; Purdue University (United States). Birck Nanotechnology Center; Purdue University (United States). Purdue Quantum Science and Engineering Institute.
  5. University of Florida (United States). Department of Physics
  6. University of Florida (United States). Department of Physics; University of Florida (United States). Quantum Theory Project; University of Florida (United States). Center for Molecular Magnetic Quantum Materials

Interfaces between two topological insulators are of fundamental interest in condensed matter physics. Inspired by experimental efforts, we study interfacial processes between two slabs of BiSbTeSe2 (BSTS) via first principles calculations. Topological surface states are absent for the BSTS interface in its equilibrium separation, but our calculations show that they appear if the inter-slab distance is greater than 6 Å. More importantly, we find that topological interface states can be preserved by inserting two or more layers of hexagonal boron nitride between the two BSTS slabs. In experiments, the electric current tunneling through the interface is insensitive to back gate voltage when the bias voltage is small. Using a first-principles based method that allows us to simulate the gate field, we show that at low bias, the extra charge induced by a gate voltage resides on the surface that is closest to the gate electrode, leaving the interface almost undoped. This provides clues to understand the origin of the observed insensitivity of transport properties to back voltage at low bias. Our study resolves a few questions raised in experiment, which does not yet offer a clear correlation between microscopic physics and transport data. We provide a road map for the design of vertical tunneling junctions involving the interface between two topological insulators.

Research Organization:
Univ. of Florida, Gainesville, FL (United States)
Sponsoring Organization:
USDOE; USDOE Office of Science (SC)
Grant/Contract Number:
FG02-02ER45995
OSTI ID:
1800058
Journal Information:
Applied Physics Letters, Journal Name: Applied Physics Letters Journal Issue: 3 Vol. 116; ISSN 0003-6951
Publisher:
American Institute of Physics (AIP)Copyright Statement
Country of Publication:
United States
Language:
English

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