Tutorial on forming through-silicon vias

Burkett, Susan L.; Jordan, Matthew B.; Schmitt, Rebecca P.; Menk, Lyle A.; Hollowell, Andrew E.

doi:10.1116/6.0000026

Title: Tutorial on forming through-silicon vias

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Abstract

Through-silicon vias (TSVs) are a critical technology for three-dimensional integrated circuit technology. These through-substrate interconnects allow electronic devices to be stacked vertically for a broad range of applications and performance improvements such as increased bandwidth, reduced signal delay, improved power management, and smaller form-factors. There are many interdependent processing steps involved in the successful integration of TSVs. This article provides a tutorial style review of the following semiconductor fabrication process steps that are commonly used in forming TSVs: deep etching of silicon to form the via, thin film deposition to provide insulation, barrier, and seed layers, electroplating of copper for the conductive metal, and wafer thinning to reveal the TSVs. Recent work in copper electrochemical deposition is highlighted, analyzing the effect of accelerator and suppressor additives in the electrolyte to enable void-free bottom-up filling from a conformally lined seed metal.

Authors:

Burkett, Susan L. ^[1]; Jordan, Matthew B. ^[2]; Schmitt, Rebecca P. ^[3]; Menk, Lyle A. ^[3]; Hollowell, Andrew E. ^[2]

Univ. of Alabama, Tuscaloosa, AL (United States)
Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Univ. of New Mexico, Albuquerque, NM (United States)

Publication Date:: Tue Apr 14 00:00:00 EDT 2020

Research Org.:: Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

Sponsoring Org.:: USDOE National Nuclear Security Administration (NNSA); US Air Force Office of Scientific Research (AFOSR); National Science Foundation (NSF)

OSTI Identifier:: 1697991

Report Number(s):: SAND-2020-0908J
Journal ID: ISSN 0734-2101; 683167

Grant/Contract Number:: AC04-94AL85000; NA-0003525; FA8650-04-2-1619; CMMI-1234652

Resource Type:: Accepted Manuscript

Journal Name:: Journal of Vacuum Science and Technology A

Additional Journal Information:: Journal Volume: 38; Journal Issue: 3; Journal ID: ISSN 0734-2101

Publisher:: American Vacuum Society / AIP

Country of Publication:: United States

Language:: English

Subject:: 42 ENGINEERING; plasma processing; chemical vapor deposition; thin film deposition; integrated circuits; electronic devices; electrolytes; inductively coupled plasma; etching

Citation Formats


                    Burkett, Susan L., Jordan, Matthew B., Schmitt, Rebecca P., Menk, Lyle A., and Hollowell, Andrew E. Tutorial on forming through-silicon vias.  United States: N. p., 2020. 
Web.  doi:10.1116/6.0000026.

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                    Burkett, Susan L., Jordan, Matthew B., Schmitt, Rebecca P., Menk, Lyle A., & Hollowell, Andrew E. Tutorial on forming through-silicon vias.  United States.  https://doi.org/10.1116/6.0000026

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                    Burkett, Susan L., Jordan, Matthew B., Schmitt, Rebecca P., Menk, Lyle A., and Hollowell, Andrew E. Tue .  
"Tutorial on forming through-silicon vias".  United States.  https://doi.org/10.1116/6.0000026.  https://www.osti.gov/servlets/purl/1697991.

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@article{osti_1697991,

  title        = {Tutorial on forming through-silicon vias},

  author       = {Burkett, Susan L. and Jordan, Matthew B. and Schmitt, Rebecca P. and Menk, Lyle A. and Hollowell, Andrew E.},

  abstractNote = {Through-silicon vias (TSVs) are a critical technology for three-dimensional integrated circuit technology. These through-substrate interconnects allow electronic devices to be stacked vertically for a broad range of applications and performance improvements such as increased bandwidth, reduced signal delay, improved power management, and smaller form-factors. There are many interdependent processing steps involved in the successful integration of TSVs. This article provides a tutorial style review of the following semiconductor fabrication process steps that are commonly used in forming TSVs: deep etching of silicon to form the via, thin film deposition to provide insulation, barrier, and seed layers, electroplating of copper for the conductive metal, and wafer thinning to reveal the TSVs. Recent work in copper electrochemical deposition is highlighted, analyzing the effect of accelerator and suppressor additives in the electrolyte to enable void-free bottom-up filling from a conformally lined seed metal.},

  doi          = {10.1116/6.0000026},

  journal      = {Journal of Vacuum Science and Technology A},

  number       = 3,

  volume       = 38,

  place        = {United States},

  year         = {Tue Apr 14 00:00:00 EDT 2020},

  month        = {Tue Apr 14 00:00:00 EDT 2020}

}

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