Evaporated tellurium thin films for p-type field-effect transistors and circuits

Zhao, Chunsong; Tan, Chaoliang; Lien, Der-Hsien; Song, Xiaohui; Amani, Matin; Hettick, Mark; Nyein, Hnin Yin Yin; Yuan, Zhen; Li, Lu; Scott, Mary C.; Javey, Ali

doi:10.1038/s41565-019-0585-9

Title: Evaporated tellurium thin films for p-type field-effect transistors and circuits

Journal Article · 16 December 2019 · Nature Nanotechnology

DOI: https://doi.org/10.1038/s41565-019-0585-9 · OSTI ID:1639001

Zhao, Chunsong ^[1]; Tan, Chaoliang ^[2];

^[2]; Song, Xiaohui ^[3]; Amani, Matin ^[2]; Hettick, Mark ^[2]; Nyein, Hnin Yin Yin ^[1]; Yuan, Zhen ^[2]; Li, Lu ^[2]; Scott, Mary C. ^[3];

^[2]

Univ. of California, Berkeley, CA (United States). Dept. of Electrical Engineering and Computer Sciences and Dept. of Materials Science and Engineering; Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States). Materials Sciences Division
Univ. of California, Berkeley, CA (United States). Dept. of Electrical Engineering and Computer Sciences; Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States). Materials Sciences Division
Univ. of California, Berkeley, CA (United States). Dept. of Materials Science and Engineering; ; Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States). Molecular Foundry

There is an emerging need for semiconductors that can be processed at near ambient temperature with high mobility and device performance. Although multiple n-type options have been identified, the development of their p-type counterparts remains limited. In this paper, we report the realization of tellurium thin films through thermal evaporation at cryogenic temperatures for fabrication of high-performance wafer-scale p-type field-effect transistors. We achieve an effective hole mobility of ~35 cm²V^–1s^–1, on/off current ratio of ~10⁴ and subthreshold swing of 108 mV dec^–1 on an 8-nm-thick film. High-performance tellurium p-type field-effect transistors are fabricated on a wide range of substrates including glass and plastic, further demonstrating the broad applicability of this material. Significantly, three-dimensional circuits are demonstrated by integrating multi-layered transistors on a single chip using sequential lithography, deposition and lift-off processes. Finally, various functional logic gates and circuits are demonstrated.

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Research Organization:: Lawrence Berkeley National Laboratory (LBNL), Berkeley, CA (United States). Molecular Foundry

Sponsoring Organization:: USDOE Office of Science (SC), Basic Energy Sciences (BES). Materials Sciences & Engineering Division

Grant/Contract Number:: AC02-05CH11231

OSTI ID:: 1639001

Journal Information:: Nature Nanotechnology, Vol. 15, Issue 1; ISSN 1748-3387

Publisher:: Nature Publishing GroupCopyright Statement

Country of Publication:: United States

Language:: English

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Cited by: 133 works

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