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Title: Development of a High-Rate Front-End ASIC for X-Ray Spectroscopy and Diffraction Applications

Abstract

We developed a new front-end application-specific integrated circuit (ASIC) to upgrade the Maia X-ray microprobe. The ASIC instruments 32 configurable channels that perform either positive or negative charge amplification, pulse shaping, peak amplitude, and time extraction along with buffered analog storage. At a gain of 3.6 V/fC, 1-μs peaking time, and a temperature of 248 K, an electronic resolution of 13 and 10 e- rms was measured with and without a silicon drift detector (SDD) sensor, respectively. A spectral resolution of 170-eV full-width at half-maximum (FWHM) at 5.9 keV was obtained with an 55Fe source. The channel linearity was better than ± 1% with rate capabilities up to 40 kcps. The ASIC was fabricated in a commercial 250-nm process with a footprint of 6.3 mm × 3.9 mm and dissipates 167 mW of static power.

Authors:
ORCiD logo [1];  [2];  [3];  [1];  [1]; ORCiD logo [1];  [4];  [1];  [1]; ORCiD logo [3];  [3];  [1]; ORCiD logo [3];  [4];  [4];  [1]; ORCiD logo [2];  [3]
  1. Brookhaven National Lab. (BNL), Upton, NY (United States)
  2. Stony Brook Univ., NY (United States)
  3. Argonne National Lab. (ANL), Argonne, IL (United States)
  4. Brookhaven National Lab. (BNL), Upton, NY (United States). National Synchrotron Light Source II (NSLS-II)
Publication Date:
Research Org.:
Brookhaven National Lab. (BNL), Upton, NY (United States)
Sponsoring Org.:
USDOE Office of Science (SC), Basic Energy Sciences (BES)
OSTI Identifier:
1635480
Report Number(s):
BNL-216102-2020-JAAM
Journal ID: ISSN 0018-9499
Grant/Contract Number:  
SC0012704
Resource Type:
Accepted Manuscript
Journal Name:
IEEE Transactions on Nuclear Science
Additional Journal Information:
Journal Volume: 67; Journal Issue: 4; Journal ID: ISSN 0018-9499
Publisher:
IEEE
Country of Publication:
United States
Language:
English
Subject:
47 OTHER INSTRUMENTATION

Citation Formats

Vernon, Emerson, De Geronimo, Gianluigi, Baldwin, Jonathan, Chen, Wei, Fried, Jack, Giacomini, Gabriele, Kuczewski, Anthony, Kuczewski, John, Mead, Joe, Miceli, Antonino, Okasinski, John S., Pinelli, Don, Quaranta, Orlando, Rumaiz, Abdul K., Siddons, Peter, Smith, Graham, Stanacevic, Milutin, and Woods, Russell. Development of a High-Rate Front-End ASIC for X-Ray Spectroscopy and Diffraction Applications. United States: N. p., 2020. Web. doi:10.1109/TNS.2020.2976820.
Vernon, Emerson, De Geronimo, Gianluigi, Baldwin, Jonathan, Chen, Wei, Fried, Jack, Giacomini, Gabriele, Kuczewski, Anthony, Kuczewski, John, Mead, Joe, Miceli, Antonino, Okasinski, John S., Pinelli, Don, Quaranta, Orlando, Rumaiz, Abdul K., Siddons, Peter, Smith, Graham, Stanacevic, Milutin, & Woods, Russell. Development of a High-Rate Front-End ASIC for X-Ray Spectroscopy and Diffraction Applications. United States. https://doi.org/10.1109/TNS.2020.2976820
Vernon, Emerson, De Geronimo, Gianluigi, Baldwin, Jonathan, Chen, Wei, Fried, Jack, Giacomini, Gabriele, Kuczewski, Anthony, Kuczewski, John, Mead, Joe, Miceli, Antonino, Okasinski, John S., Pinelli, Don, Quaranta, Orlando, Rumaiz, Abdul K., Siddons, Peter, Smith, Graham, Stanacevic, Milutin, and Woods, Russell. Mon . "Development of a High-Rate Front-End ASIC for X-Ray Spectroscopy and Diffraction Applications". United States. https://doi.org/10.1109/TNS.2020.2976820. https://www.osti.gov/servlets/purl/1635480.
@article{osti_1635480,
title = {Development of a High-Rate Front-End ASIC for X-Ray Spectroscopy and Diffraction Applications},
author = {Vernon, Emerson and De Geronimo, Gianluigi and Baldwin, Jonathan and Chen, Wei and Fried, Jack and Giacomini, Gabriele and Kuczewski, Anthony and Kuczewski, John and Mead, Joe and Miceli, Antonino and Okasinski, John S. and Pinelli, Don and Quaranta, Orlando and Rumaiz, Abdul K. and Siddons, Peter and Smith, Graham and Stanacevic, Milutin and Woods, Russell},
abstractNote = {We developed a new front-end application-specific integrated circuit (ASIC) to upgrade the Maia X-ray microprobe. The ASIC instruments 32 configurable channels that perform either positive or negative charge amplification, pulse shaping, peak amplitude, and time extraction along with buffered analog storage. At a gain of 3.6 V/fC, 1-μs peaking time, and a temperature of 248 K, an electronic resolution of 13 and 10 e- rms was measured with and without a silicon drift detector (SDD) sensor, respectively. A spectral resolution of 170-eV full-width at half-maximum (FWHM) at 5.9 keV was obtained with an 55Fe source. The channel linearity was better than ± 1% with rate capabilities up to 40 kcps. The ASIC was fabricated in a commercial 250-nm process with a footprint of 6.3 mm × 3.9 mm and dissipates 167 mW of static power.},
doi = {10.1109/TNS.2020.2976820},
journal = {IEEE Transactions on Nuclear Science},
number = 4,
volume = 67,
place = {United States},
year = {Mon Mar 02 00:00:00 EST 2020},
month = {Mon Mar 02 00:00:00 EST 2020}
}

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