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Title: Parallel-in-Time Simulation Algorithm for Power Electronics: MMC-HVdc System

Abstract

The complexity in simulating power electronics like modular multilevel converters (MMCs) requires simulation algorithms to speed-up the process. Existing simulation algorithms exploit spatial parallelism to speed-up simulation. With rise in complexity of power electronics and presence of increased number of states within them, there are limits in the speed-up using spatial parallelism. In this paper, a temporal parallelism algorithm based on parallel-in-time methods is developed for simulation of power-electronics-systems. The temporal parallelism algorithm is based on computation of power-electronics-states on coarse and fine time-steps using different models. The models of power-electronics-systems used in coarse and fine time-steps are average-value and detailed models, respectively. The updates to states on coarse time-step are computed serially and are used to initialize the states on fine time-step. The updates on fine time-step are computed in parallel. A translation method is proposed in this paper to update the states on fine time-step from the simulations in the coarse time-step, and vice-versa. The proposed algorithm is applied to simulate MMCs and is validated with respect to a detailed reference MMC model. The proposed algorithm recorded a speed-up of up to 3.47× with 5 cores.

Authors:
ORCiD logo [1]
  1. Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States)
Publication Date:
Research Org.:
Oak Ridge National Laboratory (ORNL), Oak Ridge, TN (United States)
Sponsoring Org.:
USDOE Office of Electricity (OE)
OSTI Identifier:
1615797
Grant/Contract Number:  
AC05-00OR22725
Resource Type:
Accepted Manuscript
Journal Name:
IEEE Journal of Emerging and Selected Topics in Power Electronics
Additional Journal Information:
Journal Volume: 8; Journal Issue: 4; Journal ID: ISSN 2168-6777
Publisher:
IEEE
Country of Publication:
United States
Language:
English
Subject:
42 ENGINEERING

Citation Formats

Debnath, Suman. Parallel-in-Time Simulation Algorithm for Power Electronics: MMC-HVdc System. United States: N. p., 2019. Web. doi:10.1109/JESTPE.2019.2947411.
Debnath, Suman. Parallel-in-Time Simulation Algorithm for Power Electronics: MMC-HVdc System. United States. https://doi.org/10.1109/JESTPE.2019.2947411
Debnath, Suman. Tue . "Parallel-in-Time Simulation Algorithm for Power Electronics: MMC-HVdc System". United States. https://doi.org/10.1109/JESTPE.2019.2947411. https://www.osti.gov/servlets/purl/1615797.
@article{osti_1615797,
title = {Parallel-in-Time Simulation Algorithm for Power Electronics: MMC-HVdc System},
author = {Debnath, Suman},
abstractNote = {The complexity in simulating power electronics like modular multilevel converters (MMCs) requires simulation algorithms to speed-up the process. Existing simulation algorithms exploit spatial parallelism to speed-up simulation. With rise in complexity of power electronics and presence of increased number of states within them, there are limits in the speed-up using spatial parallelism. In this paper, a temporal parallelism algorithm based on parallel-in-time methods is developed for simulation of power-electronics-systems. The temporal parallelism algorithm is based on computation of power-electronics-states on coarse and fine time-steps using different models. The models of power-electronics-systems used in coarse and fine time-steps are average-value and detailed models, respectively. The updates to states on coarse time-step are computed serially and are used to initialize the states on fine time-step. The updates on fine time-step are computed in parallel. A translation method is proposed in this paper to update the states on fine time-step from the simulations in the coarse time-step, and vice-versa. The proposed algorithm is applied to simulate MMCs and is validated with respect to a detailed reference MMC model. The proposed algorithm recorded a speed-up of up to 3.47× with 5 cores.},
doi = {10.1109/JESTPE.2019.2947411},
journal = {IEEE Journal of Emerging and Selected Topics in Power Electronics},
number = 4,
volume = 8,
place = {United States},
year = {2019},
month = {10}
}

Journal Article:
Free Publicly Available Full Text
Publisher's Version of Record

Figures / Tables:

Fig. 1 Fig. 1: An example coarse and fine time-steps in a parallel-in-time simulation algorithm.

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