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Title: Patterning Si at the 1 nm Length Scale with Aberration-Corrected Electron-Beam Lithography: Tuning of Plasmonic Properties by Design

Abstract

Patterning of materials at single nanometer resolution allows engineering of quantum confinement effects, as these effects are significant at these length scales, and yields direct control over electro-optical properties. Silicon is by far the most important material in electronics, and the ability to fabricate Si-based devices of the smallest dimensions for novel device engineering is highly desirable. Here, the work presented here uses aberration-corrected electron-beam lithography combined with dry reactive ion etching to achieve both: patterning of 1-nm features and surface and volume plasmon engineering in Si. The nanofabrication technique employed here produces nanowires with a line edge roughness (LER) of 1 nm (3σ). In addition, this work demonstrates tuning of the Si volume plasmon energy by 1.2 eV from the bulk value, which is one order of magnitude higher than previous attempts of volume plasmon engineering using lithographic methods.

Authors:
 [1]; ORCiD logo [1];  [1];  [1];  [1];  [1];  [1]
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  1. Brookhaven National Lab. (BNL), Upton, NY (United States)
Publication Date:
Research Org.:
Brookhaven National Lab. (BNL), Upton, NY (United States)
Sponsoring Org.:
USDOE Office of Science (SC), Basic Energy Sciences (BES)
OSTI Identifier:
1546045
Alternate Identifier(s):
OSTI ID: 1532423
Report Number(s):
BNL-211915-2019-JAAM
Journal ID: ISSN 1616-301X
Grant/Contract Number:  
SC0012704; DE‐SC0012704
Resource Type:
Accepted Manuscript
Journal Name:
Advanced Functional Materials
Additional Journal Information:
Journal Volume: 29; Journal Issue: 52; Journal ID: ISSN 1616-301X
Publisher:
Wiley
Country of Publication:
United States
Language:
English
Subject:
29 ENERGY PLANNING, POLICY AND ECONOMY; aberration correction; atomic scale; EELS; electron‐beam lithography; line edge roughness; nanofabrication; plasmonics; silicon patterning; volume plasmon

Citation Formats

Manfrinato, Vitor R., Camino, Fernando E., Stein, Aaron, Zhang, Lihua, Lu, Ming, Stach, Eric A., and Black, Charles T. Patterning Si at the 1 nm Length Scale with Aberration-Corrected Electron-Beam Lithography: Tuning of Plasmonic Properties by Design. United States: N. p., 2019. Web. doi:10.1002/adfm.201903429.
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Manfrinato, Vitor R., Camino, Fernando E., Stein, Aaron, Zhang, Lihua, Lu, Ming, Stach, Eric A., & Black, Charles T. Patterning Si at the 1 nm Length Scale with Aberration-Corrected Electron-Beam Lithography: Tuning of Plasmonic Properties by Design. United States. https://doi.org/10.1002/adfm.201903429
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Manfrinato, Vitor R., Camino, Fernando E., Stein, Aaron, Zhang, Lihua, Lu, Ming, Stach, Eric A., and Black, Charles T. Mon . "Patterning Si at the 1 nm Length Scale with Aberration-Corrected Electron-Beam Lithography: Tuning of Plasmonic Properties by Design". United States. https://doi.org/10.1002/adfm.201903429. https://www.osti.gov/servlets/purl/1546045.
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@article{osti_1546045,
title = {Patterning Si at the 1 nm Length Scale with Aberration-Corrected Electron-Beam Lithography: Tuning of Plasmonic Properties by Design},
author = {Manfrinato, Vitor R. and Camino, Fernando E. and Stein, Aaron and Zhang, Lihua and Lu, Ming and Stach, Eric A. and Black, Charles T.},
abstractNote = {Patterning of materials at single nanometer resolution allows engineering of quantum confinement effects, as these effects are significant at these length scales, and yields direct control over electro-optical properties. Silicon is by far the most important material in electronics, and the ability to fabricate Si-based devices of the smallest dimensions for novel device engineering is highly desirable. Here, the work presented here uses aberration-corrected electron-beam lithography combined with dry reactive ion etching to achieve both: patterning of 1-nm features and surface and volume plasmon engineering in Si. The nanofabrication technique employed here produces nanowires with a line edge roughness (LER) of 1 nm (3σ). In addition, this work demonstrates tuning of the Si volume plasmon energy by 1.2 eV from the bulk value, which is one order of magnitude higher than previous attempts of volume plasmon engineering using lithographic methods.},
doi = {10.1002/adfm.201903429},
journal = {Advanced Functional Materials},
number = 52,
volume = 29,
place = {United States},
year = {2019},
month = {7}
}
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Journal Article:
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Publisher's Version of Record
https://doi.org/10.1002/adfm.201903429
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Cited by: 5 works
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Figures / Tables:

Figure 1 Figure 1: Fabrication processes for defining nanoscale patterns in Si. The TEM window stack is composed of a crystalline $\langle$100$\rangle$ Si film (35 nm-thick) over 20 nm amorphous SiO2 layer. a) Electron-beam exposure of desired areas of ≈10 nm-thick HSQ resist (crosshatched regions depict serially exposed areas). b) Development inmore » salty developer solution to remove all unexposed resist areas. Critical point drying of the developer from the patterns is used to avoid pattern collapse. c,d) Inductively coupled plasma etching of Si with a mixture of HBr and Cl2 gases. c) Shallow etching of ≈ 4 nm. d) Full etching of the 35 nm-thick Si film.« less
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