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Title: Optimized pulsed write schemes improve linearity and write speed for low-power organic neuromorphic devices

Abstract

Neuromorphic devices are becoming increasingly appealing as efficient emulators of neural networks used to model real world problems. However, no hardware to date has demonstrated the necessary high accuracy and energy efficiency gain over CMOS in both training via backpropagation and in read via vector matrix multiplication. Such shortcomings are due to device non-idealities, particularly asymmetric conductance tuning in response to uniform voltage pulse inputs. Here, by formulating a general circuit model for capacitive ion-exchange neuromorphic devices, we show that asymmetric nonlinearity in organic electrochemical neuromorphic devices (ENODes) can be suppressed by an appropriately chosen write scheme. Simulations based upon our model suggest that a nonlinear write-selector could reduce the switching voltage and energy, enabling analog tuning via a continuous set of resistance states (100 states) with extremely low switching energy (~170 fJ • µm –2). Furthermore, this work clarifies the pathway to neural algorithm accelerators capable of parallelism during both read and write operations.

Authors:
ORCiD logo [1]; ORCiD logo [1];  [2]; ORCiD logo [3];  [2];  [1]
  1. Stanford Univ., Stanford, CA (United States)
  2. Sandia National Lab. (SNL-CA), Livermore, CA (United States)
  3. Eindhoven Univ. of Technology, Eindhoven (Netherlands)
Publication Date:
Research Org.:
Sandia National Lab. (SNL-CA), Livermore, CA (United States); Energy Frontier Research Centers (EFRC) (United States). Nanostructures for Electrical Energy Storage (NEES)
Sponsoring Org.:
USDOE National Nuclear Security Administration (NNSA); USDOE Office of Science (SC), Basic Energy Sciences (BES) (SC-22)
OSTI Identifier:
1464199
Report Number(s):
SAND-2018-8253J
Journal ID: ISSN 0022-3727; 666441; TRN: US1902378
Grant/Contract Number:  
AC04-94AL85000
Resource Type:
Accepted Manuscript
Journal Name:
Journal of Physics. D, Applied Physics
Additional Journal Information:
Journal Volume: 51; Journal Issue: 22; Journal ID: ISSN 0022-3727
Publisher:
IOP Publishing
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING; neuromorphic computing; resistive memory; organic electronics; neural network; symmetric cycling; PEDOT:PSS; electrochemical organic neuromorphic device

Citation Formats

Keene, Scott T., Melianas, Armantas, Fuller, Elliot James, van de Burgt, Yoeri, Talin, Albert Alec, and Salleo, Alberto. Optimized pulsed write schemes improve linearity and write speed for low-power organic neuromorphic devices. United States: N. p., 2018. Web. doi:10.1088/1361-6463/aabe70.
Keene, Scott T., Melianas, Armantas, Fuller, Elliot James, van de Burgt, Yoeri, Talin, Albert Alec, & Salleo, Alberto. Optimized pulsed write schemes improve linearity and write speed for low-power organic neuromorphic devices. United States. doi:10.1088/1361-6463/aabe70.
Keene, Scott T., Melianas, Armantas, Fuller, Elliot James, van de Burgt, Yoeri, Talin, Albert Alec, and Salleo, Alberto. Tue . "Optimized pulsed write schemes improve linearity and write speed for low-power organic neuromorphic devices". United States. doi:10.1088/1361-6463/aabe70. https://www.osti.gov/servlets/purl/1464199.
@article{osti_1464199,
title = {Optimized pulsed write schemes improve linearity and write speed for low-power organic neuromorphic devices},
author = {Keene, Scott T. and Melianas, Armantas and Fuller, Elliot James and van de Burgt, Yoeri and Talin, Albert Alec and Salleo, Alberto},
abstractNote = {Neuromorphic devices are becoming increasingly appealing as efficient emulators of neural networks used to model real world problems. However, no hardware to date has demonstrated the necessary high accuracy and energy efficiency gain over CMOS in both training via backpropagation and in read via vector matrix multiplication. Such shortcomings are due to device non-idealities, particularly asymmetric conductance tuning in response to uniform voltage pulse inputs. Here, by formulating a general circuit model for capacitive ion-exchange neuromorphic devices, we show that asymmetric nonlinearity in organic electrochemical neuromorphic devices (ENODes) can be suppressed by an appropriately chosen write scheme. Simulations based upon our model suggest that a nonlinear write-selector could reduce the switching voltage and energy, enabling analog tuning via a continuous set of resistance states (100 states) with extremely low switching energy (~170 fJ • µm–2). Furthermore, this work clarifies the pathway to neural algorithm accelerators capable of parallelism during both read and write operations.},
doi = {10.1088/1361-6463/aabe70},
journal = {Journal of Physics. D, Applied Physics},
number = 22,
volume = 51,
place = {United States},
year = {2018},
month = {5}
}

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