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Title: Thermoelectric power factor enhancement with gate-all-around silicon nanowires

Abstract

The thermoelectric properties of gate-all-around silicon nanowires (Si NWs) are calculated to determine the potential for significant power factor enhancement. The Boltzmann transport equation and relaxation time approximation are employed to develop an electron transport model used to determine the field-effect mobility, electrical conductivity, Seebeck coefficient, and power factor for Si NWs with cross-sectional areas between 4 nm × 4 nm and 12 nm × 12 nm and a range of gate biases. Electrical conductivity for the gated Si NWs was much higher than that of doped Si due to the lack of ionized impurities and correspondingly greater carrier mobility. A significant increase in electrical conductivity with decreasing Si NW cross-sectional area was also observed due to a large increase in the average carrier density. For all Si NWs, the Seebeck coefficient was lower than that of doped bulk Si due to the different energy dependence between ionized impurity and phonon-mediated scattering processes. This decrease was also confirmed with Seebeck coefficient measurements of multigated Si NWs and n-type Si thin-films. Quantum confinement was also found to increase the Seebeck coefficient for <8 nm × 8 nm Si NWs and also at high charge densities. A maximum power factor of 6.8more » × 10-3 W m-1 K-2 was calculated for the 6 nm × 6 nm Si NWs with typical Si/SiO2 interface roughness, which is 2–3 × those obtained experimentally for bulk Si. The power factor was also found to greatly depend on surface roughness, with a root-mean-square roughness of <0.8 nm necessary for power factor enhancement. An increase in $ZT$ may also be possible if a low thermal conductivity can be obtained with minimal surface roughness.« less

Authors:
 [1];  [1]
  1. Univ. of California, Santa Barbara, CA (United States)
Publication Date:
Research Org.:
Energy Frontier Research Centers (EFRC) (United States). Center for Energy Efficient Materials (CEEM)
Sponsoring Org.:
USDOE Office of Science (SC), Basic Energy Sciences (BES)
OSTI Identifier:
1386383
Grant/Contract Number:  
SC0001009
Resource Type:
Accepted Manuscript
Journal Name:
Journal of Applied Physics
Additional Journal Information:
Journal Volume: 115; Journal Issue: 14; Related Information: CEEM partners with the University of California, Santa Barbara (lead); Purdue University; Los Alamos National Laboratory; National Renewable Energy Laboratory; Journal ID: ISSN 0021-8979
Publisher:
American Institute of Physics (AIP)
Country of Publication:
United States
Language:
English
Subject:
42 ENGINEERING; solar (photovoltaic); solid state lighting; phonons; thermoelectric; bio-inspired; energy storage (including batteries and capacitors); electrodes - solar; defects; charge transport; materials and chemistry by design; optics; synthesis (novel materials); synthesis (self-assembly); synthesis (scalable processing)

Citation Formats

Curtin, Benjamin M., and Bowers, John E. Thermoelectric power factor enhancement with gate-all-around silicon nanowires. United States: N. p., 2014. Web. doi:10.1063/1.4870962.
Curtin, Benjamin M., & Bowers, John E. Thermoelectric power factor enhancement with gate-all-around silicon nanowires. United States. https://doi.org/10.1063/1.4870962
Curtin, Benjamin M., and Bowers, John E. Wed . "Thermoelectric power factor enhancement with gate-all-around silicon nanowires". United States. https://doi.org/10.1063/1.4870962. https://www.osti.gov/servlets/purl/1386383.
@article{osti_1386383,
title = {Thermoelectric power factor enhancement with gate-all-around silicon nanowires},
author = {Curtin, Benjamin M. and Bowers, John E.},
abstractNote = {The thermoelectric properties of gate-all-around silicon nanowires (Si NWs) are calculated to determine the potential for significant power factor enhancement. The Boltzmann transport equation and relaxation time approximation are employed to develop an electron transport model used to determine the field-effect mobility, electrical conductivity, Seebeck coefficient, and power factor for Si NWs with cross-sectional areas between 4 nm × 4 nm and 12 nm × 12 nm and a range of gate biases. Electrical conductivity for the gated Si NWs was much higher than that of doped Si due to the lack of ionized impurities and correspondingly greater carrier mobility. A significant increase in electrical conductivity with decreasing Si NW cross-sectional area was also observed due to a large increase in the average carrier density. For all Si NWs, the Seebeck coefficient was lower than that of doped bulk Si due to the different energy dependence between ionized impurity and phonon-mediated scattering processes. This decrease was also confirmed with Seebeck coefficient measurements of multigated Si NWs and n-type Si thin-films. Quantum confinement was also found to increase the Seebeck coefficient for <8 nm × 8 nm Si NWs and also at high charge densities. A maximum power factor of 6.8 × 10-3 W m-1 K-2 was calculated for the 6 nm × 6 nm Si NWs with typical Si/SiO2 interface roughness, which is 2–3 × those obtained experimentally for bulk Si. The power factor was also found to greatly depend on surface roughness, with a root-mean-square roughness of <0.8 nm necessary for power factor enhancement. An increase in $ZT$ may also be possible if a low thermal conductivity can be obtained with minimal surface roughness.},
doi = {10.1063/1.4870962},
journal = {Journal of Applied Physics},
number = 14,
volume = 115,
place = {United States},
year = {Wed Apr 09 00:00:00 EDT 2014},
month = {Wed Apr 09 00:00:00 EDT 2014}
}

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