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Title: Fully 3D-Integrated Pixel Detectors for X-Rays

The vertically integrated photon imaging chip (VIPIC1) pixel detector is a stack consisting of a 500-μm-thick silicon sensor, a two-tier 34-μm-thick integrated circuit, and a host printed circuit board (PCB). The integrated circuit tiers were bonded using the direct bonding technology with copper, and each tier features 1-μm-diameter through-silicon vias that were used for connections to the sensor on one side, and to the host PCB on the other side. The 80-μm-pixel-pitch sensor was the direct bonding technology with nickel bonded to the integrated circuit. The stack was mounted on the board using Sn–Pb balls placed on a 320-μm pitch, yielding an entirely wire-bond-less structure. The analog front-end features a pulse response peaking at below 250 ns, and the power consumption per pixel is 25 μW. We successful completed the 3-D integration and have reported here. Additionally, all pixels in the matrix of 64 × 64 pixels were responding on well-bonded devices. Correct operation of the sparsified readout, allowing a single 153-ns bunch timing resolution, was confirmed in the tests on a synchrotron beam of 10-keV X-rays. An equivalent noise charge of 36.2 e - rms and a conversion gain of 69.5 μV/e - with 2.6 e - rms andmore » 2.7 μV/e - rms pixel-to-pixel variations, respectively, were measured.« less
Authors:
 [1] ;  [2] ;  [1] ;  [1] ;  [1] ;  [1] ;  [1] ;  [1] ;  [1] ;  [1] ;  [1]
  1. Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States)
  2. SLAC National Accelerator Lab., Menlo Park, CA (United States)
Publication Date:
Report Number(s):
FERMILAB-PUB-15-040-PPD
Journal ID: ISSN 0018-9383
Grant/Contract Number:
AC02-07CH11359
Type:
Accepted Manuscript
Journal Name:
IEEE Transactions on Electron Devices
Additional Journal Information:
Journal Volume: 63; Journal Issue: 1; Journal ID: ISSN 0018-9383
Publisher:
IEEE
Research Org:
Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States)
Sponsoring Org:
USDOE Office of Science (SC), High Energy Physics (HEP) (SC-25)
Country of Publication:
United States
Language:
English
Subject:
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY; CMOS integrated circuits; 3D integration; image sensors; pixel detectors; X-ray detectors
OSTI Identifier:
1230025

Deptuch, Grzegorz W., Gabriella, Carini, Enquist, Paul, Grybos, Pawel, Holm, Scott, Lipton, Ronald, Maj, Piotr, Patti, Robert, Siddons, David Peter, Szczygiel, Robert, and Yarema, Raymond. Fully 3D-Integrated Pixel Detectors for X-Rays. United States: N. p., Web. doi:10.1109/TED.2015.2448671.
Deptuch, Grzegorz W., Gabriella, Carini, Enquist, Paul, Grybos, Pawel, Holm, Scott, Lipton, Ronald, Maj, Piotr, Patti, Robert, Siddons, David Peter, Szczygiel, Robert, & Yarema, Raymond. Fully 3D-Integrated Pixel Detectors for X-Rays. United States. doi:10.1109/TED.2015.2448671.
Deptuch, Grzegorz W., Gabriella, Carini, Enquist, Paul, Grybos, Pawel, Holm, Scott, Lipton, Ronald, Maj, Piotr, Patti, Robert, Siddons, David Peter, Szczygiel, Robert, and Yarema, Raymond. 2016. "Fully 3D-Integrated Pixel Detectors for X-Rays". United States. doi:10.1109/TED.2015.2448671. https://www.osti.gov/servlets/purl/1230025.
@article{osti_1230025,
title = {Fully 3D-Integrated Pixel Detectors for X-Rays},
author = {Deptuch, Grzegorz W. and Gabriella, Carini and Enquist, Paul and Grybos, Pawel and Holm, Scott and Lipton, Ronald and Maj, Piotr and Patti, Robert and Siddons, David Peter and Szczygiel, Robert and Yarema, Raymond},
abstractNote = {The vertically integrated photon imaging chip (VIPIC1) pixel detector is a stack consisting of a 500-μm-thick silicon sensor, a two-tier 34-μm-thick integrated circuit, and a host printed circuit board (PCB). The integrated circuit tiers were bonded using the direct bonding technology with copper, and each tier features 1-μm-diameter through-silicon vias that were used for connections to the sensor on one side, and to the host PCB on the other side. The 80-μm-pixel-pitch sensor was the direct bonding technology with nickel bonded to the integrated circuit. The stack was mounted on the board using Sn–Pb balls placed on a 320-μm pitch, yielding an entirely wire-bond-less structure. The analog front-end features a pulse response peaking at below 250 ns, and the power consumption per pixel is 25 μW. We successful completed the 3-D integration and have reported here. Additionally, all pixels in the matrix of 64 × 64 pixels were responding on well-bonded devices. Correct operation of the sparsified readout, allowing a single 153-ns bunch timing resolution, was confirmed in the tests on a synchrotron beam of 10-keV X-rays. An equivalent noise charge of 36.2 e- rms and a conversion gain of 69.5 μV/e- with 2.6 e- rms and 2.7 μV/e- rms pixel-to-pixel variations, respectively, were measured.},
doi = {10.1109/TED.2015.2448671},
journal = {IEEE Transactions on Electron Devices},
number = 1,
volume = 63,
place = {United States},
year = {2016},
month = {1}
}