State-of-the-art in Heterogeneous Computing
- SINTEF ICT, Department of Applied Mathematics, Blindern, Oslo, Norway
- Oak Ridge National Laboratory, Future Technologies Group, Oak Ridge, TN, USA
Node level heterogeneous architectures have become attractive during the last decade for several reasons: compared to traditional symmetric CPUs, they offer high peak performance and are energy and/or cost efficient. With the increase of fine-grained parallelism in high-performance computing, as well as the introduction of parallelism in workstations, there is an acute need for a good overview and understanding of these architectures. We give an overview of the state-of-the-art in heterogeneous computing, focusing on three commonly found architectures: the Cell Broadband Engine Architecture, graphics processing units (GPUs), and field programmable gate arrays (FPGAs). We present a review of hardware, available software tools, and an overview of state-of-the-art techniques and algorithms. Furthermore, we present a qualitative and quantitative comparison of the architectures, and give our view on the future of heterogeneous computing.
- Sponsoring Organization:
- USDOE
- Grant/Contract Number:
- AC05-00OR22725; 186947; 180023
- OSTI ID:
- 1198007
- Journal Information:
- Scientific Programming, Journal Name: Scientific Programming Vol. 18 Journal Issue: 1; ISSN 1058-9244
- Publisher:
- Hindawi Publishing CorporationCopyright Statement
- Country of Publication:
- Egypt
- Language:
- English
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