National Library of Energy BETA

Sample records for transistor gate oxide

  1. Looking at Transistor Gate Oxide Formation in Real Time

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    Looking at Transistor Gate Oxide Formation in Real Time Print The oxide gate layer is critical to every transistor, and present-day layer thicknesses are in the 10-20 range (1-2...

  2. Looking at Transistor Gate Oxide Formation in Real Time

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    Looking at Transistor Gate Oxide Formation in Real Time Print The oxide gate layer is ... Now, for the first time, a group of researchers has obtained real-time oxidation results ...

  3. Looking at Transistor Gate Oxide Formation in Real Time

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    transistors (about 4,000 per person) are produced worldwide as part of the integrated circuits that drive information technology. Each of these transistors contains an...

  4. Looking at Transistor Gate Oxide Formation in Real Time

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    on the oxidation process at this thickness. Available results are either for thicker layers grown under high-pressure conditions or for only the first couple of monolayers...

  5. Protonic/electronic hybrid oxide transistor gated by chitosan and its full-swing low voltage inverter applications

    SciTech Connect

    Chao, Jin Yu; Zhu, Li Qiang Xiao, Hui; Yuan, Zhi Guo

    2015-12-21

    Modulation of charge carrier density in condensed materials based on ionic/electronic interaction has attracted much attention. Here, protonic/electronic hybrid indium-zinc-oxide (IZO) transistors gated by chitosan based electrolyte were obtained. The chitosan-based electrolyte illustrates a high proton conductivity and an extremely strong proton gating behavior. The transistor illustrates good electrical performances at a low operating voltage of ∼1.0 V such as on/off ratio of ∼3 × 10{sup 7}, subthreshold swing of ∼65 mV/dec, threshold voltage of ∼0.3 V, and mobility of ∼7 cm{sup 2}/V s. Good positive gate bias stress stabilities are obtained. Furthermore, a low voltage driven resistor-loaded inverter was built by using an IZO transistor in series with a load resistor, exhibiting a linear relationship between the voltage gain and the supplied voltage. The inverter is also used for decreasing noises of input signals. The protonic/electronic hybrid IZO transistors have potential applications in biochemical sensors and portable electronics.

  6. Solution processed lanthanum aluminate gate dielectrics for use in metal oxide-based thin film transistors

    SciTech Connect

    Esro, M.; Adamopoulos, G.; Mazzocco, R.; Kolosov, O.; Krier, A.; Vourlias, G.; Milne, W. I.

    2015-05-18

    We report on ZnO-based thin-film transistors (TFTs) employing lanthanum aluminate gate dielectrics (La{sub x}Al{sub 1−x}O{sub y}) grown by spray pyrolysis in ambient atmosphere at 440 °C. The structural, electronic, optical, morphological, and electrical properties of the La{sub x}Al{sub 1−x}O{sub y} films and devices as a function of the lanthanum to aluminium atomic ratio were investigated using a wide range of characterization techniques such as UV-visible absorption spectroscopy, impedance spectroscopy, spectroscopic ellipsometry, atomic force microscopy, x-ray diffraction, and field-effect measurements. As-deposited LaAlO{sub y} dielectrics exhibit a wide band gap (∼6.18 eV), high dielectric constant (k ∼ 16), low roughness (∼1.9 nm), and very low leakage currents (<3 nA/cm{sup 2}). TFTs employing solution processed LaAlO{sub y} gate dielectrics and ZnO semiconducting channels exhibit excellent electron transport characteristics with hysteresis-free operation, low operation voltages (∼10 V), high on/off current modulation ratio of >10{sup 6}, subthreshold swing of ∼650 mV dec{sup −1}, and electron mobility of ∼12 cm{sup 2} V{sup −1} s{sup −1}.

  7. Recovery from ultraviolet-induced threshold voltage shift in indium gallium zinc oxide thin film transistors by positive gate bias

    SciTech Connect

    Liu, P.; Chen, T. P.; Li, X. D.; Wong, J. I.; Liu, Z.; Liu, Y.; Leong, K. C.

    2013-11-11

    The effect of short-duration ultraviolet (UV) exposure on the threshold voltage (V{sub th}) of amorphous indium gallium zinc oxide thin film transistors (TFTs) and its recovery characteristics were investigated. The V{sub th} exhibited a significant negative shift after UV exposure. The V{sub th} instability caused by UV illumination is attributed to the positive charge trapping in the dielectric layer and/or at the channel/dielectric interface. The illuminated devices showed a slow recovery in threshold voltage without external bias. However, an instant recovery can be achieved by the application of positive gate pulses, which is due to the elimination of the positive trapped charges as a result of the presence of a large amount of field-induced electrons in the interface region.

  8. Advanced insulated gate bipolar transistor gate drive

    DOEpatents

    Short, James Evans; West, Shawn Michael; Fabean, Robert J.

    2009-08-04

    A gate drive for an insulated gate bipolar transistor (IGBT) includes a control and protection module coupled to a collector terminal of the IGBT, an optical communications module coupled to the control and protection module, a power supply module coupled to the control and protection module and an output power stage module with inputs coupled to the power supply module and the control and protection module, and outputs coupled to a gate terminal and an emitter terminal of the IGBT. The optical communications module is configured to send control signals to the control and protection module. The power supply module is configured to distribute inputted power to the control and protection module. The control and protection module outputs on/off, soft turn-off and/or soft turn-on signals to the output power stage module, which, in turn, supplies a current based on the signal(s) from the control and protection module for charging or discharging an input capacitance of the IGBT.

  9. Effect of top gate bias on photocurrent and negative bias illumination stress instability in dual gate amorphous indium-gallium-zinc oxide thin-film transistor

    SciTech Connect

    Lee, Eunji; Chowdhury, Md Delwar Hossain; Park, Min Sang; Jang, Jin

    2015-12-07

    We have studied the effect of top gate bias (V{sub TG}) on the generation of photocurrent and the decay of photocurrent for back channel etched inverted staggered dual gate structure amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film-transistors. Upon 5 min of exposure of 365 nm wavelength and 0.7 mW/cm{sup 2} intensity light with negative bottom gate bias, the maximum photocurrent increases from 3.29 to 322 pA with increasing the V{sub TG} from −15 to +15 V. By changing V{sub TG} from negative to positive, the Fermi level (E{sub F}) shifts toward conduction band edge (E{sub C}), which substantially controls the conversion of neutral vacancy to charged one (V{sub O} → V{sub O}{sup +}/V{sub O}{sup 2+} + e{sup −}/2e{sup −}), peroxide (O{sub 2}{sup 2−}) formation or conversion of ionized interstitial (O{sub i}{sup 2−}) to neutral interstitial (O{sub i}), thus electron concentration at conduction band. With increasing the exposure time, more carriers are generated, and thus, maximum photocurrent increases until being saturated. After negative bias illumination stress, the transfer curve shows −2.7 V shift at V{sub TG} = −15 V, which gradually decreases to −0.42 V shift at V{sub TG} = +15 V. It clearly reveals that the position of electron quasi-Fermi level controls the formation of donor defects (V{sub O}{sup +}/V{sub O}{sup 2+}/O{sub 2}{sup 2−}/O{sub i}) and/or hole trapping in the a-IGZO /interfaces.

  10. High mobility field effect transistor based on BaSnO{sub 3} with Al{sub 2}O{sub 3} gate oxide

    SciTech Connect

    Park, Chulkwon; Kim, Useong; Ju, Chan Jong; Park, Ji Sung; Kim, Young Mo; Char, Kookrin

    2014-11-17

    We fabricated an n-type accumulation-mode field effect transistor based on BaSnO{sub 3} transparent perovskite semiconductor, taking advantage of its high mobility and oxygen stability. We used the conventional metal-insulator-semiconductor structures: (In,Sn){sub 2}O{sub 3} as the source, drain, and gate electrodes, Al{sub 2}O{sub 3} as the gate insulator, and La-doped BaSnO{sub 3} as the semiconducting channel. The Al{sub 2}O{sub 3} gate oxide was deposited by atomic layer deposition technique. At room temperature, we achieved the field effect mobility value of 17.8?cm{sup 2}/Vs and the I{sub on}/I{sub off} ratio value higher than 10{sup 5} for V{sub DS}?=?1?V. These values are higher than those previously reported on other perovskite oxides, in spite of the large density of threading dislocations in the BaSnO{sub 3} on SrTiO{sub 3} substrates. However, a relatively large subthreshold swing value was found, which we attribute to the large density of charge traps in the Al{sub 2}O{sub 3} as well as the threading dislocations.

  11. Effect of proton irradiation dose on InAlN/GaN metal-oxide semiconductor high electron mobility transistors with Al2O3 gate oxide

    DOE PAGES [OSTI]

    Ahn, Shihyun; Kim, Byung -Jae; Lin, Yi -Hsuan; Ren, Fan; Pearton, Stephen J.; Yang, Gwangseok; Kim, Jihyun; Kravchenko, Ivan I.

    2016-07-26

    The effects of proton irradiation on the dc performance of InAlN/GaN metal-oxide-semiconductor high electron mobility transistors (MOSHEMTs) with Al2O3 as the gate oxide were investigated. The InAlN/GaN MOSHEMTs were irradiated with doses ranging from 1×1013 to 1×1015cm–2 at a fixed energy of 5MeV. There was minimal damage induced in the two dimensional electron gas at the lowest irradiation dose with no measurable increase in sheet resistance, whereas a 9.7% increase of the sheet resistance was observed at the highest irradiation dose. By sharp contrast, all irradiation doses created more severe degradation in the Ohmic metal contacts, with increases of specificmore » contact resistance from 54% to 114% over the range of doses investigated. These resulted in source-drain current–voltage decreases ranging from 96 to 242 mA/mm over this dose range. The trap density determined from temperature dependent drain current subthreshold swing measurements increased from 1.6 × 1013 cm–2 V–1 for the reference MOSHEMTs to 6.7 × 1013 cm–2 V–1 for devices irradiated with the highest dose. In conclusion, the carrier removal rate was 1287 ± 64 cm–1, higher than the authors previously observed in AlGaN/GaN MOSHEMTs for the same proton energy and consistent with the lower average bond energy of the InAlN.« less

  12. Electron-electron scattering-induced channel hot electron injection in nanoscale n-channel metal-oxide-semiconductor field-effect-transistors with high-k/metal gate stacks

    SciTech Connect

    Tsai, Jyun-Yu; Liu, Kuan-Ju; Lu, Ying-Hsin; Liu, Xi-Wen; Chang, Ting-Chang; Chen, Ching-En; Ho, Szu-Han; Tseng, Tseung-Yuen; Cheng, Osbert; Huang, Cheng-Tung; Lu, Ching-Sen

    2014-10-06

    This work investigates electron-electron scattering (EES)-induced channel hot electron (CHE) injection in nanoscale n-channel metal-oxide-semiconductor field-effect-transistors (n-MOSFETs) with high-k/metal gate stacks. Many groups have proposed new models (i.e., single-particle and multiple-particle process) to well explain the hot carrier degradation in nanoscale devices and all mechanisms focused on Si-H bond dissociation at the Si/SiO{sub 2} interface. However, for high-k dielectric devices, experiment results show that the channel hot carrier trapping in the pre-existing high-k bulk defects is the main degradation mechanism. Therefore, we propose a model of EES-induced CHE injection to illustrate the trapping-dominant mechanism in nanoscale n-MOSFETs with high-k/metal gate stacks.

  13. Inversion gate capacitance of undoped single-gate and double-gate field-effect transistor geometries in the extreme quantum limit

    SciTech Connect

    Majumdar, Amlan

    2015-05-28

    We present first-principle analytical derivations and numerically modeled data to show that the gate capacitance per unit gate area C{sub G} of extremely thin undoped-channel single-gate and double-gate field-effect transistor geometries in the extreme quantum limit with single-subband occupancy can be written as 1/C{sub G} = 1/C{sub OX} + N{sub G}/C{sub DOS} + N{sub G}/ηC{sub WF}, where N{sub G} is the number of gates, C{sub OX} is the oxide capacitance per unit area, C{sub DOS} is the density-of-states capacitance per unit area, C{sub WF} is the wave function spreading capacitance per unit area, and η is a constant on the order of 1.

  14. Proton conducting sodium alginate electrolyte laterally coupled low-voltage oxide-based transistors

    SciTech Connect

    Liu, Yang Hui; Wan, Qing; Qiang Zhu, Li; Shi, Yi

    2014-03-31

    Solution-processed sodium alginate electrolyte film shows a high proton conductivity of ?5.5??10{sup ?3} S/cm and a high lateral electric-double-layer (EDL) capacitance of ?2.0??F/cm{sup 2} at room temperature with a relative humidity of 57%. Low-voltage in-plane-gate indium-zinc-oxide-based EDL transistors laterally gated by sodium alginate electrolytes are fabricated on glass substrates. The field-effect mobility, current ON/OFF ratio, and subthreshold swing of such EDL transistors are estimated to be 4.2 cm{sup 2} V{sup ?1} s{sup ?1}, 2.8??10{sup 6}, and 130?mV/decade, respectively. At last, a low-voltage driven resistor-load inverter is also demonstrated. Such in-plane-gate EDL transistors have potential applications in portable electronics and low-cost biosensors.

  15. Organic field-effect transistor nonvolatile memories utilizing sputtered C nanoparticles as nano-floating-gate

    SciTech Connect

    Liu, Jie; Liu, Chang-Hai; She, Xiao-Jian; Sun, Qi-Jun; Gao, Xu; Wang, Sui-Dong

    2014-10-20

    High-performance organic field-effect transistor nonvolatile memories have been achieved using sputtered C nanoparticles as the nano-floating-gate. The sputtered C nano-floating-gate is prepared with low-cost material and simple process, forming uniform and discrete charge trapping sites covered by a smooth and complete polystyrene layer. The devices show large memory window, excellent retention capability, and programming/reading/erasing/reading endurance. The sputtered C nano-floating-gate can effectively trap both holes and electrons, and it is demonstrated to be suitable for not only p-type but also n-type organic field-effect transistor nonvolatile memories.

  16. Coherent molecular transistor: Control through variation of the gate wave function

    SciTech Connect

    Ernzerhof, Matthias

    2014-03-21

    In quantum interference transistors (QUITs), the current through the device is controlled by variation of the gate component of the wave function that interferes with the wave function component joining the source and the sink. Initially, mesoscopic QUITs have been studied and more recently, QUITs at the molecular scale have been proposed and implemented. Typically, in these devices the gate lead is subjected to externally adjustable physical parameters that permit interference control through modifications of the gate wave function. Here, we present an alternative model of a molecular QUIT in which the gate wave function is directly considered as a variable and the transistor operation is discussed in terms of this variable. This implies that we specify the gate current as well as the phase of the gate wave function component and calculate the resulting current through the source-sink channel. Thus, we extend on prior works that focus on the phase of the gate wave function component as a control parameter while having zero or certain discrete values of the current. We address a large class of systems, including finite graphene flakes, and obtain analytic solutions for how the gate wave function controls the transistor.

  17. A hydrogel capsule as gate dielectric in flexible organic field-effect transistors

    SciTech Connect

    Dumitru, L. M.; Manoli, K.; Magliulo, M.; Torsi, L.; Ligonzo, T.; Palazzo, G.

    2015-01-01

    A jellified alginate based capsule serves as biocompatible and biodegradable electrolyte system to gate an organic field-effect transistor fabricated on a flexible substrate. Such a system allows operating thiophene based polymer transistors below 0.5 V through an electrical double layer formed across an ion-permeable polymeric electrolyte. Moreover, biological macro-molecules such as glucose-oxidase and streptavidin can enter into the gating capsules that serve also as delivery system. An enzymatic bio-reaction is shown to take place in the capsule and preliminary results on the measurement of the electronic responses promise for low-cost, low-power, flexible electronic bio-sensing applications using capsule-gated organic field-effect transistors.

  18. Transistor operation and mobility enhancement in top-gated LaAlO_3 /

    Office of Scientific and Technical Information (OSTI)

    SrTiO_3 heterostructures (Journal Article) | SciTech Connect Journal Article: Transistor operation and mobility enhancement in top-gated LaAlO_3 / SrTiO_3 heterostructures Citation Details In-Document Search Title: Transistor operation and mobility enhancement in top-gated LaAlO_3 / SrTiO_3 heterostructures Authors: Hosoda, Masayuki ; Hikita, Yasuyuki ; Hwang, Harold Y. ; Bell1, Christopher Publication Date: 2013-06-18 OSTI Identifier: 1084270 Report Number(s): SLAC-PUB-15597 DOE Contract

  19. Terahertz signal detection in a short gate length field-effect transistor with a two-dimensional electron gas

    SciTech Connect

    Vostokov, N. V. Shashkin, V. I.

    2015-11-28

    We consider the problem of non-resonant detection of terahertz signals in a short gate length field-effect transistor having a two-dimensional electron channel with zero external bias between the source and the drain. The channel resistance, gate-channel capacitance, and quadratic nonlinearity parameter of the transistor during detection as a function of the gate bias voltage are studied. Characteristics of detection of the transistor connected in an antenna with real impedance are analyzed. The consideration is based on both a simple one-dimensional model of the transistor and allowance for the two-dimensional distribution of the electric field in the transistor structure. The results given by the different models are discussed.

  20. Dirac point and transconductance of top-gated graphene field-effect transistors operating at elevated temperature

    SciTech Connect

    Hopf, T.; Vassilevski, K. V., E-mail: k.vasilevskiy@ncl.ac.uk; Escobedo-Cousin, E.; King, P. J.; Wright, N. G.; O'Neill, A. G.; Horsfall, A. B.; Goss, J. P. [School of Electrical and Electronic Engineering, Newcastle University, Newcastle upon Tyne NE1 7RU (United Kingdom); Wells, G. H.; Hunt, M. R. C. [Department of Physics, Durham University, Durham DH1 3LE (United Kingdom)

    2014-10-21

    Top-gated graphene field-effect transistors (GFETs) have been fabricated using bilayer epitaxial graphene grown on the Si-face of 4H-SiC substrates by thermal decomposition of silicon carbide in high vacuum. Graphene films were characterized by Raman spectroscopy, Atomic Force Microscopy, Scanning Tunnelling Microscopy, and Hall measurements to estimate graphene thickness, morphology, and charge transport properties. A 27?nm thick Al?O? gate dielectric was grown by atomic layer deposition with an e-beam evaporated Al seed layer. Electrical characterization of the GFETs has been performed at operating temperatures up to 100?C limited by deterioration of the gate dielectric performance at higher temperatures. Devices displayed stable operation with the gate oxide dielectric strength exceeding 4.5 MV/cm at 100?C. Significant shifting of the charge neutrality point and an increase of the peak transconductance were observed in the GFETs as the operating temperature was elevated from room temperature to 100?C.

  1. Bottom-gate coplanar graphene transistors with enhanced graphene adhesion on atomic layer deposition Al{sub 2}O{sub 3}

    SciTech Connect

    Park, Dong-Wook; Mikael, Solomon; Chang, Tzu-Hsuan; Ma, Zhenqiang; Gong, Shaoqin

    2015-03-09

    A graphene transistor with a bottom-gate coplanar structure and an atomic layer deposition (ALD) aluminum oxide (Al{sub 2}O{sub 3}) gate dielectric is demonstrated. Wetting properties of ALD Al{sub 2}O{sub 3} under different deposition conditions are investigated by measuring the surface contact angle. It is observed that the relatively hydrophobic surface is suitable for adhesion between graphene and ALD Al{sub 2}O{sub 3}. To achieve hydrophobic surface of ALD Al{sub 2}O{sub 3}, a methyl group (CH{sub 3})-terminated deposition method has been developed and compared with a hydroxyl group (OH)-terminated deposition. Based on this approach, bottom-gate coplanar graphene field-effect transistors are fabricated and characterized. A post-thermal annealing process improves the performance of the transistors by enhancing the contacts between the source/drain metal and graphene. The fabricated transistor shows an I{sub on}/I{sub off} ratio, maximum transconductance, and field-effect mobility of 4.04, 20.1??S at V{sub D}?=?0.1?V, and 249.5?cm{sup 2}/Vs, respectively.

  2. Top-gate organic depletion and inversion transistors with doped channel and injection contact

    SciTech Connect

    Liu, Xuhai; Kasemann, Daniel Leo, Karl

    2015-03-09

    Organic field-effect transistors constitute a vibrant research field and open application perspectives in flexible electronics. For a commercial breakthrough, however, significant performance improvements are still needed, e.g., stable and high charge carrier mobility and on-off ratio, tunable threshold voltage, as well as integrability criteria such as n- and p-channel operation and top-gate architecture. Here, we show pentacene-based top-gate organic transistors operated in depletion and inversion regimes, realized by doping source and drain contacts as well as a thin layer of the transistor channel. By varying the doping concentration and the thickness of the doped channel, we control the position of the threshold voltage without degrading on-off ratio or mobility. Capacitance-voltage measurements show that an inversion channel can indeed be formed, e.g., an n-doped channel can be inverted to a p-type inversion channel with highly p-doped contacts. The Cytop polymer dielectric minimizes hysteresis, and the transistors can be biased for prolonged cycles without a shift of threshold voltage, indicating excellent operation stability.

  3. Gate controlled electronic transport in monolayer MoS{sub 2} field effect transistor

    SciTech Connect

    Zhou, Y. F.; Wang, B.; Yu, Y. J.; Wei, Y. D. E-mail: jianwang@hku.hk; Xian, H. M.; Wang, J. E-mail: jianwang@hku.hk

    2015-03-14

    The electronic spin and valley transport properties of a monolayer MoS{sub 2} are investigated using the non-equilibrium Green's function formalism combined with density functional theory. Due to the presence of strong Rashba spin orbit interaction (RSOI), the electronic valence bands of monolayer MoS{sub 2} are split into spin up and spin down Zeeman-like texture near the two inequivalent vertices K and K′ of the first Brillouin zone. When the gate voltage is applied in the scattering region, an additional strong RSOI is induced which generates an effective magnetic field. As a result, electron spin precession occurs along the effective magnetic field, which is controlled by the gate voltage. This, in turn, causes the oscillation of conductance as a function of the magnitude of the gate voltage and the length of the gate region. This current modulation due to the spin precession shows the essential feature of the long sought Datta-Das field effect transistor (FET). From our results, the oscillation periods for the gate voltage and gate length are found to be approximately 2.2 V and 20.03a{sub B} (a{sub B} is Bohr radius), respectively. These observations can be understood by a simple spin precessing model and indicate that the electron behaviors in monolayer MoS{sub 2} FET are both spin and valley related and can easily be controlled by the gate.

  4. High-performance carbon-nanotube-based complementary field-effect-transistors and integrated circuits with yttrium oxide

    SciTech Connect

    Liang, Shibo; Zhang, Zhiyong Si, Jia; Zhong, Donglai; Peng, Lian-Mao

    2014-08-11

    High-performance p-type carbon nanotube (CNT) transistors utilizing yttrium oxide as gate dielectric are presented by optimizing oxidization and annealing processes. Complementary metal-oxide-semiconductor (CMOS) field-effect-transistors (FETs) are then fabricated on CNTs, and the p- and n-type devices exhibit symmetrical high performances, especially with low threshold voltage near to zero. The corresponding CMOS CNT inverter is demonstrated to operate at an ultra-low supply voltage down to 0.2?V, while displaying sufficient voltage gain, high noise margin, and low power consumption. Yttrium oxide is proven to be a competitive gate dielectric for constructing high-performance CNT CMOS FETs and integrated circuits.

  5. Purely electronic mechanism of electrolyte gating of indium tin oxide thin films

    DOE PAGES [OSTI]

    Leng, X.; Bozovic, I.; Bollinger, A. T.

    2016-08-10

    Epitaxial indium tin oxide films have been grown on both LaAlO3 and yttria-stabilized zirconia substrates using RF magnetron sputtering. Electrolyte gating causes a large change in the film resistance that occurs immediately after the gate voltage is applied, and shows no hysteresis during the charging/discharging processes. When two devices are patterned next to one another and the first one gated through an electrolyte, the second one shows no changes in conductance, in contrast to what happens in materials (like tungsten oxide) susceptible to ionic electromigration and intercalation. These findings indicate that electrolyte gating in indium tin oxide triggers a puremore » electronic process (electron depletion or accumulation, depending on the polarity of the gate voltage), with no electrochemical reactions involved. Electron accumulation occurs in a very thin layer near the film surface, which becomes highly conductive. These results contribute to our understanding of the electrolyte gating mechanism in complex oxides and may be relevant for applications of electric double layer transistor devices.« less

  6. Effect of proton irradiation energy on AlGaN/GaN metal-oxide semiconductor high electron mobility transistors

    DOE PAGES [OSTI]

    Ahn, S.; Dong, C.; Zhu, W.; Kim, B. -j.; Hwang, Ya-Hsi; Ren, F.; Pearton, S. J.; Yang, Gwangseok; Kim, J.; Patrick, Erin; et al

    2015-08-18

    The effects of proton irradiation energy on dc characteristics of AlGaN/GaN metal-oxide semiconductor high electron mobility transistors (MOSHEMTs) using Al2O3 as the gate dielectric were studied. Al2O3/AlGaN/GaN MOSHEMTs were irradiated with a fixed proton dose of 5 × 1015 cm-2 at different energies of 5, 10, or 15 MeV. More degradation of the device dc characteristics was observed for lower irradiation energy due to the larger amount of nonionizing energy loss in the active region of the MOSHEMTs under these conditions. The reductions in saturation current were 95.3%, 68.3%, and 59.8% and reductions in maximum transconductance were 88%, 54.4%, andmore » 40.7% after 5, 10, and 15 MeV proton irradiation, respectively. Both forward and reverse gate leakage current were reduced more than one order of magnitude after irradiation. The carrier removal rates for the irradiation energies employed in this study were in the range of 127–289 cm-1. These are similar to the values reported for conventional metal-gate high-electron mobility transistors under the same conditions and show that the gate dielectric does not affect the response to proton irradiation for these energies.« less

  7. Direct probing of electron and hole trapping into nano-floating-gate in organic field-effect transistor nonvolatile memories

    SciTech Connect

    Cui, Ze-Qun; Wang, Shun; Chen, Jian-Mei; Gao, Xu; Dong, Bin E-mail: chilf@suda.edu.cn Chi, Li-Feng E-mail: chilf@suda.edu.cn Wang, Sui-Dong E-mail: chilf@suda.edu.cn

    2015-03-23

    Electron and hole trapping into the nano-floating-gate of a pentacene-based organic field-effect transistor nonvolatile memory is directly probed by Kelvin probe force microscopy. The probing is straightforward and non-destructive. The measured surface potential change can quantitatively profile the charge trapping, and the surface characterization results are in good accord with the corresponding device behavior. Both electrons and holes can be trapped into the nano-floating-gate, with a preference of electron trapping than hole trapping. The trapped charge quantity has an approximately linear relation with the programming/erasing gate bias, indicating that the charge trapping in the device is a field-controlled process.

  8. Physics of gate leakage current in N-polar InAlN/GaN heterojunction field effect transistors

    SciTech Connect

    Goswami, Arunesh; Trew, Robert J.; Bilbro, Griff L.

    2014-10-28

    A physics based model of the gate leakage current in N-polar InAlN/GaN heterojunction field effect transistors is demonstrated. The model is based on the space charge limited current flow dominated by the effects of deep traps in the InAlN surface layer. The model predicts accurately the gate-leakage measurement data of the N-polar InAlN/GaN device with InAlN cap layer. In the pinch-off state, the gate leakage current conduction through the surface of the device in the drain access region dominates the current flow through the two dimensional electron gas channel. One deep trap level and two levels of shallow traps are extracted by fitting the model results with measurement data.

  9. Smallest. Transistor. Ever.

    Office of Energy Efficiency and Renewable Energy (EERE)

    Research led by Berkeley Lab just broke a major barrier in transistor size by creating gate only 1 nanometer long.

  10. Looking at Transistor Gate Oxide Formation in Real Time

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    Hamburg (Germany); Overseas Advanced Education and Research Program from the Ministry of Education, Culture, Sports, Science, and Technology of Japan; Creative Research...

  11. Looking at Transistor Gate Oxide Formation in Real Time

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    University, Japan); B.S. Mun (Hanyang University, Korea, and ALS); M. Rossi, and Z. Hussain (ALS); P.N. Ross Jr. (Berkeley Lab); C.S. Fadley (University of California at...

  12. Looking at Transistor Gate Oxide Formation in Real Time

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    Advanced Education and Research Program from the Ministry of Education, Culture, Sports, Science, and Technology of Japan; Creative Research Initiatives of MOSTKOSEF...

  13. Light-induced hysteresis and recovery behaviors in photochemically activated solution-processed metal-oxide thin-film transistors

    SciTech Connect

    Jo, Jeong-Wan; Park, Sung Kyu E-mail: skpark@cau.ac.kr; Kim, Yong-Hoon E-mail: skpark@cau.ac.kr

    2014-07-28

    In this report, photo-induced hysteresis, threshold voltage (V{sub T}) shift, and recovery behaviors in photochemically activated solution-processed indium-gallium-zinc oxide (IGZO) thin-film transistors (TFTs) are investigated. It was observed that a white light illumination caused negative V{sub T} shift along with creation of clockwise hysteresis in electrical characteristics which can be attributed to photo-generated doubly ionized oxygen vacancies at the semiconductor/gate dielectric interface. More importantly, the photochemically activated IGZO TFTs showed much reduced overall V{sub T} shift compared to thermally annealed TFTs. Reduced number of donor-like interface states creation under light illumination and more facile neutralization of ionized oxygen vacancies by electron capture under positive gate potential are claimed to be the origin of the less V{sub T} shift in photochemically activated TFTs.

  14. Palladium nanoparticle decorated silicon nanowire field-effect transistor with side-gates for hydrogen gas detection

    SciTech Connect

    Ahn, Jae-Hyuk; Yun, Jeonghoon; Park, Inkyu; KI for the NanoCentury, KAIST, Daejeon 305-701; Mobile Sensor and IT Convergence Center, KAIST, Daejeon 305-701 ; Choi, Yang-Kyu

    2014-01-06

    A silicon nanowire field-effect transistor (SiNW FET) with local side-gates and Pd surface decoration is demonstrated for hydrogen (H{sub 2}) detection. The SiNW FETs are fabricated by top-down method and functionalized with palladium nanoparticles (PdNPs) through electron beam evaporation for H{sub 2} detection. The drain current of the PdNP-decorated device reversibly responds to H{sub 2} at different concentrations. The local side-gates allow individual addressing of each sensor and enhance the sensitivity by adjusting the working region to the subthreshold regime. A control experiment using a non-functionalized device verifies that the hydrogen-sensitivity is originated from the PdNPs functionalized on the SiNW surface.

  15. Thin Film Transistors On Plastic Substrates

    DOEpatents

    Carey, Paul G.; Smith, Patrick M.; Sigmon, Thomas W.; Aceves, Randy C.

    2004-01-20

    A process for formation of thin film transistors (TFTs) on plastic substrates replaces standard thin film transistor fabrication techniques, and uses sufficiently lower processing temperatures so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The silicon based thin film transistor produced by the process includes a low temperature substrate incapable of withstanding sustained processing temperatures greater than about 250.degree. C., an insulating layer on the substrate, a layer of silicon on the insulating layer having sections of doped silicon, undoped silicon, and poly-silicon, a gate dielectric layer on the layer of silicon, a layer of gate metal on the dielectric layer, a layer of oxide on sections of the layer of silicon and the layer of gate metal, and metal contacts on sections of the layer of silicon and layer of gate metal defining source, gate, and drain contacts, and interconnects.

  16. Gate-modulated conductance of few-layer WSe{sub 2} field-effect transistors in the subgap regime: Schottky barrier transistor and subgap impurity states

    SciTech Connect

    Wang, Junjie; Feng, Simin; Rhodes, Daniel; Balicas, Luis; Nguyen, Minh An T.; Watanabe, K.; Taniguchi, T.; Mallouk, Thomas E.; Terrones, Mauricio; Zhu, J.

    2015-04-13

    Two key subjects stand out in the pursuit of semiconductor research: material quality and contact technology. The fledging field of atomically thin transition metal dichalcogenides (TMDCs) faces a number of challenges in both efforts. This work attempts to establish a connection between the two by examining the gate-dependent conductance of few-layer (1-5L) WSe{sub 2} field effect devices. Measurements and modeling of the subgap regime reveal Schottky barrier transistor behavior. We show that transmission through the contact barrier is dominated by thermionic field emission (TFE) at room temperature, despite the lack of intentional doping. The TFE process arises due to a large number of subgap impurity states, the presence of which also leads to high mobility edge carrier densities. The density of states of such impurity states is self-consistently determined to be approximately 1–2 × 10{sup 13}/cm{sup 2}/eV in our devices. We demonstrate that substrate is unlikely to be a major source of the impurity states and suspect that lattice defects within the material itself are primarily responsible. Our experiments provide key information to advance the quality and understanding of TMDC materials and electrical devices.

  17. Charging dynamics of a floating gate transistor with site-controlled quantum dots

    SciTech Connect

    Maier, P. Hartmann, F.; Emmerling, M.; Schneider, C.; Höfling, S.; Kamp, M.; Worschech, L.

    2014-08-04

    A quantum dot memory based on a GaAs/AlGaAs quantum wire with site-controlled InAs quantum dots was realized by means of molecular beam epitaxy and etching techniques. By sampling of different gate voltage sweeps for the determination of charging and discharging thresholds, it was found that discharging takes place at short time scales of μs, whereas several seconds of waiting times within a distinct negative gate voltage range were needed to charge the quantum dots. Such quantum dot structures have thus the potential to implement logic functions comprising charge and time dependent ingredients such as counting of signals or learning rules.

  18. High performance TiN gate contact on AlGaN/GaN transistor using a mechanically strain induced P-doping

    SciTech Connect

    Soltani, A. Rousseau, M.; Gerbedoen, J.-C.; Bourzgui, N.; Mattalah, M.; Bonanno, P. L.; Ougazzaden, A.; Telia, A.; Patriarche, G.; BenMoussa, A.

    2014-06-09

    High performance titanium nitride sub-100 nm rectifying contact, deposited by sputtering on AlGaN/GaN high electron mobility transistors, shows a reverse leakage current as low as 38 pA/mm at V{sub GS} = −40 V and a Schottky barrier height of 0.95 eV. Based on structural characterization and 3D simulations, it is found that the polarization gradient induced by the gate metallization forms a P-type pseudo-doping region under the gate between the tensile surface and the compressively strained bulk AlGaN barrier layer. The strain induced by the gate metallization can compensate for the piezoelectric component. As a result, the gate contact can operate at temperatures as high as 700 °C and can withstand a large reverse bias of up to −100 V, which is interesting for high-performance transistors dedicated to power applications.

  19. Current collapse imaging of Schottky gate AlGaN/GaN high electron mobility transistors by electric field-induced optical second-harmonic generation measurement

    SciTech Connect

    Katsuno, Takashi Ishikawa, Tsuyoshi; Ueda, Hiroyuki; Uesugi, Tsutomu; Manaka, Takaaki; Iwamoto, Mitsumasa

    2014-06-23

    Two-dimensional current collapse imaging of a Schottky gate AlGaN/GaN high electron mobility transistor device was achieved by optical electric field-induced second-harmonic generation (EFISHG) measurements. EFISHG measurements can detect the electric field produced by carriers trapped in the on-state of the device, which leads to current collapse. Immediately after (e.g., 1, 100, or 800 μs) the completion of drain-stress voltage (200 V) in the off-state, the second-harmonic (SH) signals appeared within 2 μm from the gate edge on the drain electrode. The SH signal intensity became weak with time, which suggests that the trapped carriers are emitted from the trap sites. The SH signal location supports the well-known virtual gate model for current collapse.

  20. L{sub g}?=?100?nm In{sub 0.7}Ga{sub 0.3}As quantum well metal-oxide semiconductor field-effect transistors with atomic layer deposited beryllium oxide as interfacial layer

    SciTech Connect

    Koh, D., E-mail: dh.koh@utexas.edu, E-mail: Taewoo.Kim@sematech.org [Department of Electrical and Computer Engineering, Microelectronics Research Center, The University of Texas at Austin, Austin, Texas 78758 (United States); SEMATECH, Inc., Albany, New York 12203 (United States); Kwon, H. M. [Department of Electronics Engineering, Chungnam National University, Daejeon 305-764 (Korea, Republic of); Kim, T.-W., E-mail: dh.koh@utexas.edu, E-mail: Taewoo.Kim@sematech.org; Veksler, D.; Gilmer, D.; Kirsch, P. D. [SEMATECH, Inc., Albany, New York 12203 (United States); Kim, D.-H. [SEMATECH, Inc., Albany, New York 12203 (United States); GLOBALFOUNDRIES, Malta, New York 12020 (United States); Hudnall, Todd W. [Department of Chemistry and Biochemistry, Texas State University, San Marcos, Texas, 78666 (United States); Bielawski, Christopher W. [Department of Chemistry and Biochemistry, The University of Texas at Austin, Austin, Texas 78712 (United States); Maszara, W. [GLOBALFOUNDRIES, Santa Clara, California 95054 (United States); Banerjee, S. K. [Department of Electrical and Computer Engineering, Microelectronics Research Center, The University of Texas at Austin, Austin, Texas 78758 (United States)

    2014-04-21

    In this study, we have fabricated nanometer-scale channel length quantum-well (QW) metal-oxide-semiconductor field effect transistors (MOSFETs) incorporating beryllium oxide (BeO) as an interfacial layer. BeO has high thermal stability, excellent electrical insulating characteristics, and a large band-gap, which make it an attractive candidate for use as a gate dielectric in making MOSFETs. BeO can also act as a good diffusion barrier to oxygen owing to its small atomic bonding length. In this work, we have fabricated In{sub 0.53}Ga{sub 0.47}As MOS capacitors with BeO and Al{sub 2}O{sub 3} and compared their electrical characteristics. As interface passivation layer, BeO/HfO{sub 2} bilayer gate stack presented effective oxide thickness less 1 nm. Furthermore, we have demonstrated In{sub 0.7}Ga{sub 0.3}As QW MOSFETs with a BeO/HfO{sub 2} dielectric, showing a sub-threshold slope of 100?mV/dec, and a transconductance (g{sub m,max}) of 1.1 mS/?m, while displaying low values of gate leakage current. These results highlight the potential of atomic layer deposited BeO for use as a gate dielectric or interface passivation layer for IIIV MOSFETs at the 7?nm technology node and/or beyond.

  1. Radiation-hardened transistor and integrated circuit

    DOEpatents

    Ma, Kwok K.

    2007-11-20

    A composite transistor is disclosed for use in radiation hardening a CMOS IC formed on an SOI or bulk semiconductor substrate. The composite transistor has a circuit transistor and a blocking transistor connected in series with a common gate connection. A body terminal of the blocking transistor is connected only to a source terminal thereof, and to no other connection point. The blocking transistor acts to prevent a single-event transient (SET) occurring in the circuit transistor from being coupled outside the composite transistor. Similarly, when a SET occurs in the blocking transistor, the circuit transistor prevents the SET from being coupled outside the composite transistor. N-type and P-type composite transistors can be used for each and every transistor in the CMOS IC to radiation harden the IC, and can be used to form inverters and transmission gates which are the building blocks of CMOS ICs.

  2. Negative differential transconductance in silicon quantum well metal-oxide-semiconductor field effect/bipolar hybrid transistors

    SciTech Connect

    Naquin, Clint; Lee, Mark; Edwards, Hal; Mathur, Guru; Chatterjee, Tathagata; Maggio, Ken

    2014-11-24

    Introducing explicit quantum transport into Si transistors in a manner amenable to industrial fabrication has proven challenging. Hybrid field-effect/bipolar Si transistors fabricated on an industrial 45 nm process line are shown to demonstrate explicit quantum transport signatures. These transistors incorporate a lateral ion implantation-defined quantum well (QW) whose potential depth is controlled by a gate voltage (V{sub G}). Quantum transport in the form of negative differential transconductance (NDTC) is observed to temperatures >200 K. The NDTC is tied to a non-monotonic dependence of bipolar current gain on V{sub G} that reduces drain-source current through the QW. These devices establish the feasibility of exploiting quantum transport to transform the performance horizons of Si devices fabricated in an industrially scalable manner.

  3. Understanding the Structure of High-K Gate Oxides - Oral Presentation

    SciTech Connect

    Miranda, Andre

    2015-08-25

    Hafnium Oxide (HfO2) amorphous thin films are being used as gate oxides in transistors because of their high dielectric constant (κ) over Silicon Dioxide. The present study looks to find the atomic structure of HfO2 thin films which hasn’t been done with the technique of this study. In this study, two HfO2 samples were studied. One sample was made with thermal atomic layer deposition (ALD) on top of a Chromium and Gold layer on a silicon wafer. The second sample was made with plasma ALD on top of a Chromium and Gold layer on a Silicon wafer. Both films were deposited at a thickness of 50nm. To obtain atomic structure information, Grazing Incidence X-ray diffraction (GIXRD) was carried out on the HfO2 samples. Because of this, absorption, footprint, polarization, and dead time corrections were applied to the scattering intensity data collected. The scattering curves displayed a difference in structure between the ALD processes. The plasma ALD sample showed the broad peak characteristic of an amorphous structure whereas the thermal ALD sample showed an amorphous structure with characteristics of crystalline materials. This appears to suggest that the thermal process results in a mostly amorphous material with crystallites within. Further, the scattering intensity data was used to calculate a pair distribution function (PDF) to show more atomic structure. The PDF showed atom distances in the plasma ALD sample had structure up to 10 Å, while the thermal ALD sample showed the same structure below 10 Å. This structure that shows up below 10 Å matches the bond distances of HfO2 published in literature. The PDF for the thermal ALD sample also showed peaks up to 20 Å, suggesting repeating atomic spacing outside the HfO2 molecule in the sample. This appears to suggest that there is some crystalline structure within the thermal ALD sample.

  4. Effect of tunnel injection through the Schottky gate on the static and noise behavior of GaInAs/AlInAs high electron mobility transistor

    SciTech Connect

    Moro-Melgar, Diego; Mateos, Javier Gonzlez, Toms Vasallo, Beatriz G.

    2014-12-21

    By using a Monte Carlo simulator, the influence of the tunnel injection through the Schottky contact at the gate electrode of a GaInAs/AlInAs High Electron Mobility Transistor (HEMT) has been studied in terms of the static and noise performance. The method used to characterize the quantum tunnel current has been the Wentzel-Kramers-Brillouin (WKB) approach. The possibility of taking into account the influence of the image charge effect in the potential barrier height has been included as well. Regarding the static behavior, tunnel injection leads to a decrease in the drain current I{sub D} due to an enhancement of the potential barrier controlling the carrier transport through the channel. However, the pinch-off is degraded due to the tunneling current. Regarding the noise behavior, since the fluctuations in the potential barrier height caused by the tunnel-injected electrons are strongly coupled with the drain current fluctuations, a significant increase in the drain-current noise takes place, even when the tunnel effect is hardly noticeable in the static I-V characteristics, fact that must be taken into account when designing scaled HEMT for low-noise applications. In addition, tunnel injection leads to the appearance of full shot noise in the gate current.

  5. Transfer-free graphene synthesis on sapphire by catalyst metal agglomeration technique and demonstration of top-gate field-effect transistors

    SciTech Connect

    Miyoshi, Makoto Arima, Yukinori; Kubo, Toshiharu; Egawa, Takashi; Mizuno, Masaya; Soga, Tetsuo

    2015-08-17

    Transfer-free graphene synthesis was performed on sapphire substrates by using the catalyst metal agglomeration technique, and the graphene film quality was compared to that synthesized on sputtered SiO{sub 2}/Si substrates. Raman scattering measurements indicated that the graphene film on sapphire has better structural qualities than that on sputtered SiO{sub 2}/Si substrates. The cross-sectional transmission microscopic study also revealed that the film flatness was drastically improved by using sapphire substrates instead of sputtered SiO{sub 2}/Si substrates. These quality improvements seemed to be due the chemical and thermal stabilities of sapphire. Top-gate field-effect transistors were fabricated using the graphene films on sapphire, and it was confirmed that their drain current can be modulated with applied gate voltages. The maximum field-effect mobilities were estimated to be 720 cm{sup 2}/V s for electrons and 880 cm{sup 2}/V s for holes, respectively.

  6. Silicon on insulator self-aligned transistors

    DOEpatents

    McCarthy, Anthony M.

    2003-11-18

    A method for fabricating thin-film single-crystal silicon-on-insulator (SOI) self-aligned transistors. Standard processing of silicon substrates is used to fabricate the transistors. Physical spaces, between the source and gate, and the drain and gate, introduced by etching the polysilicon gate material, are used to provide connecting implants (bridges) which allow the transistor to perform normally. After completion of the silicon substrate processing, the silicon wafer is bonded to an insulator (glass) substrate, and the silicon substrate is removed leaving the transistors on the insulator (glass) substrate. Transistors fabricated by this method may be utilized, for example, in flat panel displays, etc.

  7. Impact of total ionizing dose irradiation on electrical property of ferroelectric-gate field-effect transistor

    SciTech Connect

    Yan, S. A.; Tang, M. H. Xiao, Y. G.; Zhang, W. L.; Ding, H.; Chen, J. W.; Zhou, Y. C.; Xiong, Y.; Li, Z.; Zhao, W.; Guo, H. X.

    2014-05-28

    P-type channel metal-ferroelectric-insulator-silicon field-effect transistors (FETs) with a 300?nm thick SrBi{sub 2}Ta{sub 2}O{sub 9} ferroelectric film and a 10?nm thick HfTaO layer on silicon substrate were fabricated and characterized. The prepared FeFETs were then subjected to {sup 60}Co gamma irradiation in steps of three dose levels. Irradiation-induced degradation on electrical characteristics of the fabricated FeFETs was observed after 1 week annealing at room temperature. The possible irradiation-induced degradation mechanisms were discussed and simulated. All the irradiation experiment results indicated that the stability and reliability of the fabricated FeFETs for nonvolatile memory applications will become uncontrollable under strong irradiation dose and/or long irradiation time.

  8. Ferroelectric switching of poly(vinylidene difluoride-trifluoroethylene) in metal-ferroelectric-semiconductor non-volatile memories with an amorphous oxide semiconductor

    SciTech Connect

    Gelinck, G. H.; Breemen, A. J. J. M. van; Cobb, B.

    2015-03-02

    Ferroelectric polarization switching of poly(vinylidene difluoride-trifluoroethylene) is investigated in different thin-film device structures, ranging from simple capacitors to dual-gate thin-film transistors (TFT). Indium gallium zinc oxide, a high mobility amorphous oxide material, is used as semiconductor. We find that the ferroelectric can be polarized in both directions in the metal-ferroelectric-semiconductor (MFS) structure and in the dual-gate TFT under certain biasing conditions, but not in the single-gate thin-film transistors. These results disprove the common belief that MFS structures serve as a good model system for ferroelectric polarization switching in thin-film transistors.

  9. Experimental study on vertical scaling of InAs-on-insulator metal-oxide-semiconductor field-effect transistors

    SciTech Connect

    Kim, SangHyeon E-mail: sh-kim@kist.re.kr; Yokoyama, Masafumi; Nakane, Ryosho; Takenaka, Mitsuru; Takagi, Shinichi; Ichikawa, Osamu; Osada, Takenori; Hata, Masahiko

    2014-06-30

    We have investigated effects of the vertical scaling on electrical properties in extremely thin-body InAs-on-insulator (-OI) metal-oxide-semiconductor field-effect transistors (MOSFETs). It is found that the body thickness (T{sub body}) scaling provides better short channel effect (SCE) control, whereas the T{sub body} scaling also causes the reduction of the mobility limited by channel thickness fluctuation (δT{sub body}) scattering (μ{sub fluctuation}). Also, in order to achieve better SCEs control, the thickness of InAs channel layer (T{sub channel}) scaling is more favorable than the thickness of MOS interface buffer layer (T{sub buffer}) scaling from a viewpoint of a balance between SCEs control and μ{sub fluctuation} reduction. These results indicate necessity of quantum well channel structure in InAs-OI MOSFETs and these should be considered in future transistor design.

  10. Direct fabrication of thin layer MoS{sub 2} field-effect nanoscale transistors by oxidation scanning probe lithography

    SciTech Connect

    Espinosa, Francisco M.; Ryu, Yu K.; Garcia, Ricardo; Marinov, Kolyo; Dumcenco, Dumitru; Kis, Andras

    2015-03-09

    Thin layer MoS{sub 2}-based field effect transistors (FET) are emerging candidates to fabricate very fast and sensitive devices. Here, we demonstrate a method to fabricate very narrow transistor channel widths on a single layer MoS{sub 2} flake connected to gold electrodes. Oxidation scanning probe lithography is applied to pattern insulating barriers on the flake. The process narrows the electron path to about 200 nm. The output and transfer characteristics of the fabricated FET show a behavior that is consistent with the minimum channel width of the device. The method relies on the direct and local chemical modification of MoS{sub 2}. The straightforward character and the lack of specific requirements envisage the controlled patterning of sub-100 nm electron channels in MoS{sub 2} FETs.

  11. Ionizing radiation induced leakage current on ultra-thin gate oxides

    SciTech Connect

    Scarpa, A.; Paccagnella, A.; Montera, F.; Ghibaudo, G.; Pananakakis, G.; Fuochi, P.G.

    1997-12-01

    MOS capacitors with a 4.4 nm thick gate oxide have been exposed to {gamma} radiation from a Co{sup 60} source. As a result, the authors have measured a stable leakage current at fields lower than those required for Fowler-Nordheim tunneling. This Radiation Induced Leakage Current (RILC) is similar to the usual Stress Induced Leakage Currents (SILC) observed after electrical stresses of MOS devices. They have verified that these two currents share the same dependence on the oxide field, and the RILC contribution can be normalized to an equivalent injected charge for Constant Current Stresses. They have also considered the dependence of the RILC from the cumulative radiation dose, and from the applied bias during irradiation, suggesting a correlation between RILC and the distribution of trapped holes and neutral levels in the oxide layer.

  12. Superconducting transistor

    DOEpatents

    Gray, Kenneth E.

    1979-01-01

    A superconducting transistor is formed by disposing three thin films of superconducting material in a planar parallel arrangement and insulating the films from each other by layers of insulating oxides to form two tunnel junctions. One junction is biased above twice the superconducting energy gap and the other is biased at less than twice the superconducting energy gap. Injection of quasiparticles into the center film by one junction provides a current gain in the second junction.

  13. Transistor-based particle detection systems and methods

    SciTech Connect

    Jain, Ankit; Nair, Pradeep R.; Alam, Muhammad Ashraful

    2015-06-09

    Transistor-based particle detection systems and methods may be configured to detect charged and non-charged particles. Such systems may include a supporting structure contacting a gate of a transistor and separating the gate from a dielectric of the transistor, and the transistor may have a near pull-in bias and a sub-threshold region bias to facilitate particle detection. The transistor may be configured to change current flow through the transistor in response to a change in stiffness of the gate caused by securing of a particle to the gate, and the transistor-based particle detection system may configured to detect the non-charged particle at least from the change in current flow.

  14. Detection of saliva-range glucose concentrations using organic thin-film transistors

    SciTech Connect

    Elkington, D.; Belcher, W. J.; Dastoor, P. C.; Zhou, X. J.

    2014-07-28

    We describe the development of a glucose sensor through direct incorporation of an enzyme (glucose oxidase) into the gate of an organic thin film transistor (OTFT). We show that glucose diffusion is the key determinant of the device response time and present a mechanism of glucose sensing in these devices that involves protonic doping of the transistor channel via enzymatic oxidation of glucose. The integrated OTFT sensor is sensitive across 4 decades of glucose concentration; a range that encompasses both the blood and salivary glucose concentration levels. As such, this work acts as a proof-of-concept for low-cost printed biosensors for salivary glucose.

  15. Modeling small-signal response of GaN-based metal-insulator-semiconductor high electron mobility transistor gate stack in spill-over regime: Effect of barrier resistance and interface states

    SciTech Connect

    Capriotti, M. E-mail: dionyz.pogany@tuwien.ac.at; Fleury, C.; Oposich, M.; Bethge, O.; Strasser, G.; Pogany, D. E-mail: dionyz.pogany@tuwien.ac.at; Lagger, P.; Ostermaier, C.

    2015-01-14

    We provide theoretical and simulation analysis of the small signal response of SiO{sub 2}/AlGaN/GaN metal insulator semiconductor (MIS) capacitors from depletion to spill over region, where the AlGaN/SiO{sub 2} interface is accumulated with free electrons. A lumped element model of the gate stack, including the response of traps at the III-N/dielectric interface, is proposed and represented in terms of equivalent parallel capacitance, C{sub p}, and conductance, G{sub p}. C{sub p} -voltage and G{sub p} -voltage dependences are modelled taking into account bias dependent AlGaN barrier dynamic resistance R{sub br} and the effective channel resistance. In particular, in the spill-over region, the drop of C{sub p} with the frequency increase can be explained even without taking into account the response of interface traps, solely by considering the intrinsic response of the gate stack (i.e., no trap effects) and the decrease of R{sub br} with the applied forward bias. Furthermore, we show the limitations of the conductance method for the evaluation of the density of interface traps, D{sub it}, from the G{sub p}/ω vs. angular frequency ω curves. A peak in G{sub p}/ω vs. ω occurs even without traps, merely due to the intrinsic frequency response of gate stack. Moreover, the amplitude of the G{sub p}/ω vs. ω peak saturates at high D{sub it}, which can lead to underestimation of D{sub it}. Understanding the complex interplay between the intrinsic gate stack response and the effect of interface traps is relevant for the development of normally on and normally off MIS high electron mobility transistors with stable threshold voltage.

  16. Enhanced stability against bias-stress of metal-oxide thin film transistors deposited at elevated temperatures

    SciTech Connect

    Fakhri, M.; Goerrn, P.; Riedl, T. [Institute of Electronic Devices, University of Wuppertal, Rainer-Gruenter-St. 21, 42119 Wuppertal (Germany); Weimann, T.; Hinze, P. [Physikalisch-Technische Bundesanstalt Braunschweig, Bundesallee 100, 38116 Braunschweig (Germany)

    2011-09-19

    Transparent zinc-tin-oxide (ZTO) thin film transistors (TFTs) have been prepared by DC magnetron sputtering. Compared to reference devices with a channel deposited at room temperature and subsequently annealing at 400 deg. C, a substantially enhanced stability against bias stress is evidenced for devices with in-situ substrate heating during deposition (400 deg. C). A reduced density of sub-gap defect states in TFT channels prepared with in-situ substrate heating is found. Concomitantly, a reduced sensitivity to the adsorption of ambient gases is evidenced for the in-situ heated devices. This finding is of particular importance for an application as driver electronics for organic light emitting diode displays.

  17. Method for double-sided processing of thin film transistors

    DOEpatents

    Yuan, Hao-Chih; Wang, Guogong; Eriksson, Mark A.; Evans, Paul G.; Lagally, Max G.; Ma, Zhenqiang

    2008-04-08

    This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.

  18. Polarization induced doped transistor

    DOEpatents

    Xing, Huili; Jena, Debdeep; Nomoto, Kazuki; Song, Bo; Zhu, Mingda; Hu, Zongyang

    2016-06-07

    A nitride-based field effect transistor (FET) comprises a compositionally graded and polarization induced doped p-layer underlying at least one gate contact and a compositionally graded and doped n-channel underlying a source contact. The n-channel is converted from the p-layer to the n-channel by ion implantation, a buffer underlies the doped p-layer and the n-channel, and a drain underlies the buffer.

  19. Rapid low-temperature processing of metal-oxide thin film transistors with combined far ultraviolet and thermal annealing

    SciTech Connect

    Leppniemi, J. Ojanper, K.; Kololuoma, T.; Huttunen, O.-H.; Majumdar, H.; Alastalo, A.; Dahl, J.; Tuominen, M.; Laukkanen, P.

    2014-09-15

    We propose a combined far ultraviolet (FUV) and thermal annealing method of metal-nitrate-based precursor solutions that allows efficient conversion of the precursor to metal-oxide semiconductor (indium zinc oxide, IZO, and indium oxide, In{sub 2}O{sub 3}) both at low-temperature and in short processing time. The combined annealing method enables a reduction of more than 100?C in annealing temperature when compared to thermally annealed reference thin-film transistor (TFT) devices of similar performance. Amorphous IZO films annealed at 250?C with FUV for 5?min yield enhancement-mode TFTs with saturation mobility of ?1?cm{sup 2}/(Vs). Amorphous In{sub 2}O{sub 3} films annealed for 15?min with FUV at temperatures of 180?C and 200?C yield TFTs with low-hysteresis and saturation mobility of 3.2?cm{sup 2}/(Vs) and 7.5?cm{sup 2}/(Vs), respectively. The precursor condensation process is clarified with x-ray photoelectron spectroscopy measurements. Introducing the FUV irradiation at 160?nm expedites the condensation process via in situ hydroxyl radical generation that results in the rapid formation of a continuous metal-oxygen-metal structure in the film. The results of this paper are relevant in order to upscale printed electronics fabrication to production-scale roll-to-roll environments.

  20. Comparison of gate dielectric plasma damage from plasma-enhanced atomic layer deposited and magnetron sputtered TiN metal gates

    SciTech Connect

    Brennan, Christopher J.; Neumann, Christopher M.; Vitale, Steven A.

    2015-07-28

    Fully depleted silicon-on-insulator transistors were fabricated using two different metal gate deposition mechanisms to compare plasma damage effects on gate oxide quality. Devices fabricated with both plasma-enhanced atomic-layer-deposited (PE-ALD) TiN gates and magnetron plasma sputtered TiN gates showed very good electrostatics and short-channel characteristics. However, the gate oxide quality was markedly better for PE-ALD TiN. A significant reduction in interface state density was inferred from capacitance-voltage measurements as well as a 1200× reduction in gate leakage current. A high-power magnetron plasma source produces a much higher energetic ion and vacuum ultra-violet (VUV) photon flux to the wafer compared to a low-power inductively coupled PE-ALD source. The ion and VUV photons produce defect states in the bulk of the gate oxide as well as at the oxide-silicon interface, causing higher leakage and potential reliability degradation.

  1. Low-temperature formation of high-quality gate oxide by ultraviolet irradiation on spin-on-glass

    SciTech Connect

    Usuda, R.; Uchida, K.; Nozaki, S.

    2015-11-02

    Although a UV cure was found to effectively convert a perhydropolysilazane (PHPS) spin-on-glass film into a dense SiO{sub x} film at low temperature, the electrical characteristics were never reported in order to recommend the use of PHPS as a gate-oxide material that can be formed at low temperature. We have formed a high-quality gate oxide by UV irradiation on the PHPS film, and obtained an interface midgap trap density of 3.4 × 10{sup 11 }cm{sup −2} eV{sup −1} by the UV wet oxidation and UV post-metallization annealing (PMA), at a temperature as low as 160 °C. In contrast to the UV irradiation using short-wavelength UV light, which is well known to enhance oxidation by the production of the excited states of oxygen, the UV irradiation was carried out using longer-wavelength UV light from a metal halide lamp. The UV irradiation during the wet oxidation of the PHPS film generates electron-hole pairs. The electrons ionize the H{sub 2}O molecules and facilitate dissociation of the molecules into H and OH{sup −}. The OH{sup −} ions are highly reactive with Si and improve the stoichiometry of the oxide. The UV irradiation during the PMA excites the electrons from the accumulation layer, and the built-in electric field makes the electron injection into the oxide much easier. The electrons injected into the oxide recombine with the trapped holes, which have caused a large negative flat band voltage shift after the UV wet oxidation, and also ionize the H{sub 2}O molecules. The ionization results in the electron stimulated dissociation of H{sub 2}O molecules and the decreased interface trap density.

  2. Comprehensive study and design of scaled metal/high-k/Ge gate stacks with ultrathin aluminum oxide interlayers

    SciTech Connect

    Asahara, Ryohei; Hideshima, Iori; Oka, Hiroshi; Minoura, Yuya; Hosoi, Takuji Shimura, Takayoshi; Watanabe, Heiji; Ogawa, Shingo; Yoshigoe, Akitaka; Teraoka, Yuden

    2015-06-08

    Advanced metal/high-k/Ge gate stacks with a sub-nm equivalent oxide thickness (EOT) and improved interface properties were demonstrated by controlling interface reactions using ultrathin aluminum oxide (AlO{sub x}) interlayers. A step-by-step in situ procedure by deposition of AlO{sub x} and hafnium oxide (HfO{sub x}) layers on Ge and subsequent plasma oxidation was conducted to fabricate Pt/HfO{sub 2}/AlO{sub x}/GeO{sub x}/Ge stacked structures. Comprehensive study by means of physical and electrical characterizations revealed distinct impacts of AlO{sub x} interlayers, plasma oxidation, and metal electrodes serving as capping layers on EOT scaling, improved interface quality, and thermal stability of the stacks. Aggressive EOT scaling down to 0.56 nm and very low interface state density of 2.4 × 10{sup 11 }cm{sup −2}eV{sup −1} with a sub-nm EOT and sufficient thermal stability were achieved by systematic process optimization.

  3. The impact of carbon sp{sup 2} fraction of reduced graphene oxide on the performance of reduced graphene oxide contacted organic transistors

    SciTech Connect

    Kang, Narae; Khondaker, Saiful I.

    2014-12-01

    One of the major bottlenecks in fabricating high performance organic field effect transistors (OFETs) is a large interfacial contact barrier between metal electrodes and organic semiconductors (OSCs) which makes the charge injection inefficient. Recently, reduced graphene oxide (RGO) has been suggested as an alternative electrode material for OFETs. RGO has tunable electronic properties and its conductivity can be varied by several orders of magnitude by varying the carbon sp{sup 2} fraction. However, whether the sp{sup 2} fraction of RGO in the electrode affects the performance of the fabricated OFETs is yet to be investigated. In this study, we demonstrate that the performance of OFETs with pentacene as OSC and RGO as electrode can be continuously improved by increasing the carbon sp{sup 2} fraction of RGO. When compared to control palladium electrodes, the mobility of the OFETs shows an improvement of ∼200% for 61% sp{sup 2} fraction RGO, which further improves to ∼500% for 80% RGO electrode. Similar improvements were also observed in current on-off ratio, on-current, and transconductance. Our study suggests that, in addition to π-π interaction at RGO/pentacene interface, the tunable electronic properties of RGO electrode have a significant role in OFETs performance.

  4. Fabrication and single-electron-transfer operation of a triple-dot single-electron transistor

    SciTech Connect

    Jo, Mingyu Uchida, Takafumi; Tsurumaki-Fukuchi, Atsushi; Arita, Masashi; Takahashi, Yasuo; Fujiwara, Akira; Nishiguchi, Katsuhiko; Ono, Yukinori; Inokawa, Hiroshi

    2015-12-07

    A triple-dot single-electron transistor was fabricated on silicon-on-insulator wafer using pattern-dependent oxidation. A specially designed one-dimensional silicon wire having small constrictions at both ends was converted to a triple-dot single-electron transistor by means of pattern-dependent oxidation. The fabrication of the center dot involved quantum size effects and stress-induced band gap reduction, whereas that of the two side dots involved thickness modulation because of the complex edge structure of two-dimensional silicon. Single-electron turnstile operation was confirmed at 8 K when a 100-mV, 1-MHz square wave was applied. Monte Carlo simulations indicated that such a device with inhomogeneous tunnel and gate capacitances can exhibit single-electron transfer.

  5. Method of making self-aligned lightly-doped-drain structure for MOS transistors

    DOEpatents

    Weiner, Kurt H.; Carey, Paul G.

    2001-01-01

    A process for fabricating lightly-doped-drains (LDD) for short-channel metal oxide semiconductor (MOS) transistors. The process utilizes a pulsed laser process to incorporate the dopants, thus eliminating the prior oxide deposition and etching steps. During the process, the silicon in the source/drain region is melted by the laser energy. Impurities from the gas phase diffuse into the molten silicon to appropriately dope the source/drain regions. By controlling the energy of the laser, a lightly-doped-drain can be formed in one processing step. This is accomplished by first using a single high energy laser pulse to melt the silicon to a significant depth and thus the amount of dopants incorporated into the silicon is small. Furthermore, the dopants incorporated during this step diffuse to the edge of the MOS transistor gate structure. Next, many low energy laser pulses are used to heavily dope the source/drain silicon only in a very shallow region. Because of two-dimensional heat transfer at the MOS transistor gate edge, the low energy pulses are inset from the region initially doped by the high energy pulse. By computer control of the laser energy, the single high energy laser pulse and the subsequent low energy laser pulses are carried out in a single operational step to produce a self-aligned lightly-doped-drain-structure.

  6. Transistors using crystalline silicon devices on glass

    DOEpatents

    McCarthy, Anthony M.

    1995-01-01

    A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed.

  7. Radiation induced leakage current and stress induced leakage current in ultra-thin gate oxides

    SciTech Connect

    Ceschia, M.; Paccagnella, A.; Cester, A.; Scarpa, A.; Ghidini, G.

    1998-12-01

    Low-field leakage current has been measured in thin oxides after exposure to ionizing radiation. This Radiation Induced Leakage Current (RILC) can be described as an inelastic tunneling process mediated by neutral traps in the oxide, with an energy loss of about 1 eV. The neutral trap distribution is influenced by the oxide field applied during irradiation, thus indicating that the precursors of the neutral defects are charged, likely being defects associated to trapped holes. The maximum leakage current is found under zero-field condition during irradiation, and it rapidly decreases as the field is enhanced, due to a displacement of the defect distribution across the oxide towards the cathodic interface. The RILC kinetics are linear with the cumulative dose, in contrast with the power law found on electrically stressed devices.

  8. Gate Access

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    gate clearance will have been arranged for you by the User Office. Berkeley Lab employees and visiting researchers (participating guests) may arrange for gate clearance for ...

  9. Photoemission spectroscopy study of the lanthanum lutetium oxide/silicon interface

    SciTech Connect

    Nichau, A.; Schnee, M.; Schubert, J.; Bernardy, P.; Hollaender, B.; Buca, D.; Mantl, S.; Besmehn, A.; Breuer, U.; Rubio-Zuazo, J.; Castro, G. R.; Muecklich, A.; Borany, J. von

    2013-04-21

    Rare earth oxides are promising candidates for future integration into nano-electronics. A key property of these oxides is their ability to form silicates in order to replace the interfacial layer in Si-based complementary metal-oxide field effect transistors. In this work a detailed study of lanthanum lutetium oxide based gate stacks is presented. Special attention is given to the silicate formation at temperatures typical for CMOS processing. The experimental analysis is based on hard x-ray photoemission spectroscopy complemented by standard laboratory experiments as Rutherford backscattering spectrometry and high-resolution transmission electron microscopy. Homogenously distributed La silicate and Lu silicate at the Si interface are proven to form already during gate oxide deposition. During the thermal treatment Si atoms diffuse through the oxide layer towards the TiN metal gate. This mechanism is identified to be promoted via Lu-O bonds, whereby the diffusion of La was found to be less important.

  10. Effects of low-temperature (120 °C) annealing on the carrier concentration and trap density in amorphous indium gallium zinc oxide thin film transistors

    SciTech Connect

    Kim, Jae-sung; Piao, Mingxing; Jang, Ho-Kyun; Kim, Gyu-Tae; Oh, Byung Su; Joo, Min-Kyu; Ahn, Seung-Eon

    2014-12-28

    We report an investigation of the effects of low-temperature annealing on the electrical properties of amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs). X-ray photoelectron spectroscopy was used to characterize the charge carrier concentration, which is related to the density of oxygen vacancies. The field-effect mobility was found to decrease as a function of the charge carrier concentration, owing to the presence of band-tail states. By employing the transmission line method, we show that the contact resistance did not significantly contribute to the changes in device performance after annealing. In addition, using low-frequency noise analyses, we found that the trap density decreased by a factor of 10 following annealing at 120 °C. The switching operation and on/off ratio of the a-IGZO TFTs improved considerably after low-temperature annealing.

  11. Charge noise analysis of metal oxide semiconductor dual-gate Si/SiGe quantum point contacts

    SciTech Connect

    Kamioka, J.; Oda, S.; Kodera, T.; Takeda, K.; Obata, T.; Tarucha, S.

    2014-05-28

    The frequency dependence of conductance noise through a gate-defined quantum point contact fabricated on a Si/SiGe modulation doped wafer is characterized. The 1/f{sup 2} noise, which is characteristic of random telegraph noise, is reduced by application of a negative bias on the global top gate to reduce the local gate voltage. Direct leakage from the large global gate voltage also causes random telegraph noise, and therefore, there is a suitable point to operate quantum dot measurement.

  12. Thin-film transistors based on p-type Cu{sub 2}O thin films produced at room temperature

    SciTech Connect

    Fortunato, Elvira; Figueiredo, Vitor; Barquinha, Pedro; Elamurugu, Elangovan; Goncalves, Goncalo; Martins, Rodrigo; Park, Sang-Hee Ko; Hwang, Chi-Sun

    2010-05-10

    Copper oxide (Cu{sub 2}O) thin films were used to produce bottom gate p-type transparent thin-film transistors (TFTs). Cu{sub 2}O was deposited by reactive rf magnetron sputtering at room temperature and the films exhibit a polycrystalline structure with a strongest orientation along (111) plane. The TFTs exhibit improved electrical performance such as a field-effect mobility of 3.9 cm{sup 2}/V s and an on/off ratio of 2x10{sup 2}.

  13. Ultrathin body GaSb-on-insulator p-channel metal-oxide-semiconductor field-effect transistors on Si fabricated by direct wafer bonding

    SciTech Connect

    Yokoyama, Masafumi Takenaka, Mitsuru; Takagi, Shinichi; Yokoyama, Haruki

    2015-02-16

    We have realized ultrathin body GaSb-on-insulator (GaSb-OI) on Si wafers by direct wafer bonding technology using atomic-layer deposition (ALD) Al{sub 2}O{sub 3} and have demonstrated GaSb-OI p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs) on Si. A 23-nm-thick GaSb-OI p-MOSFET exhibits the peak effective mobility of ∼76 cm{sup 2}/V s. We have found that the effective hole mobility of the thin-body GaSb-OI p-MOSFETs decreases with a decrease in the GaSb-OI thickness or with an increase in Al{sub 2}O{sub 3} ALD temperature. The InAs passivation of GaSb-OI MOS interfaces can enhance the peak effective mobility up to 159 cm{sup 2}/V s for GaSb-OI p-MOSFETs with the 20-nm-thick GaSb layer.

  14. Physical understanding of electron mobility in asymmetrically strained InGaAs-on-insulator metal-oxide-semiconductor field-effect transistors fabricated by lateral strain relaxation

    SciTech Connect

    Kim, SangHyeon E-mail: sh-kim@kist.re.kr; Yokoyama, Masafumi; Ikku, Yuki; Nakane, Ryosho; Takenaka, Mitsuru; Takagi, Shinichi; Ichikawa, Osamu; Osada, Takenori; Hata, Masahiko

    2014-03-17

    In this paper, we fabricated asymmetrically tensile-strained In{sub 0.53}Ga{sub 0.47}As-on-insulator (-OI) metal-oxide-semiconductor field-effect transistors (MOSFETs) using a lateral strain relaxation technique. A stripe-like line structure, fabricated in biaxially strained In{sub 0.53}Ga{sub 0.47}As-OI can lead to the lateral strain relaxation and asymmetric strain configuration in In{sub 0.53}Ga{sub 0.47}As-OI with the channel width of 100 nm. We have found that the effective mobility (μ{sub eff}) enhancement in In{sub 0.53}Ga{sub 0.47}As-OI MOSFETs with uniaxial-like asymmetric strain becomes smaller than that in In{sub 0.53}Ga{sub 0.47}As-OI MOSFETs with biaxial strain. We have clarified from a systematic analysis between the strain values and the μ{sub eff} characteristics that this mobility behavior can be understood by the change of the energy level of the conduction band minimum due to the lateral strain relaxation.

  15. Femtosecond all-optical parallel logic gates based on tunable saturable to reverse saturable absorption in graphene-oxide thin films

    SciTech Connect

    Roy, Sukhdev Yadav, Chandresh

    2013-12-09

    A detailed theoretical analysis of ultrafast transition from saturable absorption (SA) to reverse saturable absorption (RSA) has been presented in graphene-oxide thin films with femtosecond laser pulses at 800 nm. Increase in pulse intensity leads to switching from SA to RSA with increased contrast due to two-photon absorption induced excited-state absorption. Theoretical results are in good agreement with reported experimental results. Interestingly, it is also shown that increase in concentration results in RSA to SA transition. The switching has been optimized to design parallel all-optical femtosecond NOT, AND, OR, XOR, and the universal NAND and NOR logic gates.

  16. All diamond self-aligned thin film transistor

    DOEpatents

    Gerbi, Jennifer

    2008-07-01

    A substantially all diamond transistor with an electrically insulating substrate, an electrically conductive diamond layer on the substrate, and a source and a drain contact on the electrically conductive diamond layer. An electrically insulating diamond layer is in contact with the electrically conductive diamond layer, and a gate contact is on the electrically insulating diamond layer. The diamond layers may be homoepitaxial, polycrystalline, nanocrystalline or ultrananocrystalline in various combinations.A method of making a substantially all diamond self-aligned gate transistor is disclosed in which seeding and patterning can be avoided or minimized, if desired.

  17. Transistors using crystalline silicon devices on glass

    DOEpatents

    McCarthy, A.M.

    1995-05-09

    A method is disclosed for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed. 13 figs.

  18. Method for fabricating transistors using crystalline silicon devices on glass

    DOEpatents

    McCarthy, Anthony M.

    1997-01-01

    A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed.

  19. A Heteroepitaxial Perovskite Metal-Base Transistor

    SciTech Connect

    Yajima, T.; Hikita, Y.; Hwang, H.Y.; ,

    2011-08-11

    'More than Moore' captures a concept for overcoming limitations in silicon electronics by incorporating new functionalities in the constituent materials. Perovskite oxides are candidates because of their vast array of physical properties in a common structure. They also enable new electronic devices based on strongly-correlated electrons. The field effect transistor and its derivatives have been the principal oxide devices investigated thus far, but another option is available in a different geometry: if the current is perpendicular to the interface, the strong internal electric fields generated at back-to-back heterojunctions can be used for oxide electronics, analogous to bipolar transistors. Here we demonstrate a perovskite heteroepitaxial metal-base transistor operating at room temperature, enabled by interface dipole engineering. Analysis of many devices quantifies the evolution from hot-electron to permeable-base behaviour. This device provides a platform for incorporating the exotic ground states of perovskite oxides, as well as novel electronic phases at their interfaces.

  20. Three-terminal graphene single-electron transistor fabricated using feedback-controlled electroburning

    SciTech Connect

    Puczkarski, Paweł; Gehring, Pascal Lau, Chit S.; Liu, Junjie; Warner, Jamie H.; Briggs, G. Andrew D.; Mol, Jan A.; Ardavan, Arzhang

    2015-09-28

    We report room-temperature Coulomb blockade in a single layer graphene three-terminal single-electron transistor fabricated using feedback-controlled electroburning. The small separation between the side gate electrode and the graphene quantum dot results in a gate coupling up to 3 times larger compared to the value found for the back gate electrode. This allows for an effective tuning between the conductive and Coulomb blocked state using a small side gate voltage of about 1 V. The technique can potentially be used in the future to fabricate all-graphene based room temperature single-electron transistors or three terminal single molecule transistors with enhanced gate coupling.

  1. Room-temperature amorphous alloy field-effect transistor exhibiting particle and wave electronic transport

    SciTech Connect

    Fukuhara, M.; Kawarada, H.

    2015-02-28

    The realization of room-temperature macroscopic field effect transistors (FETs) will lead to new epoch-making possibilities for electronic applications. The I{sub d}-V{sub g} characteristics of the millimeter-sized aluminum-oxide amorphous alloy (Ni{sub 0.36}Nb{sub 0.24}Zr{sub 0.40}){sub 90}H{sub 10} FETs were measured at a gate-drain bias voltage of 060??V in nonmagnetic conditions and under a magnetic fields at room temperature. Application of dc voltages to the gate electrode resulted in the transistor exhibiting one-electron Coulomb oscillation with a period of 0.28?mV, Fabry-Perot interference with a period of 2.35??V under nonmagnetic conditions, and a Fano effect with a period of 0.26?mV for Vg and 0.2?T under a magnetic field. The realization of a low-energy controllable device made from millimeter-sized Ni-Nb-Zr-H amorphous alloy throws new light on cluster electronics.

  2. Inversion-mode GaAs wave-shaped field-effect transistor on GaAs (100) substrate

    SciTech Connect

    Zhang, Jingyun; Si, Mengwei; Wu, Heng; Ye, Peide D.; Lou, Xiabing; Gordon, Roy G.; Shao, Jiayi; Manfra, Michael J.

    2015-02-16

    Inversion-mode GaAs wave-shaped metal-oxide-semiconductor field-effect transistors (WaveFETs) are demonstrated using atomic-layer epitaxy of La{sub 2}O{sub 3} as gate dielectric on (111)A nano-facets formed on a GaAs (100) substrate. The wave-shaped nano-facets, which are desirable for the device on-state and off-state performance, are realized by lithographic patterning and anisotropic wet etching with optimized geometry. A well-behaved 1 μm gate length GaAs WaveFET shows a maximum drain current of 64 mA/mm, a subthreshold swing of 135 mV/dec, and an I{sub ON}/I{sub OFF} ratio of greater than 10{sup 7}.

  3. STABILIZED TRANSISTOR AMPLIFIER

    DOEpatents

    Noe, J.B.

    1963-05-01

    A temperature stabilized transistor amplifier having a pair of transistors coupled in cascade relation that are capable of providing amplification through a temperature range of - 100 un. Concent 85% F to 400 un. Concent 85% F described. The stabilization of the amplifier is attained by coupling a feedback signal taken from the emitter of second transistor at a junction between two serially arranged biasing resistances in the circuit of the emitter of the second transistor to the base of the first transistor. Thus, a change in the emitter current of the second transistor is automatically corrected by the feedback adjustment of the base-emitter potential of the first transistor and by a corresponding change in the base-emitter potential of the second transistor. (AEC)

  4. Sample size requirements for estimating effective dose from computed tomography using solid-state metal-oxide-semiconductor field-effect transistor dosimetry

    SciTech Connect

    Trattner, Sigal; Cheng, Bin; Pieniazek, Radoslaw L.; Hoffmann, Udo; Douglas, Pamela S.; Einstein, Andrew J.

    2014-04-15

    Purpose: Effective dose (ED) is a widely used metric for comparing ionizing radiation burden between different imaging modalities, scanners, and scan protocols. In computed tomography (CT), ED can be estimated by performing scans on an anthropomorphic phantom in which metal-oxide-semiconductor field-effect transistor (MOSFET) solid-state dosimeters have been placed to enable organ dose measurements. Here a statistical framework is established to determine the sample size (number of scans) needed for estimating ED to a desired precision and confidence, for a particular scanner and scan protocol, subject to practical limitations. Methods: The statistical scheme involves solving equations which minimize the sample size required for estimating ED to desired precision and confidence. It is subject to a constrained variation of the estimated ED and solved using the Lagrange multiplier method. The scheme incorporates measurement variation introduced both by MOSFET calibration, and by variation in MOSFET readings between repeated CT scans. Sample size requirements are illustrated on cardiac, chest, and abdomenpelvis CT scans performed on a 320-row scanner and chest CT performed on a 16-row scanner. Results: Sample sizes for estimating ED vary considerably between scanners and protocols. Sample size increases as the required precision or confidence is higher and also as the anticipated ED is lower. For example, for a helical chest protocol, for 95% confidence and 5% precision for the ED, 30 measurements are required on the 320-row scanner and 11 on the 16-row scanner when the anticipated ED is 4 mSv; these sample sizes are 5 and 2, respectively, when the anticipated ED is 10 mSv. Conclusions: Applying the suggested scheme, it was found that even at modest sample sizes, it is feasible to estimate ED with high precision and a high degree of confidence. As CT technology develops enabling ED to be lowered, more MOSFET measurements are needed to estimate ED with the same

  5. CNEEC - Electrolyte Gating by David Goldhaber-Gordon

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    Electrolyte Gating

  6. Amorphorized tantalum-nickel binary films for metal gate applications

    SciTech Connect

    Ouyang, Jiaomin; Wongpiya, Ranida; Clemens, Bruce M.; Deal, Michael D.; Nishi, Yoshio

    2015-04-13

    Amorphous metal gates have the potential to eliminate the work function variation due to grain orientation for poly-crystalline metal gate materials, which is a leading contributor to threshold voltage variation for small transistors. Structural and electrical properties of TaNi alloys using co-sputtering with different compositions and multilayer structures with different thicknesses are investigated in this work. It is found that TaNi films are amorphous for a wide range of compositions as deposited, and the films stay amorphous after annealing at 400?C in RTA for 1?min and up to at least 700?C depending on the composition. The amorphous films eventually crystallize into Ni, Ta, and TaNi{sub 3} phases at high enough temperature. For multilayer Ta/Ni structures, samples with individual layer thickness of 0.12?nm and 1.2?nm are amorphous as deposited due to intermixing during deposition, and stay amorphous until annealed at 500?C. The resistivity of the films as-deposited are around 200 ??cm. The work function of the alloy is fixed at close to the Ta work function of 4.6?eV for a wide range of compositions. This is attributed to the segregation of Ta at the metal-oxide interface, which is confirmed by XPS depth profile. Overall, the excellent thermal stability and low resistivity makes this alloy system a promising candidate for eliminating work function variation for gate last applications, as compared to crystalline Ta or TiN gates.

  7. C-H surface diamond field effect transistors for high temperature (400 °C) and high voltage (500 V) operation

    SciTech Connect

    Kawarada, H.; Tsuboi, H.; Naruo, T.; Yamada, T.; Xu, D.; Daicho, A.; Saito, T.; Hiraiwa, A.

    2014-07-07

    By forming a highly stable Al{sub 2}O{sub 3} gate oxide on a C-H bonded channel of diamond, high-temperature, and high-voltage metal-oxide-semiconductor field-effect transistor (MOSFET) has been realized. From room temperature to 400 °C (673 K), the variation of maximum drain-current is within 30% at a given gate bias. The maximum breakdown voltage (V{sub B}) of the MOSFET without a field plate is 600 V at a gate-drain distance (L{sub GD}) of 7 μm. We fabricated some MOSFETs for which V{sub B}/L{sub GD} > 100 V/μm. These values are comparable to those of lateral SiC or GaN FETs. The Al{sub 2}O{sub 3} was deposited on the C-H surface by atomic layer deposition (ALD) at 450 °C using H{sub 2}O as an oxidant. The ALD at relatively high temperature results in stable p-type conduction and FET operation at 400 °C in vacuum. The drain current density and transconductance normalized by the gate width are almost constant from room temperature to 400 °C in vacuum and are about 10 times higher than those of boron-doped diamond FETs.

  8. The role of the substrate on the dispersion in accumulation in III-V compound semiconductor based metal-oxide-semiconductor gate stacks

    SciTech Connect

    Krylov, Igor; Ritter, Dan; Eizenberg, Moshe

    2015-09-07

    Dispersion in accumulation is a widely observed phenomenon in metal-oxide-semiconductor gate stacks based on III-V compound semiconductors. The physical origin of this phenomenon is attributed to border traps located in the dielectric material adjacent to the semiconductor. Here, we study the role of the semiconductor substrate on the electrical quality of the first layers at atomic layer deposited (ALD) dielectrics. For this purpose, either Al{sub 2}O{sub 3} or HfO{sub 2} dielectrics with variable thicknesses were deposited simultaneously on two technology important semiconductors—InGaAs and InP. Significantly larger dispersion was observed in InP based gate stacks compared to those based on InGaAs. The observed difference is attributed to a higher border trap density in dielectrics deposited on InP compared to those deposited on InGaAs. We therefore conclude that the substrate plays an important role in the determination of the electrical quality of the first dielectric monolayers deposited by ALD. An additional observation is that larger dispersion was obtained in HfO{sub 2} based capacitors compared to Al{sub 2}O{sub 3} based capacitors, deposited on the same semiconductor. This phenomenon is attributed to the lower conduction band offset rather than to a higher border trap density.

  9. Stage Gate Management Guide

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Stage Gate Management in the Biomass Program February 2005 Revision 2 2 TABLE OF CONTENTS OVERVIEW............................................................................................................................. 4 STAGE GATE MANAGEMENT .................................................................................................... 4 STAGE GATE PROCESS AND LONG RANGE STRATEGIC PROGRAM PLANNING ........................ 5 GATE REVIEWS

  10. Visible-light-induced instability in amorphous metal-oxide based TFTs for transparent electronics

    SciTech Connect

    Ha, Tae-Jun

    2014-10-15

    We investigate the origin of visible-light-induced instability in amorphous metal-oxide based thin film transistors (oxide-TFTs) for transparent electronics by exploring the shift in threshold voltage (V{sub th}). A large hysteresis window in amorphous indium-gallium-zinc-oxide (a-IGZO) TFTs possessing large optical band-gap (≈3 eV) was observed in a visible-light illuminated condition whereas no hysteresis window was shown in a dark measuring condition. We also report the instability caused by photo irradiation and prolonged gate bias stress in oxide-TFTs. Larger V{sub th} shift was observed after photo-induced stress combined with a negative gate bias than the sum of that after only illumination stress and only negative gate bias stress. Such results can be explained by trapped charges at the interface of semiconductor/dielectric and/or in the gate dielectric which play a role in a screen effect on the electric field applied by gate voltage, for which we propose that the localized-states-assisted transitions by visible-light absorption can be responsible.

  11. Transparently wrap-gated semiconductor nanowire arrays for studies of gate-controlled photoluminescence

    SciTech Connect

    Nylund, Gustav; Storm, Kristian; Torstensson, Henrik; Wallentin, Jesper; Borgstrm, Magnus T.; Hessman, Dan; Samuelson, Lars

    2013-12-04

    We present a technique to measure gate-controlled photoluminescence (PL) on arrays of semiconductor nanowire (NW) capacitors using a transparent film of Indium-Tin-Oxide (ITO) wrapping around the nanowires as the gate electrode. By tuning the wrap-gate voltage, it is possible to increase the PL peak intensity of an array of undoped InP NWs by more than an order of magnitude. The fine structure of the PL spectrum reveals three subpeaks whose relative peak intensities change with gate voltage. We interpret this as gate-controlled state-filling of luminescing quantum dot segments formed by zincblende stacking faults in the mainly wurtzite NW crystal structure.

  12. Probing Organic Transistors with Infrared Beams

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    Probing Organic Transistors with Infrared Beams Probing Organic Transistors with Infrared Beams Print Wednesday, 26 July 2006 00:00 Silicon-based transistors are well-understood,...

  13. Method for formation of thin film transistors on plastic substrates

    DOEpatents

    Carey, P.G.; Smith, P.M.; Sigmon, T.W.; Aceves, R.C.

    1998-10-06

    A process for formation of thin film transistors (TFTs) on plastic substrates replaces standard thin film transistor fabrication techniques, and uses sufficiently lower processing temperatures so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The process relies on techniques for depositing semiconductors, dielectrics, and metals at low temperatures; crystallizing and doping semiconductor layers in the TFT with a pulsed energy source; and creating top-gate self-aligned as well as back-gate TFT structures. The process enables the fabrication of amorphous and polycrystalline channel silicon TFTs at temperatures sufficiently low to prevent damage to plastic substrates. The process has use in large area low cost electronics, such as flat panel displays and portable electronics. 5 figs.

  14. Method for formation of thin film transistors on plastic substrates

    DOEpatents

    Carey, Paul G.; Smith, Patrick M.; Sigmon, Thomas W.; Aceves, Randy C.

    1998-10-06

    A process for formation of thin film transistors (TFTs) on plastic substrates replaces standard thin film transistor fabrication techniques, and uses sufficiently lower processing temperatures so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The process relies on techniques for depositing semiconductors, dielectrics, and metals at low temperatures; crystallizing and doping semiconductor layers in the TFT with a pulsed energy source; and creating top-gate self-aligned as well as back-gate TFT structures. The process enables the fabrication of amorphous and polycrystalline channel silicon TFTs at temperatures sufficiently low to prevent damage to plastic substrates. The process has use in large area low cost electronics, such as flat panel displays and portable electronics.

  15. Method for fabricating transistors using crystalline silicon devices on glass

    DOEpatents

    McCarthy, A.M.

    1997-09-02

    A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed. 13 figs.

  16. Transistor-based interface circuitry

    SciTech Connect

    Taubman, Matthew S.

    2007-02-13

    Among the embodiments of the present invention is an apparatus that includes a transistor, a servo device, and a current source. The servo device is operable to provide a common base mode of operation of the transistor by maintaining an approximately constant voltage level at the transistor base. The current source is operable to provide a bias current to the transistor. A first device provides an input signal to an electrical node positioned between the emitter of the transistor and the current source. A second device receives an output signal from the collector of the transistor.

  17. Transistor-based interface circuitry

    DOEpatents

    Taubman, Matthew S.

    2004-02-24

    Among the embodiments of the present invention is an apparatus that includes a transistor, a servo device, and a current source. The servo device is operable to provide a common base mode of operation of the transistor by maintaining an approximately constant voltage level at the transistor base. The current source is operable to provide a bias current to the transistor. A first device provides an input signal to an electrical node positioned between the emitter of the transistor and the current source. A second device receives an output signal from the collector of the transistor.

  18. Carbon nanotube network thin-film transistors on flexible/stretchable substrates

    DOEpatents

    Takei, Kuniharu; Takahashi, Toshitake; Javey, Ali

    2016-03-29

    This disclosure provides systems, methods, and apparatus for flexible thin-film transistors. In one aspect, a device includes a polymer substrate, a gate electrode disposed on the polymer substrate, a dielectric layer disposed on the gate electrode and on exposed portions of the polymer substrate, a carbon nanotube network disposed on the dielectric layer, and a source electrode and a drain electrode disposed on the carbon nanotube network.

  19. Controlling the interface charge density in GaN-based metal-oxide-semiconductor heterostructures by plasma oxidation of metal layers

    SciTech Connect

    Hahn, Herwig Kalisch, Holger; Vescan, Andrei; Pécz, Béla; Kovács, András; Heuken, Michael

    2015-06-07

    In recent years, investigating and engineering the oxide-semiconductor interface in GaN-based devices has come into focus. This has been driven by a large effort to increase the gate robustness and to obtain enhancement mode transistors. Since it has been shown that deep interface states act as fixed interface charge in the typical transistor operating regime, it appears desirable to intentionally incorporate negative interface charge, and thus, to allow for a positive shift in threshold voltage of transistors to realise enhancement mode behaviour. A rather new approach to obtain such negative charge is the plasma-oxidation of thin metal layers. In this study, we present transmission electron microscopy and energy dispersive X-ray spectroscopy analysis as well as electrical data for Al-, Ti-, and Zr-based thin oxide films on a GaN-based heterostructure. It is shown that the plasma-oxidised layers have a polycrystalline morphology. An interfacial amorphous oxide layer is only detectable in the case of Zr. In addition, all films exhibit net negative charge with varying densities. The Zr layer is providing a negative interface charge density of more than 1 × 10{sup 13 }cm{sup –2} allowing to considerably shift the threshold voltage to more positive values.

  20. VOLTAGE-CONTROLLED TRANSISTOR OSCILLATOR

    DOEpatents

    Scheele, P.F.

    1958-09-16

    This patent relates to transistor oscillators and in particular to those transistor oscillators whose frequencies vary according to controlling voltages. A principal feature of the disclosed transistor oscillator circuit resides in the temperature compensation of the frequency modulating stage by the use of a resistorthermistor network. The resistor-thermistor network components are selected to have the network resistance, which is in series with the modulator transistor emitter circuit, vary with temperature to compensate for variation in the parameters of the transistor due to temperature change.

  1. Ripple gate drive circuit for fast operation of series connected IGBTs

    DOEpatents

    Rockot, Joseph H.; Murray, Thomas W.; Bass, Kevin C.

    2005-09-20

    A ripple gate drive circuit includes a plurality of transistors having their power terminals connected in series across an electrical potential. A plurality of control circuits, each associated with one of the transistors, is provided. Each control circuit is responsive to a control signal and an optical signal received from at least one other control circuit for controlling the conduction of electrical current through the power terminals of the associated transistor. The control circuits are responsive to a first state of the control circuit for causing each transistor in series to turn on sequentially and responsive to a second state of the control signal for causing each transistor in series to turn off sequentially.

  2. High gain, low noise, fully complementary logic inverter based on bi-layer WSe{sub 2} field effect transistors

    SciTech Connect

    Das, Saptarshi; Roelofs, Andreas; Dubey, Madan

    2014-08-25

    In this article, first, we show that by contact work function engineering, electrostatic doping and proper scaling of both the oxide thickness and the flake thickness, high performance p- and n-type WSe{sub 2} field effect transistors (FETs) can be realized. We report record high drive current of 98??A/?m for the electron conduction and 110 ?A/?m for the hole conduction in Schottky barrier WSe{sub 2} FETs. Then, we combine high performance WSe{sub 2} PFET with WSe{sub 2} NFET in double gated transistor geometry to demonstrate a fully complementary logic inverter. We also show that by adjusting the threshold voltages for the NFET and the PFET, the gain and the noise margin of the inverter can be significantly enhanced. The maximum gain of our chemical doping free WSe{sub 2} inverter was found to be ?25 and the noise margin was close to its ideal value of ?2.5?V for a supply voltage of V{sub DD}?=?5.0?V.

  3. Antiferromagnetic Spin Wave Field-Effect Transistor

    DOE PAGES [OSTI]

    Cheng, Ran; Daniels, Matthew W.; Zhu, Jian-Gang; Xiao, Di

    2016-04-06

    In a collinear antiferromagnet with easy-axis anisotropy, symmetry dictates that the spin wave modes must be doubly degenerate. Theses two modes, distinguished by their opposite polarization and available only in antiferromagnets, give rise to a novel degree of freedom to encode and process information. We show that the spin wave polarization can be manipulated by an electric field induced Dzyaloshinskii-Moriya interaction and magnetic anisotropy. We propose a prototype spin wave field effect transistor which realizes a gate-tunable magnonic analog of the Faraday effect, and demonstrate its application in THz signal modulation. In conclusion, our findings open up the exciting possibilitymore » of digital data processing utilizing antiferromagnetic spin waves and enable the direct projection of optical computing concepts onto the mesoscopic scale.« less

  4. Design of step composition gradient thin film transistor channel layers grown by atomic layer deposition

    SciTech Connect

    Ahn, Cheol Hyoun; Hee Kim, So; Gu Yun, Myeong; Koun Cho, Hyung

    2014-12-01

    In this study, we proposed the artificially designed channel structure in oxide thin-film transistors (TFTs) called a “step-composition gradient channel.” We demonstrated Al step-composition gradient Al-Zn-O (AZO) channel structures consisting of three AZO layers with different Al contents. The effects of stacking sequence in the step-composition gradient channel on performance and electrical stability of bottom-gate TFT devices were investigated with two channels of inverse stacking order (ascending/descending step-composition). The TFT with ascending step-composition channel structure (5 → 10 → 14 at. % Al composition) showed relatively negative threshold voltage (−3.7 V) and good instability characteristics with a reduced threshold voltage shift (Δ 1.4 V), which was related to the alignment of the conduction band off-set within the channel layer depending on the Al contents. Finally, the reduced Al composition in the initial layer of ascending step-composition channel resulted in the best field effect mobility of 4.5 cm{sup 2}/V s. We presented a unique active layer of the “step-composition gradient channel” in the oxide TFTs and explained the mechanism of adequate channel design.

  5. TRANSISTOR HIGH VOLTAGE POWER SUPPLY

    DOEpatents

    Driver, G.E.

    1958-07-15

    High voltage, direct current power supplies are described for use with battery powered nuclear detection equipment. The particular advantages of the power supply described, are increased efficiency and reduced size and welght brought about by the use of transistors in the circuit. An important feature resides tn the employment of a pair of transistors in an alternatefiring oscillator circuit having a coupling transformer and other circuit components which are used for interconnecting the various electrodes of the transistors.

  6. An enzymatic biosensor based on three-dimensional ZnO nanotetrapods spatial net modified AlGaAs/GaAs high electron mobility transistors

    SciTech Connect

    Song, Yu; Zhang, Xiaohui; Yan, Xiaoqin; Liao, Qingliang; Wang, Zengze; Zhang, Yue

    2014-11-24

    We designed and constructed three dimensional (3D) zinc oxide Nanotetrapods (T-ZnOs) modified AlGaAs/GaAs high electron mobility transistors (HEMTs) for enzymatic uric acid (UA) detection. The chemical vapor deposition synthesized T-ZnOs was distributed on the gate areas of HEMTs in order to immobilize uricase and improve the sensitivity of the HEMTs. Combining with the high efficiency of enzyme immobilization by T-ZnOs and high sensitivity from HEMT, the as-constructed uricase/T-ZnOs/HEMTs biosensor showed fast response towards UA at ∼1 s, wide linear range from 0.2 nM to 0.2 mM and the low detect limit at 0.2 nM. The results point out an avenue to design electronic device as miniaturized lab-on-chip device for high sensitive and specific in biomedical and clinical diagnosis applications.

  7. Low interface defect density of atomic layer deposition BeO with self-cleaning reaction for InGaAs metal oxide semiconductor field effect transistors

    SciTech Connect

    Shin, H. S.; SEMATECH, 2706 Montopolis Dr., Austin, Texas 78741; The University of Texas, Austin, Texas 78758 ; Yum, J. H.; The University of Texas, Austin, Texas 78758 ; Johnson, D. W.; Texas A and M University College Station, Texas 77843 ; Harris, H. R.; Hudnall, Todd W.; Oh, J.; Kirsch, P.; Wang, W.-E.; Bielawski, C. W.; Banerjee, S. K.; Lee, J. C.; Lee, H. D.

    2013-11-25

    In this paper, we discuss atomic configuration of atomic layer deposition (ALD) beryllium oxide (BeO) using the quantum chemistry to understand the theoretical origin. BeO has shorter bond length, higher reaction enthalpy, and larger bandgap energy compared with those of ALD aluminum oxide. It is shown that the excellent material properties of ALD BeO can reduce interface defect density due to the self-cleaning reaction and this contributes to the improvement of device performance of InGaAs MOSFETs. The low interface defect density and low leakage current of InGaAs MOSFET were demonstrated using X-ray photoelectron spectroscopy and the corresponding electrical results.

  8. Gated strip proportional detector

    DOEpatents

    Morris, Christopher L.; Idzorek, George C.; Atencio, Leroy G.

    1987-01-01

    A gated strip proportional detector includes a gas tight chamber which encloses a solid ground plane, a wire anode plane, a wire gating plane, and a multiconductor cathode plane. The anode plane amplifies the amount of charge deposited in the chamber by a factor of up to 10.sup.6. The gating plane allows only charge within a narrow strip to reach the cathode. The cathode plane collects the charge allowed to pass through the gating plane on a set of conductors perpendicular to the open-gated region. By scanning the open-gated region across the chamber and reading out the charge collected on the cathode conductors after a suitable integration time for each location of the gate, a two-dimensional image of the intensity of the ionizing radiation incident on the detector can be made.

  9. Gated strip proportional detector

    DOEpatents

    Morris, C.L.; Idzorek, G.C.; Atencio, L.G.

    1985-02-19

    A gated strip proportional detector includes a gas tight chamber which encloses a solid ground plane, a wire anode plane, a wire gating plane, and a multiconductor cathode plane. The anode plane amplifies the amount of charge deposited in the chamber by a factor of up to 10/sup 6/. The gating plane allows only charge within a narrow strip to reach the cathode. The cathode plane collects the charge allowed to pass through the gating plane on a set of conductors perpendicular to the open-gated region. By scanning the open-gated region across the chamber and reading out the charge collected on the cathode conductors after a suitable integration time for each location of the gate, a two-dimensional image of the intensity of the ionizing radiation incident on the detector can be made.

  10. Range gated imaging experiments using gated intensifiers

    SciTech Connect

    McDonald, T.E. Jr.; Yates, G.J.; Cverna, F.H.; Gallegos, R.A.; Jaramillo, S.A.; Numkena, D.M.; Payton, J.; Pena-Abeyta, C.R.

    1999-03-01

    A variety of range gated imaging experiments using high-speed gated/shuttered proximity focused microchannel plate image intensifiers (MCPII) are reported. Range gated imaging experiments were conducted in water for detection of submerged mines in controlled turbidity tank test and in sea water for the Naval Coastal Sea Command/US Marine Corps. Field experiments have been conducted consisting of kilometer range imaging of resolution targets and military vehicles in atmosphere at Eglin Air Force Base for the US Air Force, and similar imaging experiments, but in smoke environment, at Redstone Arsenal for the US Army Aviation and Missile Command (AMCOM). Wavelength of the illuminating laser was 532 nm with pulse width ranging from 6 to 12 ns and comparable gate widths. These tests have shown depth resolution in the tens of centimeters range from time phasing reflected LADAR images with MCPII shutter opening.

  11. REGENERATIVE TRANSISTOR AMPLIFIER

    DOEpatents

    Kabell, L.J.

    1958-11-25

    Electrical circults for use in computers and the like are described. particularly a regenerative bistable transistor amplifler which is iurned on by a clock signal when an information signal permits and is turned off by the clock signal. The amplifier porforms the above function with reduced power requirements for the clock signal and circuit operation. The power requirements are reduced in one way by employing transformer coupling which increases the collector circuit efficiency by eliminating the loss of power in the collector load resistor.

  12. The fundamental downscaling limit of field effect transistors

    SciTech Connect

    Mamaluy, Denis Gao, Xujiao

    2015-05-11

    We predict that within next 15 years a fundamental down-scaling limit for CMOS technology and other Field-Effect Transistors (FETs) will be reached. Specifically, we show that at room temperatures all FETs, irrespective of their channel material, will start experiencing unacceptable level of thermally induced errors around 5-nm gate lengths. These findings were confirmed by performing quantum mechanical transport simulations for a variety of 6-, 5-, and 4-nm gate length Si devices, optimized to satisfy high-performance logic specifications by ITRS. Different channel materials and wafer/channel orientations have also been studied; it is found that altering channel-source-drain materials achieves only insignificant increase in switching energy, which overall cannot sufficiently delay the approaching downscaling limit. Alternative possibilities are discussed to continue the increase of logic element densities for room temperature operation below the said limit.

  13. Single atom impurity in a single molecular transistor

    SciTech Connect

    Ray, S. J.

    2014-10-21

    The influence of an impurity atom on the electrostatic behaviour of a Single Molecular Transistor was investigated through Ab-initio calculations in a double-gated geometry. The charge stability diagram carries unique signature of the position of the impurity atom in such devices which together with the charging energy of the molecule could be utilised as an electronic fingerprint for the detection of such impurity states in a nano-electronic device. The two gated geometry allows additional control over the electrostatics as can be seen from the total energy surfaces (for a specific charge state), which is sensitive to the positions of the impurity. These devices which are operational at room temperature can provide significant advantages over the conventional silicon based single dopant devices functional at low temperature. The present approach could be a very powerful tool for the detection and control of individual impurity atoms in a single molecular device and for applications in future molecular electronics.

  14. Pulse Thermal Processing for Low Thermal Budget Integration of IGZO Thin Film Transistors

    SciTech Connect

    Noh, Joo Hyon; Joshi, Pooran C.; Kuruganti, Teja; Rack, Philip D.

    2014-11-26

    Pulse thermal processing (PTP) has been explored for low thermal budget integration of indium gallium zinc oxide (IGZO) thin film transistors (TFTs). The IGZO TFTs are exposed to a broadband (0.2-1.4 m) arc lamp radiation spectrum with 100 pulses of 1 msec pulse width. The impact of radiant exposure power on the TFT performance was analyzed in terms of the switching characteristics and bias stress reliability characteristics, respectively. The PTP treated IGZO TFTs with power density of 3.95 kW/cm2 and 0.1 sec total irradiation time showed comparable switching properties, at significantly lower thermal budget, to furnace annealed IGZO TFT. The typical field effect mobility FE, threshold voltage VT, and sub-threshold gate swing S.S were calculated to be 7.8 cm2/ V s, 8.1 V, and 0.22 V/ decade, respectively. The observed performance shows promise for low thermal budget TFT integration on flexible substrates exploiting the large-area, scalable PTP technology.

  15. Pulse Thermal Processing for Low Thermal Budget Integration of IGZO Thin Film Transistors

    DOE PAGES [OSTI]

    Noh, Joo Hyon; Joshi, Pooran C.; Kuruganti, Teja; Rack, Philip D.

    2014-11-26

    Pulse thermal processing (PTP) has been explored for low thermal budget integration of indium gallium zinc oxide (IGZO) thin film transistors (TFTs). The IGZO TFTs are exposed to a broadband (0.2-1.4 m) arc lamp radiation spectrum with 100 pulses of 1 msec pulse width. The impact of radiant exposure power on the TFT performance was analyzed in terms of the switching characteristics and bias stress reliability characteristics, respectively. The PTP treated IGZO TFTs with power density of 3.95 kW/cm2 and 0.1 sec total irradiation time showed comparable switching properties, at significantly lower thermal budget, to furnace annealed IGZO TFT. Themore » typical field effect mobility FE, threshold voltage VT, and sub-threshold gate swing S.S were calculated to be 7.8 cm2/ V s, 8.1 V, and 0.22 V/ decade, respectively. The observed performance shows promise for low thermal budget TFT integration on flexible substrates exploiting the large-area, scalable PTP technology.« less

  16. Impacts of SiN passivation on the degradation modes of AlGaN/GaN high electron mobility transistors under reverse-bias stress

    SciTech Connect

    Chen, Wei-Wei; Ma, Xiao-Hua E-mail: yhao@xidian.edu.cn; Hou, Bin; Zhu, Jie-Jie; Chen, Yong-He; Zheng, Xue-Feng; Zhang, Jin-Cheng; Hao, Yue E-mail: yhao@xidian.edu.cn

    2014-10-27

    Impacts of SiN passivation on the degradation modes of AlGaN/GaN high electron mobility transistors are investigated. The gate leakage current decreases significantly upon removing the SiN layer and no clear critical voltage for the sudden degradation of the gate leakage current can be observed in the reverse-bias step-stress experiments. Gate-lag measurements reveal the decrease of the fast-state surface traps and the increase of slow-state traps after the passivation layer removal. It is postulated that consistent surface charging relieves the electric field peak on the gate edge, thus the inverse piezoelectric effect is shielded.

  17. Gating of Permanent Molds for ALuminum Casting (Technical Report...

    Office of Scientific and Technical Information (OSTI)

    problems caused by improper gating are entrained aluminum oxide films and entrapped gas. ... Publication Date: 2004-03-30 OSTI Identifier: 822451 DOE Contract Number: FC36-01ID13983 ...

  18. Sliding-gate valve

    DOEpatents

    Usnick, George B.; Ward, Gene T.; Blair, Henry O.; Roberts, James W.; Warner, Terry N.

    1979-01-01

    This invention is a novel valve of the slidable-gate type. The valve is designed especially for long-term use with highly abrasive slurries. The sealing surfaces of the gate are shielded by the valve seats when the valve is fully open or closed, and the gate-to-seat clearance is swept with an inflowing purge gas while the gate is in transit. A preferred form of the valve includes an annular valve body containing an annular seat assembly defining a flow channel. The seat assembly comprises a first seat ring which is slidably and sealably mounted in the body, and a second seat ring which is tightly fitted in the body. These rings cooperatively define an annular gap which, together with passages in the valve body, forms a guideway extending normal to the channel. A plate-type gate is mounted for reciprocation in the guideway between positions where a portion of the plate closes the channel and where a circular aperture in the gate is in register with the channel. The valve casing includes opposed chambers which extend outwardly from the body along the axis of the guideway to accommodate the end portions of the gate. The chambers are sealed from atmosphere; when the gate is in transit, purge gas is admitted to the chambers and flows inwardly through the gate-to-seat-ring, clearance, minimizing buildup of process solids therein. A shaft reciprocated by an external actuator extends into one of the sealed chambers through a shaft seal and is coupled to an end of the gate. Means are provided for adjusting the clearance between the first seat ring and the gate while the valve is in service.

  19. Adiabatically implementing quantum gates

    SciTech Connect

    Sun, Jie; Lu, Songfeng Liu, Fang

    2014-06-14

    We show that, through the approach of quantum adiabatic evolution, all of the usual quantum gates can be implemented efficiently, yielding running time of order O(1). This may be considered as a useful alternative to the standard quantum computing approach, which involves quantum gates transforming quantum states during the computing process.

  20. Optical NAND gate

    DOEpatents

    Skogen, Erik J.; Raring, James; Tauke-Pedretti, Anna

    2011-08-09

    An optical NAND gate is formed from two pair of optical waveguide devices on a substrate, with each pair of the optical waveguide devices consisting of an electroabsorption modulator and a photodetector. One pair of the optical waveguide devices is electrically connected in parallel to operate as an optical AND gate; and the other pair of the optical waveguide devices is connected in series to operate as an optical NOT gate (i.e. an optical inverter). The optical NAND gate utilizes two digital optical inputs and a continuous light input to provide a NAND function output. The optical NAND gate can be formed from III-V compound semiconductor layers which are epitaxially deposited on a III-V compound semiconductor substrate, and operates at a wavelength in the range of 0.8-2.0 .mu.m.

  1. Reduction of skin effect losses in double-level-T-gate structure

    SciTech Connect

    Mikulics, M. Hardtdegen, H.; Arango, Y. C.; Adam, R.; Fox, A.; Grützmacher, D.; Gregušová, D.; Novák, J.; Stanček, S.; Kordoš, P.; Sofer, Z.; Juul, L.; Marso, M.

    2014-12-08

    We developed a T-gate technology based on selective wet etching yielding 200 nm wide T-gate structures used for fabrication of High Electron Mobility Transistors (HEMT). Major advantages of our process are the use of only standard photolithographic process and the ability to generate T-gate stacks. A HEMT fabricated on AlGaN/GaN/sapphire with gate length L{sub g} = 200 nm and double-stacked T-gates exhibits 60 GHz cutoff frequency showing ten-fold improvement compared to 6 GHz for the same device with 2 μm gate length. HEMTs with a double-level-T-gate (DLTG) structure exhibit up to 35% improvement of f{sub max} value compared to a single T-gate device. This indicates a significant reduction of skin effect losses in DLTG structure compared to its standard T-gate counterpart. These results agree with the theoretical predictions.

  2. Optical XOR gate

    DOEpatents

    Vawter, G. Allen

    2013-11-12

    An optical XOR gate is formed as a photonic integrated circuit (PIC) from two sets of optical waveguide devices on a substrate, with each set of the optical waveguide devices including an electroabsorption modulator electrically connected in series with a waveguide photodetector. The optical XOR gate utilizes two digital optical inputs to generate an XOR function digital optical output. The optical XOR gate can be formed from III-V compound semiconductor layers which are epitaxially deposited on a III-V compound semiconductor substrate, and operates at a wavelength in the range of 0.8-2.0 .mu.m.

  3. Optical NOR gate

    DOEpatents

    Skogen, Erik J.; Tauke-Pedretti, Anna

    2011-09-06

    An optical NOR gate is formed from two pair of optical waveguide devices on a substrate, with each pair of the optical waveguide devices consisting of an electroabsorption modulator electrically connected in series with a waveguide photodetector. The optical NOR gate utilizes two digital optical inputs and a continuous light input to provide a NOR function digital optical output. The optical NOR gate can be formed from III-V compound semiconductor layers which are epitaxially deposited on a III-V compound semiconductor substrate, and operates at a wavelength in the range of 0.8-2.0 .mu.m.

  4. Ultimate response time of high electron mobility transistors

    SciTech Connect

    Rudin, Sergey; Rupper, Greg; Shur, Michael

    2015-05-07

    We present theoretical studies of the response time of the two-dimensional gated electron gas to femtosecond pulses. Our hydrodynamic simulations show that the device response to a short pulse or a step-function signal is either smooth or oscillating time-decay at low and high mobility, μ, values, respectively. At small gate voltage swings, U{sub 0} = U{sub g} − U{sub th}, where U{sub g} is the gate voltage and U{sub th} is the threshold voltage, such that μU{sub 0}/L < v{sub s}, where L is the channel length and v{sub s} is the effective electron saturation velocity, the decay time in the low mobility samples is on the order of L{sup 2}/(μU{sub 0}), in agreement with the analytical drift model. However, the decay is preceded by a delay time on the order of L/s, where s is the plasma wave velocity. This delay is the ballistic transport signature in collision-dominated devices, which becomes important during very short time periods. In the high mobility devices, the period of the decaying oscillations is on the order of the plasma wave velocity transit time. Our analysis shows that short channel field effect transistors operating in the plasmonic regime can meet the requirements for applications as terahertz detectors, mixers, delay lines, and phase shifters in ultra high-speed wireless communication circuits.

  5. Silicon-on-insulator field effect transistor with improved body ties for rad-hard applications

    DOEpatents

    Schwank, James R.; Shaneyfelt, Marty R.; Draper, Bruce L.; Dodd, Paul E.

    2001-01-01

    A silicon-on-insulator (SOI) field-effect transistor (FET) and a method for making the same are disclosed. The SOI FET is characterized by a source which extends only partially (e.g. about half-way) through the active layer wherein the transistor is formed. Additionally, a minimal-area body tie contact is provided with a short-circuit electrical connection to the source for reducing floating body effects. The body tie contact improves the electrical characteristics of the transistor and also provides an improved single-event-upset (SEU) radiation hardness of the device for terrestrial and space applications. The SOI FET also provides an improvement in total-dose radiation hardness as compared to conventional SOI transistors fabricated without a specially prepared hardened buried oxide layer. Complementary n-channel and p-channel SOI FETs can be fabricated according to the present invention to form integrated circuits (ICs) for commercial and military applications.

  6. Negative differential transconductance in electrolyte-gated ruthenate

    SciTech Connect

    Hassan, Muhammad Umair; Dhoot, Anoop Singh; Wimbush, Stuart C.

    2015-01-19

    We report on a study of electric field-induced doping of the highly conductive ruthenate SrRuO{sub 3} using an ionic liquid as the gate dielectric in a field-effect transistor configuration. Two distinct carrier transport regimes are identified for increasing positive gate voltage in thin (10 nm) films grown heteroepitaxially on SrTiO{sub 3} substrates. For V{sub g} = 2 V and lower, the sample shows an increased conductivity of up to 13%, as might be expected for electron doping of a metal. At higher V{sub g} = 2.5 V, we observe a large decrease in electrical conductivity of >20% (at 4.2 K) due to the prevalence of strongly blocked conduction pathways.

  7. Formation of low resistivity titanium silicide gates in semiconductor integrated circuits

    DOEpatents

    Ishida, Emi

    1999-08-10

    A method of forming a titanium silicide (69) includes the steps of forming a transistor having a source region (58), a drain region (60) and a gate structure (56) and forming a titanium layer (66) over the transistor. A first anneal is performed with a laser anneal at an energy level that causes the titanium layer (66) to react with the gate structure (56) to form a high resistivity titanium silicide phase (68) having substantially small grain sizes. The unreacted portions of the titanium layer (66) are removed and a second anneal is performed, thereby causing the high resistivity titanium silicide phase (68) to convert to a low resistivity titanium silicide phase (69). The small grain sizes obtained by the first anneal allow low resistivity titanium silicide phase (69) to be achieved at device geometries less than about 0.25 micron.

  8. Reliability of AlGaN/GaN high electron mobility transistors on low dislocation density bulk GaN substrate: Implications of surface step edges

    SciTech Connect

    Killat, N. E-mail: Martin.Kuball@bristol.ac.uk; Montes Bajo, M.; Kuball, M. E-mail: Martin.Kuball@bristol.ac.uk; Paskova, T.; Materials Science and Engineering Department, North Carolina State University, Raleigh, North Carolina 27695 ; Evans, K. R.; Leach, J.; Electrical and Computer Engineering Department, Virginia Commonwealth University, Richmond, Virginia 23284 ; Li, X.; Özgür, Ü.; Morkoç, H.; Chabak, K. D.; Crespo, A.; Gillespie, J. K.; Fitch, R.; Kossler, M.; Walker, D. E.; Trejo, M.; Via, G. D.; Blevins, J. D.

    2013-11-04

    To enable gaining insight into degradation mechanisms of AlGaN/GaN high electron mobility transistors, devices grown on a low-dislocation-density bulk-GaN substrate were studied. Gate leakage current and electroluminescence (EL) monitoring revealed a progressive appearance of EL spots during off-state stress which signify the generation of gate current leakage paths. Atomic force microscopy evidenced the formation of semiconductor surface pits at the failure location, which corresponds to the interaction region of the gate contact edge and the edges of surface steps.

  9. Oxide

    SciTech Connect

    2014-07-15

    Oxide is a modular framework for feature extraction and analysis of executable files. Oxide is useful in a variety of reverse engineering and categorization tasks relating to executable content.

  10. A spin filter transistor made of topological Weyl semimetal

    SciTech Connect

    Shi, Zhangsheng; Wang, Maoji; Wu, Jiansheng

    2015-09-07

    Topological boundary states (TBSs) in Weyl semimetal (WSM) thin film can induce tunneling. Such TBSs are spin polarized inducing spin-polarized current, which can be used to build a spin-filter transistor (SFT) in spintronics. The WSM thin film can be viewed as a series of decoupled quantum anomalous Hall insulator (QAHI) wires connected in parallel, so compared with the proposed SFT made of QAHI nanowire, this SFT has a broader working energy region and easier to be manipulated. And within a narrow region outside this energy domain, the 2D WSM is with very low conductance, so it makes a good on/off switch device with controllable chemical potential induced by liquid ion gate. We also construct a loop device made of 2D WSM with inserted controllable flux to control the polarized current.

  11. Semianalytical quantum model for graphene field-effect transistors

    SciTech Connect

    Pugnaghi, Claudio; Grassi, Roberto Gnudi, Antonio; Di Lecce, Valerio; Gnani, Elena; Reggiani, Susanna; Baccarani, Giorgio

    2014-09-21

    We develop a semianalytical model for monolayer graphene field-effect transistors in the ballistic limit. Two types of devices are considered: in the first device, the source and drain regions are doped by charge transfer with Schottky contacts, while, in the second device, the source and drain regions are doped electrostatically by a back gate. The model captures two important effects that influence the operation of both devices: (i) the finite density of states in the source and drain regions, which limits the number of states available for transport and can be responsible for negative output differential resistance effects, and (ii) quantum tunneling across the potential steps at the source-channel and drain-channel interfaces. By comparison with a self-consistent non-equilibrium Green's function solver, we show that our model provides very accurate results for both types of devices, in the bias region of quasi-saturation as well as in that of negative differential resistance.

  12. Single-transistor-clocked flip-flop

    DOEpatents

    Zhao, Peiyi; Darwish, Tarek; Bayoumi, Magdy

    2005-08-30

    The invention provides a low power, high performance flip-flop. The flip-flop uses only one clocked transistor. The single clocked transistor is shared by the first and second branches of the device. A pulse generator produces a clock pulse to trigger the flip-flop. In one preferred embodiment the device can be made as a static explicit pulsed flip-flop which employs only two clocked transistors.

  13. Compact field programmable gate array-based pulse-sequencer and radio-frequency generator for experiments with trapped atoms

    SciTech Connect

    Pruttivarasin, Thaned; Katori, Hidetoshi

    2015-11-15

    We present a compact field-programmable gate array (FPGA) based pulse sequencer and radio-frequency (RF) generator suitable for experiments with cold trapped ions and atoms. The unit is capable of outputting a pulse sequence with at least 32 transistor-transistor logic (TTL) channels with a timing resolution of 40 ns and contains a built-in 100 MHz frequency counter for counting electrical pulses from a photo-multiplier tube. There are 16 independent direct-digital-synthesizers RF sources with fast (rise-time of ∼60 ns) amplitude switching and sub-mHz frequency tuning from 0 to 800 MHz.

  14. Complementary junction heterostructure field-effect transistor

    DOEpatents

    Baca, A.G.; Drummond, T.J.; Robertson, P.J.; Zipperian, T.E.

    1995-12-26

    A complimentary pair of compound semiconductor junction heterostructure field-effect transistors and a method for their manufacture are disclosed. The p-channel junction heterostructure field-effect transistor uses a strained layer to split the degeneracy of the valence band for a greatly improved hole mobility and speed. The n-channel device is formed by a compatible process after removing the strained layer. In this manner, both types of transistors may be independently optimized. Ion implantation is used to form the transistor active and isolation regions for both types of complimentary devices. The invention has uses for the development of low power, high-speed digital integrated circuits. 10 figs.

  15. Complementary junction heterostructure field-effect transistor

    DOEpatents

    Baca, Albert G.; Drummond, Timothy J.; Robertson, Perry J.; Zipperian, Thomas E.

    1995-01-01

    A complimentary pair of compound semiconductor junction heterostructure field-effect transistors and a method for their manufacture are disclosed. The p-channel junction heterostructure field-effect transistor uses a strained layer to split the degeneracy of the valence band for a greatly improved hole mobility and speed. The n-channel device is formed by a compatible process after removing the strained layer. In this manner, both types of transistors may be independently optimized. Ion implantation is used to form the transistor active and isolation regions for both types of complimentary devices. The invention has uses for the development of low power, high-speed digital integrated circuits.

  16. Probing Organic Transistors with Infrared Beams

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    materials. Organic field-effect transistors (FETs) are ideal for special applications that require large areas, light ... The prospect of electronic devices incorporating lightweight...

  17. Probing Organic Transistors with Infrared Beams

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    there is growing need for the development of electronic devices based on organic polymer materials. Organic field-effect transistors (FETs) are ideal for special applications...

  18. Investigation of defect-induced abnormal body current in fin field-effect-transistors

    SciTech Connect

    Liu, Kuan-Ju; Tsai, Jyun-Yu; Lu, Ying-Hsin; Liu, Xi-Wen; Chang, Ting-Chang; Chen, Ching-En; Yang, Ren-Ya; Cheng, Osbert; Huang, Cheng-Tung

    2015-08-24

    This letter investigates the mechanism of abnormal body current at the linear region in n-channel high-k/metal gate stack fin field effect transistors. Unlike body current, which is generated by impact ionization at high drain voltages, abnormal body current was found to increase with decreasing drain voltages. Notably, the unusual body leakage only occurs in three-dimensional structure devices. Based on measurements under different operation conditions, the abnormal body current can be attributed to fin surface defect-induced leakage current, and the mechanism is electron tunneling to the fin via the defects, resulting in holes left at the body terminal.

  19. Universal power transistor base drive control unit

    DOEpatents

    Gale, Allan R.; Gritter, David J.

    1988-01-01

    A saturation condition regulator system for a power transistor which achieves the regulation objectives of a Baker clamp but without dumping excess base drive current into the transistor output circuit. The base drive current of the transistor is sensed and used through an active feedback circuit to produce an error signal which modulates the base drive current through a linearly operating FET. The collector base voltage of the power transistor is independently monitored to develop a second error signal which is also used to regulate base drive current. The current-sensitive circuit operates as a limiter. In addition, a fail-safe timing circuit is disclosed which automatically resets to a turn OFF condition in the event the transistor does not turn ON within a predetermined time after the input signal transition.

  20. Universal power transistor base drive control unit

    DOEpatents

    Gale, A.R.; Gritter, D.J.

    1988-06-07

    A saturation condition regulator system for a power transistor is disclosed which achieves the regulation objectives of a Baker clamp but without dumping excess base drive current into the transistor output circuit. The base drive current of the transistor is sensed and used through an active feedback circuit to produce an error signal which modulates the base drive current through a linearly operating FET. The collector base voltage of the power transistor is independently monitored to develop a second error signal which is also used to regulate base drive current. The current-sensitive circuit operates as a limiter. In addition, a fail-safe timing circuit is disclosed which automatically resets to a turn OFF condition in the event the transistor does not turn ON within a predetermined time after the input signal transition. 2 figs.

  1. High-voltage field effect transistors with wide-bandgap β-Ga{sub 2}O{sub 3} nanomembranes

    SciTech Connect

    Hwang, Wan Sik E-mail: djena@nd.edu; Verma, Amit; Protasenko, Vladimir; Rouvimov, Sergei; Xing, Huili; Seabaugh, Alan; Jena, Debdeep E-mail: djena@nd.edu; Peelaers, Hartwin; Van de Walle, Chris; Haensch, Wilfried; Galazka, Zbigniew; Albrecht, Martin; Fornari, Roberto

    2014-05-19

    Nanoscale semiconductor materials have been extensively investigated as the channel materials of transistors for energy-efficient low-power logic switches to enable scaling to smaller dimensions. On the opposite end of transistor applications is power electronics for which transistors capable of switching very high voltages are necessary. Miniaturization of energy-efficient power switches can enable the integration with various electronic systems and lead to substantial boosts in energy efficiency. Nanotechnology is yet to have an impact in this arena. In this work, it is demonstrated that nanomembranes of the wide-bandgap semiconductor gallium oxide can be used as channels of transistors capable of switching high voltages, and at the same time can be integrated on any platform. The findings mark a step towards using lessons learnt in nanomaterials and nanotechnology to address a challenge that yet remains untouched by the field.

  2. Giant amplification of tunnel magnetoresistance in a molecular junction: Molecular spin-valve transistor

    SciTech Connect

    Dhungana, Kamal B.; Pati, Ranjit

    2014-04-21

    Amplification of tunnel magnetoresistance by gate field in a molecular junction is the most important requirement for the development of a molecular spin valve transistor. Herein, we predict a giant amplification of tunnel magnetoresistance in a single molecular spin valve junction, which consists of Ru-bis-terpyridine molecule as a spacer between two ferromagnetic nickel contacts. Based on the first-principles quantum transport approach, we show that a modest change in the gate field that is experimentally accessible can lead to a substantial amplification (320%) of tunnel magnetoresistance. The origin of such large amplification is attributed to the spin dependent modification of orbitals at the molecule-lead interface and the resultant Stark effect induced shift in channel position with respect to the Fermi energy.

  3. In situ electrical characterization of palladium-based single electron transistors made by electromigration technique

    SciTech Connect

    Arzubiaga, L.; Llopis, R.; Golmar, F.; Casanova, F.; Hueso, L. E.

    2014-11-15

    We report the fabrication of single electron transistors (SETs) by feedback-controlled electromigration of palladium and palladium-nickel alloy nanowires. We have optimized a gradual electromigration process for obtaining devices consisting of three terminals (source, drain and gate electrodes), which are capacitively coupled to a metallic cluster of nanometric dimensions. This metal nanocluster forms into the inter-electrode channel during the electromigration process and constitutes the active element of each device, acting as a quantum dot that rules the electron flow between source and drain electrodes. The charge transport of the as-fabricated devices shows Coulomb blockade characteristics and the source to drain conductance can be modulated by electrostatic gating. We have thus achieved the fabrication and in situ measurement of palladium-based SETs inside a liquid helium cryostat chamber.

  4. Compact gate valve

    DOEpatents

    Bobo, Gerald E.

    1977-01-01

    This invention relates to a double-disc gate valve which is compact, comparatively simple to construct, and capable of maintaining high closing pressures on the valve discs with low frictional forces. The valve casing includes axially aligned ports. Mounted in the casing is a sealed chamber which is pivotable transversely of the axis of the ports. The chamber contains the levers for moving the valve discs axially, and an actuator for the levers. When an external drive means pivots the chamber to a position where the discs are between the ports and axially aligned therewith, the actuator for the levers is energized to move the discs into sealing engagement with the ports.

  5. ONE SHAKE GATE FORMER

    DOEpatents

    Kalibjian, R.; Perez-Mendez, V.

    1957-08-20

    An improved circuit for forming square pulses having substantially short and precise durations is described. The gate forming circuit incorporates a secondary emission R. F. pentode adapted to receive input trigger pulses amd having a positive feedback loop comnected from the dynode to the control grid to maintain conduction in response to trigger pulses. A short circuited pulse delay line is employed to precisely control the conducting time of the tube and a circuit for squelching spurious oscillations is provided in the feedback loop.

  6. Silicon field-effect transistors as radiation detectors for the Sub-THz range

    SciTech Connect

    But, D. B. Golenkov, O. G.; Sakhno, N. V.; Sizov, F. F.; Korinets, S. V.; Gumenjuk-Sichevska, J. V.; Reva, V. P.; Bunchuk, S. G.

    2012-05-15

    The nonresonance response of silicon metal-oxide-semiconductor field-effect transistors (Si-MOSFETs) with a long channel (1-20 {mu}m) to radiation in the frequency range 43-135 GHz is studied. The transistors are fabricated by the standard CMOS technology with 1-{mu}m design rules. The volt-watt sensitivity and the noise equivalent power (NEP) for such detectors are estimated with the calculated effective area of the detecting element taken into account. It is shown that such transistors can operate at room temperature as broadband direct detectors of sub-THz radiation. In the 4-5 mm range of wavelengths, the volt-watt sensitivity can be as high as tens of kV/W and the NEP can amount to 10{sup -11} - 10{sup -12}W/{radical}Hz . The parameters of detectors under study can be improved by the optimization of planar antennas.

  7. Penn State DOE GATE Program

    SciTech Connect

    Anstrom, Joel

    2012-08-31

    The Graduate Automotive Technology Education (GATE) Program at The Pennsylvania State University (Penn State) was established in October 1998 pursuant to an award from the U.S. Department of Energy (U.S. DOE). The focus area of the Penn State GATE Program is advanced energy storage systems for electric and hybrid vehicles.

  8. Method for producing silicon thin-film transistors with enhanced forward current drive

    DOEpatents

    Weiner, Kurt H.

    1998-01-01

    A method for fabricating amorphous silicon thin film transistors (TFTs) with a polycrystalline silicon surface channel region for enhanced forward current drive. The method is particularly adapted for producing top-gate silicon TFTs which have the advantages of both amorphous and polycrystalline silicon TFTs, but without problem of leakage current of polycrystalline silicon TFTs. This is accomplished by selectively crystallizing a selected region of the amorphous silicon, using a pulsed excimer laser, to create a thin polycrystalline silicon layer at the silicon/gate-insulator surface. The thus created polysilicon layer has an increased mobility compared to the amorphous silicon during forward device operation so that increased drive currents are achieved. In reverse operation the polysilicon layer is relatively thin compared to the amorphous silicon, so that the transistor exhibits the low leakage currents inherent to amorphous silicon. A device made by this method can be used, for example, as a pixel switch in an active-matrix liquid crystal display to improve display refresh rates.

  9. Method for producing silicon thin-film transistors with enhanced forward current drive

    DOEpatents

    Weiner, K.H.

    1998-06-30

    A method is disclosed for fabricating amorphous silicon thin film transistors (TFTs) with a polycrystalline silicon surface channel region for enhanced forward current drive. The method is particularly adapted for producing top-gate silicon TFTs which have the advantages of both amorphous and polycrystalline silicon TFTs, but without problem of leakage current of polycrystalline silicon TFTs. This is accomplished by selectively crystallizing a selected region of the amorphous silicon, using a pulsed excimer laser, to create a thin polycrystalline silicon layer at the silicon/gate-insulator surface. The thus created polysilicon layer has an increased mobility compared to the amorphous silicon during forward device operation so that increased drive currents are achieved. In reverse operation the polysilicon layer is relatively thin compared to the amorphous silicon, so that the transistor exhibits the low leakage currents inherent to amorphous silicon. A device made by this method can be used, for example, as a pixel switch in an active-matrix liquid crystal display to improve display refresh rates. 1 fig.

  10. Method of fabrication of display pixels driven by silicon thin film transistors

    DOEpatents

    Carey, Paul G.; Smith, Patrick M.

    1999-01-01

    Display pixels driven by silicon thin film transistors are fabricated on plastic substrates for use in active matrix displays, such as flat panel displays. The process for forming the pixels involves a prior method for forming individual silicon thin film transistors on low-temperature plastic substrates. Low-temperature substrates are generally considered as being incapable of withstanding sustained processing temperatures greater than about 200.degree. C. The pixel formation process results in a complete pixel and active matrix pixel array. A pixel (or picture element) in an active matrix display consists of a silicon thin film transistor (TFT) and a large electrode, which may control a liquid crystal light valve, an emissive material (such as a light emitting diode or LED), or some other light emitting or attenuating material. The pixels can be connected in arrays wherein rows of pixels contain common gate electrodes and columns of pixels contain common drain electrodes. The source electrode of each pixel TFT is connected to its pixel electrode, and is electrically isolated from every other circuit element in the pixel array.

  11. Thermal Transistor for Energy Smart Buildings

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    Thermal Transistor for Energy Smart Buildings Thermal Transistor for Energy Smart Buildings Assumptions & Limitations: * Current LANL prototype: ~50 cm 2 active area. Assume it can be scaled to sq.ft size relevant for applications * Switching requires ~200 Volts but only draws a few µA. The associated drive electronics comprises only off-the- shelf components. Thermally adaptive devices and systems may be a game changer in energy efficiency, buildings and beyond: * Thermally agile walls can

  12. Gate Solar | Open Energy Information

    OpenEI (Open Energy Information) [EERE & EIA]

    Spain Sector: Solar Product: JV set up for the promotion, exploitation and sale of photovoltaic solar power plants. References: Gate Solar1 This article is a stub. You can help...

  13. Low temperature thin film transistors with hollow cathode plasma-assisted atomic layer deposition based GaN channels

    SciTech Connect

    Bolat, S. E-mail: aokyay@ee.bilkent.edu.tr; Tekcan, B.; Ozgit-Akgun, C.; Biyikli, N.; Okyay, A. K. E-mail: aokyay@ee.bilkent.edu.tr

    2014-06-16

    We report GaN thin film transistors (TFT) with a thermal budget below 250?C. GaN thin films are grown at 200?C by hollow cathode plasma-assisted atomic layer deposition (HCPA-ALD). HCPA-ALD-based GaN thin films are found to have a polycrystalline wurtzite structure with an average crystallite size of 9.3?nm. TFTs with bottom gate configuration are fabricated with HCPA-ALD grown GaN channel layers. Fabricated TFTs exhibit n-type field effect characteristics. N-channel GaN TFTs demonstrated on-to-off ratios (I{sub ON}/I{sub OFF}) of 10{sup 3} and sub-threshold swing of 3.3?V/decade. The entire TFT device fabrication process temperature is below 250?C, which is the lowest process temperature reported for GaN based transistors, so far.

  14. Latest design of gate valves

    SciTech Connect

    Kurzhofer, U.; Stolte, J.; Weyand, M.

    1996-12-01

    Babcock Sempell, one of the most important valve manufacturers in Europe, has delivered valves for the nuclear power industry since the beginning of the peaceful application of nuclear power in the 1960s. The latest innovation by Babcock Sempell is a gate valve that meets all recent technical requirements of the nuclear power technology. At the moment in the United States, Germany, Sweden, and many other countries, motor-operated gate and globe valves are judged very critically. Besides the absolute control of the so-called {open_quotes}trip failure,{close_quotes} the integrity of all valve parts submitted to operational forces must be maintained. In case of failure of the limit and torque switches, all valve designs have been tested with respect to the quality of guidance of the gate. The guidances (i.e., guides) shall avoid a tilting of the gate during the closing procedure. The gate valve newly designed by Babcock Sempell fulfills all these characteristic criteria. In addition, the valve has cobalt-free seat hardfacing, the suitability of which has been proven by friction tests as well as full-scale blowdown tests at the GAP of Siemens in Karlstein, West Germany. Babcock Sempell was to deliver more than 30 gate valves of this type for 5 Swedish nuclear power stations by autumn 1995. In the presentation, the author will report on the testing performed, qualifications, and sizing criteria which led to the new technical design.

  15. Single molecule transistor based nanopore for the detection of nicotine

    SciTech Connect

    Ray, S. J.

    2014-12-28

    A nanopore based detection methodology was proposed and investigated for the detection of Nicotine. This technique uses a Single Molecular Transistor working as a nanopore operational in the Coulomb Blockade regime. When the Nicotine molecule is pulled through the nanopore area surrounded by the Source(S), Drain (D), and Gate electrodes, the charge stability diagram can detect the presence of the molecule and is unique for a specific molecular structure. Due to the weak coupling between the different electrodes which is set by the nanopore size, the molecular energy states stay almost unaffected by the electrostatic environment that can be realised from the charge stability diagram. Identification of different orientation and position of the Nicotine molecule within the nanopore area can be made from specific regions of overlap between different charge states on the stability diagram that could be used as an electronic fingerprint for detection. This method could be advantageous and useful to detect the presence of Nicotine in smoke which is usually performed using chemical chromatography techniques.

  16. Graphene nanopore field effect transistors

    SciTech Connect

    Qiu, Wanzhi; Skafidas, Efstratios

    2014-07-14

    Graphene holds great promise for replacing conventional Si material in field effect transistors (FETs) due to its high carrier mobility. Previously proposed graphene FETs either suffer from low ON-state current resulting from constrained channel width or require complex fabrication processes for edge-defecting or doping. Here, we propose an alternative graphene FET structure created on intrinsic metallic armchair-edged graphene nanoribbons with uniform width, where the channel region is made semiconducting by drilling a pore in the interior, and the two ends of the nanoribbon act naturally as connecting electrodes. The proposed GNP-FETs have high ON-state currents due to seamless atomic interface between the channel and electrodes and are able to be created with arbitrarily wide ribbons. In addition, the performance of GNP-FETs can be tuned by varying pore size and ribbon width. As a result, their performance and fabrication process are more predictable and controllable in comparison to schemes based on edge-defects and doping. Using first-principle transport calculations, we show that GNP-FETs can achieve competitive leakage current of ∼70 pA, subthreshold swing of ∼60 mV/decade, and significantly improved On/Off current ratios on the order of 10{sup 5} as compared with other forms of graphene FETs.

  17. Air-gap gating of MgZnO/ZnO heterostructures

    SciTech Connect

    Tambo, T.; Falson, J. Kozuka, Y.; Maryenko, D.; Tsukazaki, A.; Kawasaki, M.

    2014-08-28

    The adaptation of air-gap dielectric based field-effect transistor technology to controlling the MgZnO/ZnO heterointerface confined two-dimensional electron system (2DES) is reported. We find it possible to tune the charge density of the 2DES via a gate electrode spatially separated from the heterostructure surface by a distance of 5??m. Under static gating, the observation of the quantum Hall effect suggests that the charge carrier density remains homogeneous, with the 2DES in the 3?mm square sample the sole conductor. The availability of this technology enables the exploration of the charge carrier density degree of freedom in the pristine sample limit.

  18. Gate-tunable gigantic lattice deformation in VO{sub 2}

    SciTech Connect

    Okuyama, D. E-mail: nakano@imr.tohoku.ac.jp Hatano, T.; Nakano, M. E-mail: nakano@imr.tohoku.ac.jp; Takeshita, S.; Ohsumi, H.; Tardif, S.; Shibuya, K.; Yumoto, H.; Koyama, T.; Ohashi, H.; Takata, M.; Kawasaki, M.; Tokura, Y.; Iwasa, Y. E-mail: nakano@imr.tohoku.ac.jp; Arima, T.

    2014-01-13

    We examined the impact of electric field on crystal lattice of vanadium dioxide (VO{sub 2}) in a field-effect transistor geometry by in-situ synchrotron x-ray diffraction measurements. Whereas the c-axis lattice parameter of VO{sub 2} decreases through the thermally induced insulator-to-metal phase transition, the gate-induced metallization was found to result in a significant increase of the c-axis length by almost 1% from that of the thermally stabilized insulating state. We also found that this gate-induced gigantic lattice deformation occurs even at the thermally stabilized metallic state, enabling dynamic control of c-axis lattice parameter by more than 1% at room temperature.

  19. Antiferromagnetic Spin Wave Field-Effect Transistor (Journal...

    Office of Scientific and Technical Information (OSTI)

    Antiferromagnetic Spin Wave Field-Effect Transistor Citation Details ... Type: Accepted Manuscript Journal Name: Scientific Reports Additional Journal Information: ...

  20. High Accuracy Transistor Compact Model Calibrations

    SciTech Connect

    Hembree, Charles E.; Mar, Alan; Robertson, Perry J.

    2015-09-01

    Typically, transistors are modeled by the application of calibrated nominal and range models. These models consists of differing parameter values that describe the location and the upper and lower limits of a distribution of some transistor characteristic such as current capacity. Correspond- ingly, when using this approach, high degrees of accuracy of the transistor models are not expected since the set of models is a surrogate for a statistical description of the devices. The use of these types of models describes expected performances considering the extremes of process or transistor deviations. In contrast, circuits that have very stringent accuracy requirements require modeling techniques with higher accuracy. Since these accurate models have low error in transistor descriptions, these models can be used to describe part to part variations as well as an accurate description of a single circuit instance. Thus, models that meet these stipulations also enable the calculation of quantifi- cation of margins with respect to a functional threshold and uncertainties in these margins. Given this need, new model high accuracy calibration techniques for bipolar junction transis- tors have been developed and are described in this report.

  1. Self-protecting transistor oscillator for treating animal tissues

    DOEpatents

    Doss, James D.

    1980-01-01

    A transistor oscillator circuit wherein the load current applied to animal tissue treatment electrodes is fed back to the transistor. Removal of load is sensed to automatically remove feedback and stop oscillations. A thermistor on one treatment electrode senses temperature, and by means of a control circuit controls oscillator transistor current.

  2. Stretchable transistors with buckled carbon nanotube films as conducting channels

    DOEpatents

    Arnold, Michael S; Xu, Feng

    2015-03-24

    Thin-film transistors comprising buckled films comprising carbon nanotubes as the conductive channel are provided. Also provided are methods of fabricating the transistors. The transistors, which are highly stretchable and bendable, exhibit stable performance even when operated under high tensile strains.

  3. Ultra-low noise high electron mobility transistors for high-impedance and low-frequency deep cryogenic readout electronics

    SciTech Connect

    Dong, Q.; Liang, Y. X.; Ferry, D.; Cavanna, A.; Gennser, U.; Couraud, L.; Jin, Y.

    2014-07-07

    We report on the results obtained from specially designed high electron mobility transistors at 4.2?K: the gate leakage current can be limited lower than 1 aA, and the equivalent input noise-voltage and noise-current at 1?Hz can reach 6.3 nV/Hz{sup 1?2} and 20 aA/Hz{sup 1?2}, respectively. These results open the way to realize high performance low-frequency readout electronics under very low-temperature conditions.

  4. Magnetic field effect on the terahertz emission from nanometer InGaAs/AlInAs high electron mobility transistors

    SciTech Connect

    Dyakonova, N.; Teppe, F.; Lusakowski, J.; Knap, W.; Levinshtein, M.; Dmitriev, A.P.; Shur, M.S.; Bollaert, S.; Cappy, A.

    2005-06-01

    The influence of the magnetic field on the excitation of plasma waves in InGaAs/AlInAs lattice matched high electron mobility transistors is reported. The threshold source-drain voltage of the excitation of the terahertz emission shifts to higher values under a magnetic field increasing from 0 to 6 T. We show that the main change of the emission threshold in relatively low magnetic fields (smaller than approximately 4 T) is due to the magnetoresistance of the ungated parts of the channel. In higher magnetic fields, the effect of the magnetic field on the gated region of the device becomes important.

  5. High-Performance Organic Field-Effect Transistors with Dielectric and Active Layers Printed Sequentially by Ultrasonic Spraying

    SciTech Connect

    Shao, Ming [ORNL; Sanjib, Das [University of Tennessee, Knoxville (UTK); Chen, Jihua [ORNL; Keum, Jong Kahk [ORNL; Ivanov, Ilia N [ORNL; Gu, Gong [University of Tennessee, Knoxville (UTK); Geohegan, David B [ORNL; Xiao, Kai [ORNL

    2013-01-01

    High-performance, flexible organic field-effect transistors (OFETs) are reported with PVP dielectric and TIPS-PEN active layers sequentially deposited by ultrasonic spray-coating on plastic substrate. OFETs fabricated in ambient air with a bottom-gate/top-contact geometry are shown to achieve on/off ratios of >104 and mobilities as high as 0.35 cm2/Vs. These rival the characteristics of the best solution-processible small molecule FETs fabricated by other fabrication methods such as drop casting and ink-jet printing.

  6. Structural and electrical characterization of CoTiN metal gates

    SciTech Connect

    Wongpiya, Ranida; Ouyang, Jiaomin; Chung, Chia-Jung; Duong, Duc T.; Clemens, Bruce; Deal, Michael; Nishi, Yoshio

    2015-02-21

    As the gate size continues to decrease in nanoscale transistors, having metal gates with amorphous or near amorphous structures can potentially reduce grain-induced work function variation. Furthermore, amorphous materials are known to have superior diffusion barrier properties, which can help prevent work function change due to the diffusion of metals in contact with the gate. In this work we show that with the addition of cobalt, thin films of polycrystalline TiN become more amorphous with a smaller grain size. Co{sub x}(TiN){sub 1-x} films, where x?=?6080%, appear to consist of nanocrystals embedded in an amorphous matrix, and are thermally stable with no significant crystallization up to an annealing temperature of at least 600?C. Reducing the nitrogen gas flow ratio during sputter deposition from 9% to 2.5% further decreases the films' crystallinity, which is apparent by more sparse and even smaller nanocrystals. In addition to being partially amorphous, these CoTiN films also exhibit good thermal stability, low resistivity, low roughness, and have the potential for atomic layer deposition compatibility. Even though these materials are not completely amorphous, their small crystal size and amorphous matrix can potentially reduce work function variation and improve their diffusion barrier property. These properties make CoTiN a good candidate as a gate material for future nanoelectronic devices and technology.

  7. Comparative investigation of InGaP/GaAs pseudomorphic field-effect transistors with triple doped-channel profiles

    SciTech Connect

    Tsai, Jung-Hui; Guo, Der-Feng; Lour, Wen-Shiung

    2011-09-15

    In this article, the comparison of DC performance on InGaP/GaAs pseudomorphic field-effect transistors with tripe doped-channel profiles is demonstrated. As compared to the uniform and high-medium-low doped-channel devices, the low-medium-high doped-channel device exhibits the broadest gate voltage swing and the best device linearity because more twodimensional electron gases are formed in the heaviest doped channel to enhance the magnitude of negative threshold voltage. Experimentally, the transconductance within 50% of its maximum value for gate voltage swing is 4.62 V in the low-medium-high doped-channel device, which is greater than 3.58 (3.30) V in the uniform (high-medium-low) doped-channel device.

  8. Wide-bandgap high-mobility ZnO thin-film transistors produced at room temperature

    SciTech Connect

    Fortunato, Elvira M.C.; Barquinha, Pedro M.C.; Pimentel, Ana C.M.B.G.; Goncalves, Alexandra M.F.; Marques, Antonio J.S.; Martins, Rodrigo F.P.; Pereira, Luis M.N.

    2004-09-27

    We report high-performance ZnO thin-film transistor (ZnO-TFT) fabricated by rf magnetron sputtering at room temperature with a bottom gate configuration. The ZnO-TFT operates in the enhancement mode with a threshold voltage of 19 V, a saturation mobility of 27 cm{sup 2}/V s, a gate voltage swing of 1.39 V/decade and an on/off ratio of 3x10{sup 5}. The ZnO-TFT presents an average optical transmission (including the glass substrate) of 80% in the visible part of the spectrum. The combination of transparency, high mobility, and room-temperature processing makes the ZnO-TFT a very promising low-cost optoelectronic device for the next generation of invisible and flexible electronics.

  9. Gate Hours & Services | Stanford Synchrotron Radiation Lightsource

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    Gate Hours & Services Sand Hill Road Main Gate Open 24 hours a day, 7 days a week ... SLAC has proximity card readers at the entrances from Sand Hill Road and Alpine Road as ...

  10. Stage-Gate Innovation Management Guidelines

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Stage-Gate Innovation Management Guidelines Managing risk through structured project decision-making February 2007 Version 1.3 Table of Contents Overview of ITP Stage-Gate Innovation Management........................................................ 1 Background............................................................................................................................................. 1 Process

  11. Radial gate evaluation: Olympus Dam, Colorado

    SciTech Connect

    1997-06-01

    The report presents a structural analysis of the radial gates of Olympus Dam in eastern Colorado. Five 20-foot wide by 17-foot high radial gates are used to control flow through the spillway at Olympus Dam. The spillway gates were designed in 1947. The gate arm assemblies consist of two separate wide flange beams, with a single brace between the arms. The arms pivot about a 4.0-inch diameter pin and bronze graphite-insert bushing. The pin is cantilevered from the pier anchor girder. The radial gates are supported by a pin bearing on a pier anchor birder bolted to the end of the concrete pier. The gates are operated by two-part wire rope 15,000-pound capacity hoise. Stoplog slots upstream of the radial gates are provided in the concrete piers. Selected drawings of the gates and hoists are located in appendix A.

  12. Graduate Automotive Technology Education (GATE) Initiative Awards |

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Department of Energy Graduate Automotive Technology Education (GATE) Initiative Awards Graduate Automotive Technology Education (GATE) Initiative Awards September 8, 2011 - 11:46am Addthis Graduate Automotive Technology Education (GATE) Initiative Awards DOE's Graduate Automotive Technology Education (GATE) initiative will award $6.4 million over the course of five years to support seven Centers of Excellence at American colleges, universities, and university-affiliated research

  13. Dynamic gating window for compensation of baseline shift in respiratory-gated radiation therapy

    SciTech Connect

    Pepin, Eric W.; Wu Huanmei; Shirato, Hiroki

    2011-04-15

    Purpose: To analyze and evaluate the necessity and use of dynamic gating techniques for compensation of baseline shift during respiratory-gated radiation therapy of lung tumors. Methods: Motion tracking data from 30 lung tumors over 592 treatment fractions were analyzed for baseline shift. The finite state model (FSM) was used to identify the end-of-exhale (EOE) breathing phase throughout each treatment fraction. Using duty cycle as an evaluation metric, several methods of end-of-exhale dynamic gating were compared: An a posteriori ideal gating window, a predictive trend-line-based gating window, and a predictive weighted point-based gating window. These methods were evaluated for each of several gating window types: Superior/inferior (SI) gating, anterior/posterior beam, lateral beam, and 3D gating. Results: In the absence of dynamic gating techniques, SI gating gave a 39.6% duty cycle. The ideal SI gating window yielded a 41.5% duty cycle. The weight-based method of dynamic SI gating yielded a duty cycle of 36.2%. The trend-line-based method yielded a duty cycle of 34.0%. Conclusions: Dynamic gating was not broadly beneficial due to a breakdown of the FSM's ability to identify the EOE phase. When the EOE phase was well defined, dynamic gating showed an improvement over static-window gating.

  14. Radiation Tolerance of 65nm CMOS Transistors

    SciTech Connect

    Krohn, M.; Bentele, B.; Christian, D. C.; Cumalat, J. P.; Deptuch, G.; Fahim, F.; Hoff, J.; Shenai, A.; Wagner, S. R.

    2015-12-11

    We report on the effects of ionizing radiation on 65 nm CMOS transistors held at approximately -20C during irradiation. The pattern of damage observed after a total dose of 1 Grad is similar to damage reported in room temperature exposures, but we observe less damage than was observed at room temperature.

  15. Radiation Tolerance of 65nm CMOS Transistors

    DOE PAGES [OSTI]

    Krohn, M.; Bentele, B.; Christian, D. C.; Cumalat, J. P.; Deptuch, G.; Fahim, F.; Hoff, J.; Shenai, A.; Wagner, S. R.

    2015-12-11

    We report on the effects of ionizing radiation on 65 nm CMOS transistors held at approximately -20°C during irradiation. The pattern of damage observed after a total dose of 1 Grad is similar to damage reported in room temperature exposures, but we observe less damage than was observed at room temperature.

  16. Gallium nitride junction field-effect transistor

    DOEpatents

    Zolper, J.C.; Shul, R.J.

    1999-02-02

    An ion implanted gallium-nitride (GaN) junction field-effect transistor (JFET) and method of making the same are disclosed. Also disclosed are various ion implants, both n- and p-type, together with or without phosphorus co-implantation, in selected III-V semiconductor materials. 19 figs.

  17. Gallium nitride junction field-effect transistor

    DOEpatents

    Zolper, John C.; Shul, Randy J.

    1999-01-01

    An all-ion implanted gallium-nitride (GaN) junction field-effect transistor (JFET) and method of making the same. Also disclosed are various ion implants, both n- and p-type, together with or without phosphorous co-implantation, in selected III-V semiconductor materials.

  18. Double-disc gate valve

    DOEpatents

    Wheatley, Seth J.

    1979-01-01

    This invention relates to an improvement in a conventional double-disc gate valve having a vertically movable gate assembly including a wedge, spreaders slidably engaged therewtih, a valve disc carried by the spreaders. When the gate assembly is lowered to a selected point in the valve casing, the valve discs are moved transversely outward to close inlet and outlet ports in the casing. The valve includes hold-down means for guiding the disc-and-spreader assemblies as they are moved transversely outward and inward. If such valves are operated at relatively high differential pressures, they sometimes jam during opening. Such jamming has been a problem for many years in gate valves used in gaseous diffusion plants for the separtion of uranium isotopes. The invention is based on the finding that the above-mentioned jamming results when the outlet disc tilts about its horizontal axis in a certain way during opening of the valve. In accordance with the invention, tilting of the outlet disc is maintained at a tolerable value by providing the disc with a rigid downwardly extending member and by providing the casing with a stop for limiting inward arcuate movement of the member to a preselected value during opening of the valve.

  19. Impact of La{sub 2}O{sub 3} interfacial layers on InGaAs metal-oxide-semiconductor interface properties in Al{sub 2}O{sub 3}/La{sub 2}O{sub 3}/InGaAs gate stacks deposited by atomic-layer-deposition

    SciTech Connect

    Chang, C.-Y. Takenaka, M.; Takagi, S.; Ichikawa, O.; Osada, T.; Hata, M.; Yamada, H.

    2015-08-28

    We examine the electrical properties of atomic layer deposition (ALD) La{sub 2}O{sub 3}/InGaAs and Al{sub 2}O{sub 3}/La{sub 2}O{sub 3}/InGaAs metal-oxide-semiconductor (MOS) capacitors. It is found that the thick ALD La{sub 2}O{sub 3}/InGaAs interface provides low interface state density (D{sub it}) with the minimum value of ∼3 × 10{sup 11} cm{sup −2} eV{sup −1}, which is attributable to the excellent La{sub 2}O{sub 3} passivation effect for InGaAs surfaces. It is observed, on the other hand, that there are a large amount of slow traps and border traps in La{sub 2}O{sub 3}. In order to simultaneously satisfy low D{sub it} and small hysteresis, the effectiveness of Al{sub 2}O{sub 3}/La{sub 2}O{sub 3}/InGaAs gate stacks with ultrathin La{sub 2}O{sub 3} interfacial layers is in addition evaluated. The reduction of the La{sub 2}O{sub 3} thickness to 0.4 nm in Al{sub 2}O{sub 3}/La{sub 2}O{sub 3}/InGaAs gate stacks leads to the decrease in hysteresis. On the other hand, D{sub it} of the Al{sub 2}O{sub 3}/La{sub 2}O{sub 3}/InGaAs interfaces becomes higher than that of the La{sub 2}O{sub 3}/InGaAs ones, attributable to the diffusion of Al{sub 2}O{sub 3} through La{sub 2}O{sub 3} into InGaAs and resulting modification of the La{sub 2}O{sub 3}/InGaAs interface structure. As a result of the effective passivation effect of La{sub 2}O{sub 3} on InGaAs, however, the Al{sub 2}O{sub 3}/10 cycle (0.4 nm) La{sub 2}O{sub 3}/InGaAs gate stacks can realize still lower D{sub it} with maintaining small hysteresis and low leakage current than the conventional Al{sub 2}O{sub 3}/InGaAs MOS interfaces.

  20. Highly efficient conductance control in a topological insulator based magnetoelectric transistor

    SciTech Connect

    Duan, Xiaopeng; Li, Xi-Lai; Li, Xiaodong; Semenov, Yuriy G.; Kim, Ki Wook

    2015-12-14

    The spin-momentum interlocked properties of the topological insulator (TI) surface states are exploited in a transistor-like structure for efficient conductance control in the TI-magnet system. Combined with the electrically induced magnetization rotation as part of the gate function, the proposed structure takes advantage of the magnetically modulated TI electronic band dispersion in addition to the conventional electrostatic barrier. The transport analysis coupled with the magnetic simulation predicts super-steep current-voltage characteristics near the threshold along with the GHz operating frequencies. Potential implementation to a complementary logic is also examined. The predicted characteristics are most suitable for applications requiring low power or those with small signals.

  1. Random telegraph signals by alkanethiol-protected Au nanoparticles in chemically assembled single-electron transistors

    SciTech Connect

    Kano, Shinya; Azuma, Yasuo; Tanaka, Daisuke; Sakamoto, Masanori; Teranishi, Toshiharu; Smith, Luke W.; Smith, Charles G.; Majima, Yutaka

    2013-12-14

    We have studied random telegraph signals (RTSs) in a chemically assembled single-electron transistor (SET) at temperatures as low as 300 mK. The RTSs in the chemically assembled SET were investigated by measuring the sourcedrain current, using a histogram of the RTS dwell time, and calculating the power spectrum density of the drain currenttime characteristics. It was found that the dwell time of the RTS was dependent on the drain voltage of the SET, but was independent of the gate voltage. Considering the spatial structure of the chemically assembled SET, the origin of the RTS is attributed to the trapped charges on an alkanethiol-protected Au nanoparticle positioned near the SET. These results are important as they will help to realize stable chemically assembled SETs in practical applications.

  2. Microscopic origin of low frequency noise in MoS{sub 2} field-effect transistors

    SciTech Connect

    Ghatak, Subhamoy; Jain, Manish; Ghosh, Arindam; Mukherjee, Sumanta; Sarma, D. D.

    2014-09-01

    We report measurement of low frequency 1/f noise in molybdenum di-sulphide (MoS{sub 2}) field-effect transistors in multiple device configurations including MoS{sub 2} on silicon dioxide as well as MoS{sub 2}-hexagonal boron nitride (hBN) heterostructures. All as-fabricated devices show similar magnitude of noise with number fluctuation as the dominant mechanism at high temperatures and density, although the calculated density of traps is two orders of magnitude higher than that at the SiO{sub 2} interface. Measurements on the heterostructure devices with vacuum annealing and dual gated configuration reveals that along with the channel, metal-MoS{sub 2} contacts also play a significant role in determining noise magnitude in these devices.

  3. Field-effect transistor having a superlattice channel and high carrier velocities at high applied fields

    DOEpatents

    Chaffin, R.J.; Dawson, L.R.; Fritz, I.J.; Osbourn, G.C.; Zipperian, T.E.

    1987-06-08

    A field effect transistor comprises a semiconductor having a source, a drain, a channel and a gate in operational relationship. The semiconductor is a strained layer superlattice comprising alternating quantum well and barrier layers, the quantum well layers and barrier layers being selected from the group of layer pairs consisting of InGaAs/AlGaAs, InAs/InAlGaAs, and InAs/InAlAsP. The layer thicknesses of the quantum well and barrier layers are sufficiently thin that the alternating layers constitute a superlattice which has a superlattice conduction band energy level structure in k-vector space. The layer thicknesses of the quantum well layers are selected to provide a superlattice L/sub 2D/-valley which has a shape which is substantially more two-dimensional than that of said bulk L-valley. 2 figs.

  4. Examination of hot-carrier stress induced degradation on fin field-effect transistor

    SciTech Connect

    Yang, Yi-Lin Yen, Tzu-Sung; Ku, Chao-Chen; Wu, Tai-Hsuan; Wang, Tzuo-Li; Li, Chien-Yi; Wu, Bing-Tze; Zhang, Wenqi; Hong, Jia-Jian; Wong, Jie-Chen; Yeh, Wen-Kuan; Lin, Shih-Hung

    2014-02-24

    Degradation in fin field-effect transistor devices was investigated in detail under various hot-carrier stress conditions. The threshold voltage (V{sub TH}) shift, substrate current (I{sub B}), and subthreshold swing were extracted to determine the degradation of a device. The power-law time exponent of the V{sub TH} shift was largest at V{sub G}?=?0.3 V{sub D}, indicating that the V{sub TH} shift was dominated by interface state generation. Although the strongest impact ionization occurred at V{sub G}?=?V{sub D}, the V{sub TH} shift was mainly caused by electron trapping resulting from a large gate leakage current.

  5. Manipulation of transport hysteresis on graphene field effect transistors with Ga ion irradiation

    SciTech Connect

    Wang, Quan, E-mail: wangq@mail.ujs.edu.cn [School of Mechanical Engineering, Jiangsu University, Zhenjiang 212013 (China); State Key Laboratory of Transducer Technology, Chinese Academy of Sciences, Shanghai 200050 (China); Liu, Shuai; Ren, Naifei [School of Mechanical Engineering, Jiangsu University, Zhenjiang 212013 (China)

    2014-09-29

    We have studied the effect of Ga ion irradiation on the controllable hysteretic behavior of graphene field effect transistors fabricated on Si/SO{sub 2} substrates. The various densities of defects in graphene were monitored by Raman spectrum. It was found that the Dirac point shifted to the positive gate voltage constantly, while the hysteretic behavior was enhanced first and then weakened, with the dose of ion irradiation increasing. By contrasting the trap charges density induced by dopant and the total density of effective trap charges, it demonstrated that adsorbate doping was not the decisive factor that induced the hysteretic behavior. The tunneling between the defect sites induced by ion irradiation was also an important cause for the hysteresis.

  6. GaSb molecular beam epitaxial growth on p-InP(001) and passivation with in situ deposited Al{sub 2}O{sub 3} gate oxide

    SciTech Connect

    Merckling, C.; Brammertz, G.; Hoffmann, T. Y.; Caymax, M.; Dekoster, J.; Sun, X.; Alian, A.; Heyns, M.; Afanas'ev, V. V.

    2011-04-01

    The integration of high carrier mobility materials into future CMOS generations is presently being studied in order to increase drive current capability and to decrease power consumption in future generation CMOS devices. If III-V materials are the candidates of choice for n-type channel devices, antimonide-based semiconductors present high hole mobility and could be used for p-type channel devices. In this work we first demonstrate the heteroepitaxy of fully relaxed GaSb epilayers on InP(001) substrates. In a second part, the properties of the Al{sub 2}O{sub 3}/GaSb interface have been studied by in situ deposition of an Al{sub 2}O{sub 3} high-{kappa} gate dielectric. The interface is abrupt without any substantial interfacial layer, and is characterized by high conduction and valence band offsets. Finally, MOS capacitors show well-behaved C-V with relatively low D{sub it} along the bandgap, these results point out an efficient electrical passivation of the Al{sub 2}O{sub 3}/GaSb interface.

  7. Position sensitivity of graphene field effect transistors to X-rays

    SciTech Connect

    Cazalas, Edward Moore, Michael E.; Jovanovic, Igor; Sarker, Biddut K.; Childres, Isaac; Chen, Yong P.

    2015-06-01

    Device architectures that incorporate graphene to realize detection of electromagnetic radiation typically utilize the direct absorbance of radiation by graphene. This limits their effective area to the size of the graphene and their applicability to lower-energy, less penetrating forms of radiation. In contrast, graphene-based transistor architectures that utilize the field effect as the detection mechanism can be sensitive to interactions of radiation not only with graphene but also with the surrounding substrate. Here, we report the study of the position sensitivity and response of a graphene-based field effect transistor (GFET) to penetrating, well-collimated radiation (micro-beam X-rays), producing ionization in the substrate primarily away from graphene. It is found that responsivity and response speed are strongly dependent on the X-ray beam distance from graphene and the gate voltage applied to the GFET. To develop an understanding of the spatially dependent response, a model is developed that incorporates the volumetric charge generation, transport, and recombination. The model is in good agreement with the observed spatial response characteristics of the GFET and predicts a greater response potential of the GFET to radiation interacting near its surface. The study undertaken provides the necessary insight into the volumetric nature of the GFET response, essential for development of GFET-based detectors for more penetrating forms of ionizing radiation.

  8. Research Update: Molecular electronics: The single-molecule switch and transistor

    SciTech Connect

    Sotthewes, Kai; Heimbuch, René Kumar, Avijit; Zandvliet, Harold J. W.; Geskin, Victor

    2014-01-01

    In order to design and realize single-molecule devices it is essential to have a good understanding of the properties of an individual molecule. For electronic applications, the most important property of a molecule is its conductance. Here we show how a single octanethiol molecule can be connected to macroscopic leads and how the transport properties of the molecule can be measured. Based on this knowledge we have realized two single-molecule devices: a molecular switch and a molecular transistor. The switch can be opened and closed at will by carefully adjusting the separation between the electrical contacts and the voltage drop across the contacts. This single-molecular switch operates in a broad temperature range from cryogenic temperatures all the way up to room temperature. Via mechanical gating, i.e., compressing or stretching of the octanethiol molecule, by varying the contact's interspace, we are able to systematically adjust the conductance of the electrode-octanethiol-electrode junction. This two-terminal single-molecule transistor is very robust, but the amplification factor is rather limited.

  9. Exploring graphene field effect transistor devices to improve...

    Office of Scientific and Technical Information (OSTI)

    Exploring graphene field effect transistor devices to improve spectral resolution of semiconductor radiation detectors Citation Details In-Document Search Title: Exploring graphene ...

  10. Npn double heterostructure bipolar transistor with ingaasn base region

    DOEpatents

    Chang, Ping-Chih; Baca, Albert G.; Li, Nein-Yi; Hou, Hong Q.; Ashby, Carol I. H.

    2004-07-20

    An NPN double heterostructure bipolar transistor (DHBT) is disclosed with a base region comprising a layer of p-type-doped indium gallium arsenide nitride (InGaAsN) sandwiched between n-type-doped collector and emitter regions. The use of InGaAsN for the base region lowers the transistor turn-on voltage, V.sub.on, thereby reducing power dissipation within the device. The NPN transistor, which has applications for forming low-power electronic circuitry, is formed on a gallium arsenide (GaAs) substrate and can be fabricated at commercial GaAs foundries. Methods for fabricating the NPN transistor are also disclosed.

  11. Can p-channel tunnel field-effect transistors perform as good as n-channel?

    SciTech Connect

    Verhulst, A. S. Pourghaderi, M. A.; Collaert, N.; Thean, A. V.-Y.; Verreck, D.; Van de Put, M.; Groeseneken, G.; Sore, B.

    2014-07-28

    We show that bulk semiconductor materials do not allow perfectly complementary p- and n-channel tunnel field-effect transistors (TFETs), due to the presence of a heavy-hole band. When tunneling in p-TFETs is oriented towards the gate-dielectric, field-induced quantum confinement results in a highest-energy subband which is heavy-hole like. In direct-bandgap IIIV materials, the most promising TFET materials, phonon-assisted tunneling to this subband degrades the subthreshold swing and leads to at least 10 smaller on-current than the desired ballistic on-current. This is demonstrated with quantum-mechanical predictions for p-TFETs with tunneling orthogonal to the gate, made out of InP, In{sub 0.53}Ga{sub 0.47}As, InAs, and a modified version of In{sub 0.53}Ga{sub 0.47}As with an artificially increased conduction-band density-of-states. We further show that even if the phonon-assisted current would be negligible, the build-up of a heavy-hole-based inversion layer prevents efficient ballistic tunneling, especially at low supply voltages. For p-TFET, a strongly confined n-i-p or n-p-i-p configuration is therefore recommended, as well as a tensily strained line-tunneling configuration.

  12. Design, fabrication, and analysis of p-channel arsenide/antimonide hetero-junction tunnel transistors

    SciTech Connect

    Rajamohanan, Bijesh Mohata, Dheeraj; Hollander, Matthew; Datta, Suman; Zhu, Yan; Hudait, Mantu; Jiang, Zhengping; Klimeck, Gerhard

    2014-01-28

    In this paper, we demonstrate InAs/GaSb hetero-junction (hetJ) and GaSb homo-junction (homJ) p-channel tunneling field effect transistors (pTFET) employing a low temperature atomic layer deposited high-κ gate dielectric. HetJ pTFET exhibited drive current of 35 μA/μm in comparison to homJ pTFET, which exhibited drive current of 0.3 μA/μm at V{sub DS} = −0.5 V under DC biasing conditions. Additionally, with pulsing of 1 μs gate voltage, hetJ pTFET exhibited enhanced drive current of 85 μA/μm at V{sub DS} = −0.5 V, which is the highest reported in the category of III-V pTFET. Detailed device characterization was performed through analysis of the capacitance-voltage characteristics, pulsed current-voltage characteristics, and x-ray diffraction studies.

  13. Separation of interlayer resistance in multilayer MoS{sub 2} field-effect transistors

    SciTech Connect

    Na, Junhong; Jeong Kim, Yun; Kim, Gyu-Tae; Shin, Minju; Joo, Min-Kyu; Huh, Junghwan; Jong Choi, Hyung; Hyung Shim, Joon

    2014-06-09

    We extracted the interlayer resistance between two layers in multilayer molybdenum disulfide (MoS{sub 2}) field-effect transistors by confirming that contact resistances (R{sub contact}) measured using the four-probe measurements were similar, within ∼30%, to source/drain series resistances (R{sub sd}) measured using the two-probe measurements. R{sub contact} values obtained from gated four-probe measurements exhibited gate voltage dependency. In the two-probe measurements, the Y-function method was applied to obtain the R{sub sd} values. By comparing those two R{sub contact} (∼9.5 kΩ) and R{sub sd} (∼12.3 kΩ) values in strong accumulation regime, we found the rationality that those two values had nearly the same properties, i.e., the Schottky barrier resistances and interlayer resistances. The R{sub sd} values of devices with two-probe source/drain electrodes exhibited thickness dependency due to interlayer resistance changes. The interlayer resistance between two layers was also obtained as ∼2.0 Ω mm.

  14. Gating of the proton-gated ion channel from Gloeobacter violaceus...

    Office of Scientific and Technical Information (OSTI)

    Title: Gating of the proton-gated ion channel from Gloeobacter violaceus at pH 4 as revealed by X-ray crystallography Authors: Gonzalez-Gutierrez, Giovanni ; Cuello, Luis G. ; ...

  15. Bid Decision Gate Reviews | Department of Energy

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Bid Decision Gate Reviews Bid Decision Gate Reviews Presented at the 15th Annual DOE Small Business Forum & Expo by: Tan Wilson, PMP, President of Entellect, LLC Bid Decision Gate Reviews (5.88 MB) More Documents & Publications Proposal Preparedness Revised OMB Circular A-76 (Revised November 14, 2002) Marketing to Win: How to Identify the Real Decision-maker and Tailor Your Message

  16. Doping suppression and mobility enhancement of graphene transistors fabricated using an adhesion promoting dry transfer process

    SciTech Connect

    Cheol Shin, Woo; Hun Mun, Jeong; Yong Kim, Taek; Choi, Sung-Yool; Jin Cho, Byung E-mail: tskim1@kaist.ac.kr; Yoon, Taeshik; Kim, Taek-Soo E-mail: tskim1@kaist.ac.kr

    2013-12-09

    We present the facile dry transfer of graphene synthesized via chemical vapor deposition on copper film to a functional device substrate. High quality uniform dry transfer of graphene to oxidized silicon substrate was achieved by exploiting the beneficial features of a poly(4-vinylphenol) adhesive layer involving a strong adhesion energy to graphene and negligible influence on the electronic and structural properties of graphene. The graphene field effect transistors (FETs) fabricated using the dry transfer process exhibit excellent electrical performance in terms of high FET mobility and low intrinsic doping level, which proves the feasibility of our approach in graphene-based nanoelectronics.

  17. Low temperature carrier transport study of monolayer MoS{sub 2} field effect transistors prepared by chemical vapor deposition under an atmospheric pressure

    SciTech Connect

    Liu, Xinke E-mail: wujing026@gmail.com; He, Jiazhu; Tang, Dan; Lu, Youming; Zhu, Deliang; Liu, Wenjun; Cao, Peijiang; Han, Sun; Liu, Qiang; Wen, Jiao; Yu, Wenjie; Liu, Wenjun; Wu, Jing E-mail: wujing026@gmail.com; He, Zhubing; Ang, Kah-Wee

    2015-09-28

    Large size monolayer Molybdenum disulphide (MoS{sub 2}) was successfully grown by chemical vapor deposition method under an atmospheric pressure. The electrical transport properties of the fabricated back-gate monolayer MoS{sub 2} field effect transistors (FETs) were investigated under low temperatures; a peak field effect mobility of 59 cm{sup 2}V{sup −1}s{sup −1} was achieved. With the assist of Raman measurement under low temperature, this work identified the mobility limiting factor for the monolayer MoS{sub 2} FETs: homopolar phonon scattering under low temperature and electron-polar optical phonon scattering at room temperature.

  18. Two-Input Enzymatic Logic Gates Made Sigmoid by Modifications of the Biocatalytic Reaction Cascades

    SciTech Connect

    Zavalov, Oleksandr; Bocharova, Vera; Halamek, Jan; Halamkova, Lenka; Korkmaz, Sevim; Arugula, Mary; Chinnapareddy, Soujanya; Katz, Evgeny; Privman, Vladimir

    2012-01-01

    Computing based on biochemical processes is a newest rapidly developing field of unconventional information and signal processing. In this paper we present results of our research in the field of biochemical computing and summarize the obtained numerical and experimental data for implementations of the standard two-input OR and AND gates with double-sigmoid shape of the output signal. This form of response was obtained as a function of the two inputs in each of the realized biochemical systems. The enzymatic gate processes in the first system were activated with two chemical inputs and resulted in optically detected chromogen oxidation, which happens when either one or both of the inputs are present. In this case, the biochemical system is functioning as the OR gate. We demonstrate that the addition of a filtering biocatalytic process leads to a considerable reduction of the noise transmission factor and the resulting gate response has sigmoid shape in both inputs. The second system was developed for functioning as an AND gate, where the output signal was activated only by a simultaneous action of two enzymatic biomarkers. This response can be used as an indicator of liver damage, but only if both of these of the inputs are present at their elevated, pathophysiological values of concentrations. A kinetic numerical model was developed and used to estimate the range of parameters for which the experimentally realized logic gate is close to optimal. We also analyzed the system to evaluate its noise-handling properties.

  19. Optimization efforts in gated x-ray intensifiers (Conference...

    Office of Scientific and Technical Information (OSTI)

    Optimization efforts in gated x-ray intensifiers Citation Details In-Document Search Title: Optimization efforts in gated x-ray intensifiers Gated x-ray intensifiers are often ...

  20. Retaining latch for a water pit gate

    DOEpatents

    Beale, Arden R. (Idaho Falls, ID)

    1997-01-01

    A retaining latch for use in a hazardous materials storage or handling facility to adjustably retain a water pit gate in a gate frame. A retaining latch is provided comprising a latch plate which is rotatably mounted to each end of the top of the gate and a recessed opening, formed in the gate frame, for engaging an edge of the latch plate. The latch plate is circular in profile with one side cut away or flat, such that the latch plate is D-shaped. The remaining circular edge of the latch plate comprises steps of successively reduced thickness. The stepped edge of the latch plate fits inside a recessed opening formed in the gate frame. As the latch plate is rotated, alternate steps of the latch plate are engaged by the recessed opening. When the latch plate is rotated such that the flat portion of the latch plate faces the recessed opening in the gate frame, there is no connection between the opening and the latch plate and the gate is unlatched from the gate frame.

  1. Retaining latch for a water pit gate

    DOEpatents

    Beale, A.R.

    1997-11-18

    A retaining latch is described for use in a hazardous materials storage or handling facility to adjustably retain a water pit gate in a gate frame. A retaining latch is provided comprising a latch plate which is rotatably mounted to each end of the top of the gate and a recessed opening, formed in the gate frame, for engaging an edge of the latch plate. The latch plate is circular in profile with one side cut away or flat, such that the latch plate is D-shaped. The remaining circular edge of the latch plate comprises steps of successively reduced thickness. The stepped edge of the latch plate fits inside a recessed opening formed in the gate frame. As the latch plate is rotated, alternate steps of the latch plate are engaged by the recessed opening. When the latch plate is rotated such that the flat portion of the latch plate faces the recessed opening in the gate frame, there is no connection between the opening and the latch plate and the gate is unlatched from the gate frame. 4 figs.

  2. Automatically closing swing gate closure assembly

    DOEpatents

    Chang, Shih-Chih; Schuck, William J.; Gilmore, Richard F.

    1988-01-01

    A swing gate closure assembly for nuclear reactor tipoff assembly wherein the swing gate is cammed open by a fuel element or spacer but is reliably closed at a desired closing rate primarily by hydraulic forces in the absence of a fuel charge.

  3. Repeat-until-success cubic phase gate for universal continuous...

    Office of Scientific and Technical Information (OSTI)

    phase gate for universal continuous-variable quantum computation Citation Details In-Document Search Title: Repeat-until-success cubic phase gate for universal ...

  4. University of Illinois at Urbana-Champaign's GATE Center for...

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Champaign's GATE Center for Advanced Automotive Bio-Fuel Combustion Engines University of Illinois at Urbana-Champaign's GATE Center for Advanced Automotive Bio-Fuel Combustion ...

  5. PENN STATE DOE GRADUATE AUTOMOTIVE TECHNOLOGY EDUCATION (GATE...

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    PENN STATE DOE GRADUATE AUTOMOTIVE TECHNOLOGY EDUCATION (GATE) PROGRAM FOR PENN STATE DOE GRADUATE AUTOMOTIVE TECHNOLOGY EDUCATION (GATE) PROGRAM FOR 2009 DOE Hydrogen Program and ...

  6. Unbalanced edge modes and topological phase transition in gated...

    Office of Scientific and Technical Information (OSTI)

    Unbalanced edge modes and topological phase transition in gated trilayer graphene Title: Unbalanced edge modes and topological phase transition in gated trilayer graphene Authors: ...

  7. Development of Dual-Gated Bilayer Graphene Device Structures...

    Office of Scientific and Technical Information (OSTI)

    Development of Dual-Gated Bilayer Graphene Device Structures. Citation Details In-Document Search Title: Development of Dual-Gated Bilayer Graphene Device Structures. Abstract not ...

  8. AgraGate Carbon Credits Corporation | Open Energy Information

    OpenEI (Open Energy Information) [EERE & EIA]

    AgraGate Carbon Credits Corporation Jump to: navigation, search Name: AgraGate Carbon Credits Corporation Place: Des Moines, Iowa Zip: 50266 Product: Offset aggregators that work...

  9. Method for voltage-gated protein fractionation (Patent) | DOEPatents

    Office of Scientific and Technical Information (OSTI)

    Method for voltage-gated protein fractionation Title: Method for voltage-gated protein fractionation We report unique findings on the voltage dependence of protein exclusion from ...

  10. GATE Center of Excellence in Sustainable Vehicle Systems | Department...

    Energy.gov [DOE] (indexed site)

    More Documents & Publications GATE Center of Excellence in Sustainable Vehicle Systems Vehicle Technologies Office Merit Review 2015: GATE Center of Excellence in Sustainable ...

  11. GATE: Energy Efficient Vehicles for Sustainable Mobility | Department...

    Energy.gov [DOE] (indexed site)

    GATE: Energy Efficient Vehicles for Sustainable Mobility Vehicle Technologies Office Merit Review 2014: GATE: Energy Efficient Vehicles for Sustainable Mobility Vehicle ...

  12. Gate-tunable exchange coupling between cobalt clusters on graphene...

    Office of Scientific and Technical Information (OSTI)

    DOE PAGES Search Results Publisher's Accepted Manuscript: Gate-tunable exchange coupling between cobalt clusters on graphene Title: Gate-tunable exchange coupling between cobalt ...

  13. Locking apparatus for gate valves

    DOEpatents

    Fabyan, Joseph; Williams, Carl W.

    1988-01-01

    A locking apparatus for fluid operated valves having a piston connected to the valve actuator which moves in response to applied pressure within a cylinder housing having a cylinder head, a catch block is secured to the piston, and the cylinder head incorporates a catch pin. Pressure applied to the cylinder to open the valve moves the piston adjacent to the cylinder head where the catch pin automatically engages the catch block preventing futher movement of the piston or premature closure of the valve. Application of pressure to the cylinder to close the valve, retracts the catch pin, allowing the valve to close. Included are one or more selector valves, for selecting pressure application to other apparatus depending on the gate valve position, open or closed, protecting such apparatus from damage due to premature closing caused by pressure loss or operational error.

  14. Locking apparatus for gate valves

    DOEpatents

    Fabyan, J.; Williams, C.W.

    A locking apparatus for fluid operated valves having a piston connected to the valve actuator which moves in response to applied pressure within a cylinder housing having a cylinder head, a catch block is secured to the piston, and the cylinder head incorporates a catch pin. Pressure applied to the cylinder to open the valve moves the piston adjacent to the cylinder head where the catch pin automatically engages the catch block preventing further movement of the piston or premature closure of the valve. Application of pressure to the cylinder to close the valve, retracts the catch pin, allowing the valve to close. Included are one or more selector valves, for selecting pressure application to other apparatus depending on the gate valve position, open or closed, protecting such apparatus from damage due to premature closing caused by pressure loss or operational error.

  15. Graduate Automotive Technology Education (GATE) Center

    SciTech Connect

    Jeffrey Hodgson; David Irick

    2005-09-30

    The Graduate Automotive Technology Education (GATE) Center at the University of Tennessee, Knoxville has completed its sixth year of operation. During this period the Center has involved thirteen GATE Fellows and ten GATE Research Assistants in preparing them to contribute to advanced automotive technologies in the center's focus area: hybrid drive trains and control systems. Eighteen GATE students have graduated, and three have completed their course work requirements. Nine faculty members from three departments in the College of Engineering have been involved in the GATE Center. In addition to the impact that the Center has had on the students and faculty involved, the presence of the center has led to the acquisition of resources that probably would not have been obtained if the GATE Center had not existed. Significant industry interaction such as internships, equipment donations, and support for GATE students has been realized. The value of the total resources brought to the university (including related research contracts) exceeds $4,000,000. Problem areas are discussed in the hope that future activities may benefit from the operation of the current program.

  16. Correlation of interface states/border traps and threshold voltage shift on AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors

    SciTech Connect

    Wu, Tian-Li Groeseneken, Guido; Marcon, Denis; De Jaeger, Brice; Lin, H. C.; Franco, Jacopo; Stoffels, Steve; Van Hove, Marleen; Decoutere, Stefaan; Bakeroot, Benoit; Roelofs, Robin

    2015-08-31

    In this paper, three electrical techniques (frequency dependent conductance analysis, AC transconductance (AC-g{sub m}), and positive gate bias stress) were used to evaluate three different gate dielectrics (Plasma-Enhanced Atomic Layer Deposition Si{sub 3}N{sub 4}, Rapid Thermal Chemical Vapor Deposition Si{sub 3}N{sub 4}, and Atomic Layer Deposition (ALD) Al{sub 2}O{sub 3}) for AlGaN/GaN Metal-Insulator-Semiconductor High-Electron-Mobility Transistors. From these measurements, the interface state density (D{sub it}), the amount of border traps, and the threshold voltage (V{sub TH}) shift during a positive gate bias stress can be obtained. The results show that the V{sub TH} shift during a positive gate bias stress is highly correlated to not only interface states but also border traps in the dielectric. A physical model is proposed describing that electrons can be trapped by both interface states and border traps. Therefore, in order to minimize the V{sub TH} shift during a positive gate bias stress, the gate dielectric needs to have a lower interface state density and less border traps. However, the results also show that the commonly used frequency dependent conductance analysis technique to extract D{sub it} needs to be cautiously used since the resulting value might be influenced by the border traps and, vice versa, i.e., the g{sub m} dispersion commonly attributed to border traps might be influenced by interface states.

  17. Influence of surface charge on the transport characteristics of nanowire-field effect transistors in liquid environments

    SciTech Connect

    Nozaki, Daijiro E-mail: research@nano.tu-dresden.de; Kunstmann, Jens; Zörgiebel, Felix; Cuniberti, Gianaurelio

    2015-05-18

    One dimensional nanowire field effect transistors (NW-FETs) are a promising platform for sensor applications. The transport characteristics of NW-FETs are strongly modified in liquid environment due to the charging of surface functional groups accompanied with protonation or deprotonation. In order to investigate the influence of surface charges and ionic concentrations on the transport characteristics of Schottky-barrier NW-FETs, we have combined the modified Poisson-Boltzmann theory with the Landauer-Büttiker transport formalism. For a typical device, the model is able to capture the reduction of the sensitivity of NW-FETs in ionic solutions due to the screening from counter ions as well as a local gating from surface functional groups. Our approach allows to model, to investigate, and to optimize realistic Schottky-barrier NW-FET devices in liquid environment.

  18. Graphene nanoribbon field-effect transistors on wafer-scale epitaxial graphene on SiC substrates

    SciTech Connect

    Hwang, Wan Sik E-mail: djena@nd.edu; Zhao, Pei; Tahy, Kristof; Xing, Huili; Seabaugh, Alan; Jena, Debdeep E-mail: djena@nd.edu; Nyakiti, Luke O.; Wheeler, Virginia D.; Myers-Ward, Rachael L.; Eddy, Charles R.; Gaskill, D. Kurt; Robinson, Joshua A.; Haensch, Wilfried

    2015-01-01

    We report the realization of top-gated graphene nanoribbon field effect transistors (GNRFETs) of ∼10 nm width on large-area epitaxial graphene exhibiting the opening of a band gap of ∼0.14 eV. Contrary to prior observations of disordered transport and severe edge-roughness effects of graphene nanoribbons (GNRs), the experimental results presented here clearly show that the transport mechanism in carefully fabricated GNRFETs is conventional band-transport at room temperature and inter-band tunneling at low temperature. The entire space of temperature, size, and geometry dependent transport properties and electrostatics of the GNRFETs are explained by a conventional thermionic emission and tunneling current model. Our combined experimental and modeling work proves that carefully fabricated narrow GNRs behave as conventional semiconductors and remain potential candidates for electronic switching devices.

  19. Electron tunneling spectroscopy study of electrically active traps in AlGaN/GaN high electron mobility transistors

    SciTech Connect

    Yang, Jie Cui, Sharon; Ma, T. P.; Hung, Ting-Hsiang; Nath, Digbijoy; Krishnamoorthy, Sriram; Rajan, Siddharth

    2013-11-25

    We investigate the energy levels of electron traps in AlGaN/GaN high electron mobility transistors by the use of electron tunneling spectroscopy. Detailed analysis of a typical spectrum, obtained in a wide gate bias range and with both bias polarities, suggests the existence of electron traps both in the bulk of AlGaN and at the AlGaN/GaN interface. The energy levels of the electron traps have been determined to lie within a 0.5?eV band below the conduction band minimum of AlGaN, and there is strong evidence suggesting that these traps contribute to Frenkel-Poole conduction through the AlGaN barrier.

  20. Flexible, transparent thin film transistors raise hopes for flexible...

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    of the thin-film transistor, fabricated using single-atom-thick layers of graphene and tungsten diselenide, among other materials. The white scale bar shows 5 microns, which is...

  1. Chemically assembled double-dot single-electron transistor analyzed by the orthodox model considering offset charge

    SciTech Connect

    Kano, Shinya; Maeda, Kosuke; Majima, Yutaka; Tanaka, Daisuke; Sakamoto, Masanori; Teranishi, Toshiharu

    2015-10-07

    We present the analysis of chemically assembled double-dot single-electron transistors using orthodox model considering offset charges. First, we fabricate chemically assembled single-electron transistors (SETs) consisting of two Au nanoparticles between electroless Au-plated nanogap electrodes. Then, extraordinary stable Coulomb diamonds in the double-dot SETs are analyzed using the orthodox model, by considering offset charges on the respective quantum dots. We determine the equivalent circuit parameters from Coulomb diamonds and drain current vs. drain voltage curves of the SETs. The accuracies of the capacitances and offset charges on the quantum dots are within ±10%, and ±0.04e (where e is the elementary charge), respectively. The parameters can be explained by the geometrical structures of the SETs observed using scanning electron microscopy images. Using this approach, we are able to understand the spatial characteristics of the double quantum dots, such as the relative distance from the gate electrode and the conditions for adsorption between the nanogap electrodes.

  2. A multi-agent quantum Monte Carlo model for charge transport: Application to organic field-effect transistors

    SciTech Connect

    Bauer, Thilo; Jäger, Christof M.; Jordan, Meredith J. T.; Clark, Timothy

    2015-07-28

    We have developed a multi-agent quantum Monte Carlo model to describe the spatial dynamics of multiple majority charge carriers during conduction of electric current in the channel of organic field-effect transistors. The charge carriers are treated by a neglect of diatomic differential overlap Hamiltonian using a lattice of hydrogen-like basis functions. The local ionization energy and local electron affinity defined previously map the bulk structure of the transistor channel to external potentials for the simulations of electron- and hole-conduction, respectively. The model is designed without a specific charge-transport mechanism like hopping- or band-transport in mind and does not arbitrarily localize charge. An electrode model allows dynamic injection and depletion of charge carriers according to source-drain voltage. The field-effect is modeled by using the source-gate voltage in a Metropolis-like acceptance criterion. Although the current cannot be calculated because the simulations have no time axis, using the number of Monte Carlo moves as pseudo-time gives results that resemble experimental I/V curves.

  3. Simulation-based design of a strained graphene field effect transistor incorporating the pseudo magnetic field effect

    SciTech Connect

    Souma, Satofumi Ueyama, Masayuki; Ogawa, Matsuto

    2014-05-26

    We present a numerical study on the performance of strained graphene-based field-effect transistors. A local strain less than 10% is applied over a central channel region of the graphene to induce the shift of the Dirac point in the channel region along the transverse momentum direction. The left and the right unstrained graphene regions are doped to be either n-type or p-type. By using the atomistic tight-binding model and a Green's function method, we predict that the gate voltage applied to the central strained graphene region can switch the drain current on and off with an on/off ratio of more than six orders of magnitude at room temperature. This is in spite of the absence of a bandgap in the strained channel region. Steeper subthreshold slopes below 60 mV/decade are also predicted at room temperature because of a mechanism similar to the band-to-band tunneling field-effect transistors.

  4. Stable organic field-effect-transistors with high mobilities unaffected by supporting dielectric based on phenylene-bridged thienobenzothiophene

    SciTech Connect

    Mathis, T. Batlogg, B.; Liu, Y.; Ai, L.; Ge, Z.; Lumpi, D. Horkel, E.; Holzer, B.; Froehlich, J.

    2014-01-28

    We report on the electrical properties of organic field-effect transistors (OFET) based on a new class of organic semiconductors. The molecules consist of the same thieno[2,3-b][1]benzothiophene building blocks, connected by different π-bridge spacers (ethylene, phenylene, and fluorophenylene). Molecular orbitals and highest occupied molecular orbital/lowest unoccupied molecular orbital energies were calculated and compared with results from cyclic voltammetric and UV-vis absorption measurements. In order to study the influence of the bridge groups on the molecular arrangement and surface interaction, the transistor performance on a wide range of dielectrics has been investigated in detail. These include as grown SiO{sub 2} and Al{sub 2}O{sub 3} and also treated with octadecyltrichrolosilane and octadecylphosphonic acid, as well as Cytop and Parylene C. An extended study of the multitude of combinations of these materials revealed mobilities up to ∼1 cm{sup 2}/Vs, measured for devices made of the phenylene-bridged compound. Surprisingly, the mobility was quite independent of the supporting gate dielectric. Stability over time has been observed with no degradation after 5 months. By eliminating the hysteresis using Cytop, we were able to show that some of the molecules form films without long-term charge carrier trapping. These are interesting features for practical industrial processing of organic electronics.

  5. Digital gate pulse generator for cycloconverter control

    DOEpatents

    Klein, Frederick F.; Mutone, Gioacchino A.

    1989-01-01

    The present invention provides a digital gate pulse generator which controls the output of a cycloconverter used for electrical power conversion applications by determining the timing and delivery of the firing pulses to the switching devices in the cycloconverter. Previous gate pulse generators have been built with largely analog or discrete digital circuitry which require many precision components and periodic adjustment. The gate pulse generator of the present invention utilizes digital techniques and a predetermined series of values to develop the necessary timing signals for firing the switching device. Each timing signal is compared with a reference signal to determine the exact firing time. The present invention is significantly more compact than previous gate pulse generators, responds quickly to changes in the output demand and requires only one precision component and no adjustments.

  6. Gates, Oregon: Energy Resources | Open Energy Information

    OpenEI (Open Energy Information) [EERE & EIA]

    is a stub. You can help OpenEI by expanding it. Gates is a city in Linn County and Marion County, Oregon. It falls under Oregon's 4th congressional district and Oregon's 5th...

  7. Reliable, High Performance Transistors on Flexible Substrates - Energy

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    Innovation Portal Advanced Materials Advanced Materials Find More Like This Return to Search Reliable, High Performance Transistors on Flexible Substrates Lawrence Berkeley National Laboratory Contact LBL About This Technology Publications: PDF Document Publication Backplanes for Conformal Electronics and Sensors, "Nano Lett., 2011, 11, 5408-5413 (924 KB) Technology Marketing Summary Researchers at Berkeley Lab have produced uniform, high performance transistors on mechanically

  8. GaTe semiconductor for radiation detection

    DOEpatents

    Payne, Stephen A.; Burger, Arnold; Mandal, Krishna C.

    2009-06-23

    GaTe semiconductor is used as a room-temperature radiation detector. GaTe has useful properties for radiation detectors: ideal bandgap, favorable mobilities, low melting point (no evaporation), non-hygroscopic nature, and availability of high-purity starting materials. The detector can be used, e.g., for detection of illicit nuclear weapons and radiological dispersed devices at ports of entry, in cities, and off shore and for determination of medical isotopes present in a patient.

  9. Gate fidelity fluctuations and quantum process invariants

    SciTech Connect

    Magesan, Easwar; Emerson, Joseph [Institute for Quantum Computing and Department of Applied Mathematics, University of Waterloo, Waterloo, Ontario N2L 3G1 (Canada); Blume-Kohout, Robin [Theoretical Division, Los Alamos National Laboratory, Los Alamos, New Mexico 87545 (United States)

    2011-07-15

    We characterize the quantum gate fidelity in a state-independent manner by giving an explicit expression for its variance. The method we provide can be extended to calculate all higher order moments of the gate fidelity. Using these results, we obtain a simple expression for the variance of a single-qubit system and deduce the asymptotic behavior for large-dimensional quantum systems. Applications of these results to quantum chaos and randomized benchmarking are discussed.

  10. David A Gates | Princeton Plasma Physics Lab

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    A Gates Principal Research Physicist, Stellarator Physics Division Head, Advanced Projects Department David Gates is a principal research physicist for the advanced projects division of PPPL, and the stellarator physics leader at the Laboratory. In the latter capacity he leads collaborative efforts with the Wendelstein 7-X and Large Helical Device stellarator projects in Germany and Japan, respectively. Interests Stellarators Tokamaks Contact Information Phone: 609-243-2837 Email:

  11. Range gated strip proximity sensor

    DOEpatents

    McEwan, T.E.

    1996-12-03

    A range gated strip proximity sensor uses one set of sensor electronics and a distributed antenna or strip which extends along the perimeter to be sensed. A micro-power RF transmitter is coupled to the first end of the strip and transmits a sequence of RF pulses on the strip to produce a sensor field along the strip. A receiver is coupled to the second end of the strip, and generates a field reference signal in response to the sequence of pulse on the line combined with received electromagnetic energy from reflections in the field. The sensor signals comprise pulses of radio frequency signals having a duration of less than 10 nanoseconds, and a pulse repetition rate on the order of 1 to 10 MegaHertz or less. The duration of the radio frequency pulses is adjusted to control the range of the sensor. An RF detector feeds a filter capacitor in response to received pulses on the strip line to produce a field reference signal representing the average amplitude of the received pulses. When a received pulse is mixed with a received echo, the mixing causes a fluctuation in the amplitude of the field reference signal, providing a range-limited Doppler type signature of a field disturbance. 6 figs.

  12. Range gated strip proximity sensor

    DOEpatents

    McEwan, Thomas E.

    1996-01-01

    A range gated strip proximity sensor uses one set of sensor electronics and a distributed antenna or strip which extends along the perimeter to be sensed. A micro-power RF transmitter is coupled to the first end of the strip and transmits a sequence of RF pulses on the strip to produce a sensor field along the strip. A receiver is coupled to the second end of the strip, and generates a field reference signal in response to the sequence of pulse on the line combined with received electromagnetic energy from reflections in the field. The sensor signals comprise pulses of radio frequency signals having a duration of less than 10 nanoseconds, and a pulse repetition rate on the order of 1 to 10 MegaHertz or less. The duration of the radio frequency pulses is adjusted to control the range of the sensor. An RF detector feeds a filter capacitor in response to received pulses on the strip line to produce a field reference signal representing the average amplitude of the received pulses. When a received pulse is mixed with a received echo, the mixing causes a fluctuation in the amplitude of the field reference signal, providing a range-limited Doppler type signature of a field disturbance.

  13. Tuning the metal-insulator crossover and magnetism in SrRuO3 by ionic gating

    DOE PAGES [OSTI]

    Yi, Hee Taek; Gao, Bin; Xie, Wei; Cheong, Sang -Wook; Podzorov, Vitaly

    2014-10-13

    Reversible control of charge transport and magnetic properties without degradation is a key for device applications of transition metal oxides. Chemical doping during the growth of transition metal oxides can result in large changes in physical properties, but in most of the cases irreversibility is an inevitable constraint. We report a reversible control of charge transport, metal-insulator crossover and magnetism in field-effect devices based on ionically gated archetypal oxide system - SrRuO3. In these thin-film devices, the metal-insulator crossover temperature and the onset of magnetoresistance can be continuously and reversibly tuned in the range 90–250 K and 70–100 K, respectively,more » by application of a small gate voltage. We infer that a reversible diffusion of oxygen ions in the oxide lattice dominates the response of these materials to the gate electric field. These findings provide critical insights into both the understanding of ionically gated oxides and the development of novel applications.« less

  14. Fabrication and evaluation of series-triple quantum dots by thermal oxidation of silicon nanowire

    SciTech Connect

    Uchida, Takafumi Jo, Mingyu; Tsurumaki-Fukuchi, Atsushi; Arita, Masashi; Takahashi, Yasuo; Fujiwara, Akira

    2015-11-15

    Series-connected triple quantum dots were fabricated by a simple two-step oxidation technique using the pattern-dependent oxidation of a silicon nanowire and an additional oxidation of the nanowire through the gap of the fine gates attached to the nanowire. The characteristics of multi-dot single-electron devices are obtained. The formation of each quantum dot beneath an attached gate is confirmed by analyzing the electrical characteristics and by evaluating the gate capacitances between all pairings of gates and quantum dots. Because the gate electrode is automatically attached to each dot, the device structure benefits from scalability. This technique promises integrability of multiple quantum dots with individual control gates.

  15. Large scale electromechanical transistor with application in mass sensing

    SciTech Connect

    Jin, Leisheng; Li, Lijie

    2014-12-07

    Nanomechanical transistor (NMT) has evolved from the single electron transistor, a device that operates by shuttling electrons with a self-excited central conductor. The unfavoured aspects of the NMT are the complexity of the fabrication process and its signal processing unit, which could potentially be overcome by designing much larger devices. This paper reports a new design of large scale electromechanical transistor (LSEMT), still taking advantage of the principle of shuttling electrons. However, because of the large size, nonlinear electrostatic forces induced by the transistor itself are not sufficient to drive the mechanical member into vibrationan external force has to be used. In this paper, a LSEMT device is modelled, and its new application in mass sensing is postulated using two coupled mechanical cantilevers, with one of them being embedded in the transistor. The sensor is capable of detecting added mass using the eigenstate shifts method by reading the change of electrical current from the transistor, which has much higher sensitivity than conventional eigenfrequency shift approach used in classical cantilever based mass sensors. Numerical simulations are conducted to investigate the performance of the mass sensor.

  16. Substrate dielectric effects on graphene field effect transistors

    SciTech Connect

    Hu, Zhaoying; Prasad Sinha, Dhiraj; Ung Lee, Ji, E-mail: jlee1@albany.edu; Liehr, Michael [College of Nanoscale Science and Engineering, The State University of New York at Albany, Albany, New York 12203 (United States)

    2014-05-21

    Graphene is emerging as a promising material for future electronics and optoelectronics applications due to its unique electronic structure. Understanding the graphene-dielectric interaction is of vital importance for the development of graphene field effect transistors (FETs) and other novel graphene devices. Here, we extend the exploration of substrate dielectrics from conventionally used thermally grown SiO{sub 2} and hexagonal boron nitride films to technologically relevant deposited dielectrics used in semiconductor industry. A systematic analysis of morphology and optical and electrical properties was performed to study the effects of different substrates (SiO{sub 2}, HfO{sub 2}, Al{sub 2}O{sub 3}, tetraethyl orthosilicate (TEOS)-oxide, and Si{sub 3}N{sub 4}) on the carrier transport of chemical vapor deposition-derived graphene FET devices. As baseline, we use graphene FETs fabricated on thermal SiO{sub 2} with a relatively high carrier mobility of 10?000 cm{sup 2}/(V s). Among the deposited dielectrics studied, silicon nitride showed the highest mobility, comparable to the properties of graphene fabricated on thermal SiO{sub 2}. We conclude that this result comes from lower long range scattering and short range scattering rates in the nitride compared those in the other deposited films. The carrier fluctuation caused by substrates, however, seems to be the main contributing factor for mobility degradation, as a universal mobility-disorder density product is observed for all the dielectrics examined. The extrinsic doping trend is further confirmed by Raman spectra. We also provide, for the first time, correlation between the intensity ratio of G peak and 2D peak in the Raman spectra to the carrier mobility of graphene for different substrates.

  17. Extremely scaled high-k/In?.??Ga?.??As gate stacks with low leakage and low interface trap densities

    SciTech Connect

    Chobpattana, Varistha; Mikheev, Evgeny; Zhang, Jack Y.; Mates, Thomas E.; Stemmer, Susanne

    2014-09-28

    Highly scaled gate dielectric stacks with low leakage and low interface trap densities are required for complementary metal-oxide-semiconductor technology with III-V semiconductor channels. Here, we show that a novel pre-deposition technique, consisting of alternating cycles of nitrogen plasma and tetrakis(dimethylamino)titanium, allows for HfO? and ZrO? gate stacks with extremely high accumulation capacitance densities of more than 5 ?F/cm? at 1 MHz, low leakage current, low frequency dispersion, and low midgap interface trap densities (10cm?eV?range). Using x-ray photoelectron spectroscopy, we show that the interface contains TiO? and small quantities of In?O?, but no detectable Ga- or As-oxides, or As-As bonding. The results allow for insights into the microscopic mechanisms that control leakage and frequency dispersion in high-k/III-V gate stacks.

  18. Sliding-gate valve for use with abrasive materials

    DOEpatents

    Ayers, Jr., William J.; Carter, Charles R.; Griffith, Richard A.; Loomis, Richard B.; Notestein, John E.

    1985-01-01

    The invention is a flow and pressure-sealing valve for use with abrasive solids. The valve embodies special features which provide for long, reliable operating lifetimes in solids-handling service. The valve includes upper and lower transversely slidable gates, contained in separate chambers. The upper gate provides a solids-flow control function, whereas the lower gate provides a pressure-sealing function. The lower gate is supported by means for (a) lifting that gate into sealing engagement with its seat when the gate is in its open and closed positions and (b) lowering the gate out of contact with its seat to permit abrasion-free transit of the gate between its open and closed positions. When closed, the upper gate isolates the lower gate from the solids. Because of this shielding action, the sealing surface of the lower gate is not exposed to solids during transit or when it is being lifted or lowered. The chamber containing the lower gate normally is pressurized slightly, and a sweep gas is directed inwardly across the lower-gate sealing surface during the vertical translation of the gate.

  19. Trapping in GaN-based metal-insulator-semiconductor transistors: Role of high drain bias and hot electrons

    SciTech Connect

    Meneghini, M. Bisi, D.; Meneghesso, G.; Zanoni, E.

    2014-04-07

    This paper describes an extensive analysis of the role of off-state and semi-on state bias in inducing the trapping in GaN-based power High Electron Mobility Transistors. The study is based on combined pulsed characterization and on-resistance transient measurements. We demonstrate thatby changing the quiescent bias point from the off-state to the semi-on stateit is possible to separately analyze two relevant trapping mechanisms: (i) the trapping of electrons in the gate-drain access region, activated by the exposure to high drain bias in the off-state; (ii) the trapping of hot-electrons within the AlGaN barrier or the gate insulator, which occurs when the devices are operated in the semi-on state. The dependence of these two mechanisms on the bias conditions and on temperature, and the properties (activation energy and cross section) of the related traps are described in the text.

  20. Field-effect transistor having a superlattice channel and high carrier velocities at high applied fields

    DOEpatents

    Chaffin, R.J.; Dawson, L.R.; Fritz, I.J.; Osbourn, G.C.; Zipperian, T.E.

    1984-04-19

    In a field-effect transistor comprising a semiconductor having therein a source, a drain, a channel and a gate in operational relationship, there is provided an improvement wherein said semiconductor is a superlattice comprising alternating quantum well and barrier layers, the quantum well layers comprising a first direct gap semiconductor material which in bulk form has a certain bandgap and a curve of electron velocity versus applied electric field which has a maximum electron velocity at a certain electric field, the barrier layers comprising a second semiconductor material having a bandgap wider than that of said first semiconductor material, wherein the layer thicknesses of said quantum well and barrier layers are sufficiently thin that the alternating layers constitute a superlattice having a curve of electron velocity versus applied electric field which has a maximum electron velocity at a certain electric field, and wherein the thicknesses of said quantum well layers are selected to provide a superlattice curve of electron velocity versus applied electric field whereby, at applied electric fields higher than that at which the maximum electron velocity occurs in said first material when in bulk form, the electron velocities are higher in said superlattice than they are in said first semiconductor material in bulk form.

  1. Field-effect transistor having a superlattice channel and high carrier velocities at high applied fields

    DOEpatents

    Chaffin, deceased, Roger J.; Dawson, Ralph; Fritz, Ian J.; Osbourn, Gordon C.; Zipperian, Thomas E.

    1989-01-01

    A field effect transistor comprises a semiconductor having a source, a drain, a channel and a gate in operational relationship. The semiconductor is a strained layer superlattice comprising alternating quantum well and barrier layers, the quantum well layers and barrier layers being selected from the group of layer pairs consisting of InGaAs/AlGaAs, InAs/InAlGaAs, and InAs/InAlAsP. The layer thicknesses of the quantum well and barrier layers are sufficiently thin that the alternating layers constitute a superlattice which has a superlattice conduction band energy level structure in k-vector space which includes a lowest energy .GAMMA.-valley and a next lowest energy L-valley, each k-vector corresponding to one of the orthogonal directions defined by the planes of said layers and the directions perpendicular thereto. The layer thicknesses of the quantum well layers are selected to provide a superlattice L.sub.2D -valley which has a shape which is substantially more two-dimensional than that of said bulk L-valley.

  2. Low temperature atomic layer deposited ZnO photo thin film transistors

    SciTech Connect

    Oruc, Feyza B.; Aygun, Levent E.; Donmez, Inci; Biyikli, Necmi; Okyay, Ali K.; Yu, Hyun Yong

    2015-01-01

    ZnO thin film transistors (TFTs) are fabricated on Si substrates using atomic layer deposition technique. The growth temperature of ZnO channel layers are selected as 80, 100, 120, 130, and 250?C. Material characteristics of ZnO films are examined using x-ray photoelectron spectroscopy and x-ray diffraction methods. Stoichiometry analyses showed that the amount of both oxygen vacancies and interstitial zinc decrease with decreasing growth temperature. Electrical characteristics improve with decreasing growth temperature. Best results are obtained with ZnO channels deposited at 80?C; I{sub on}/I{sub off} ratio is extracted as 7.8 10{sup 9} and subthreshold slope is extracted as 0.116 V/dec. Flexible ZnO TFT devices are also fabricated using films grown at 80?C. I{sub D}V{sub GS} characterization results showed that devices fabricated on different substrates (Si and polyethylene terephthalate) show similar electrical characteristics. Sub-bandgap photo sensing properties of ZnO based TFTs are investigated; it is shown that visible light absorption of ZnO based TFTs can be actively controlled by external gate bias.

  3. Gate-modulated weak anti-localization and carrier trapping in individual Bi{sub 2}Se{sub 3} nanoribbons

    SciTech Connect

    Wang, Li-Xian; Yan, Yuan; Liao, Zhi-Min Yu, Da-Peng

    2015-02-09

    We report a gate-voltage modulation on the weak anti-localization of individual topological insulator Bi{sub 2}Se{sub 3} nanoribbons. The phase coherence length decreases with decreasing the carrier density of the surface states on the bottom surface of the Bi{sub 2}Se{sub 3} nanoribbon as tuning the gate voltage from 0 to −100 V, indicating that the electron-electron interaction dominates the decoherence at low carrier density. Furthermore, we observe an abnormal conductance decline at positive gate voltage regime, which is ascribed to the capture of surface carriers by the trapping centers in the surface oxidation layer.

  4. Designing a Micro-Mechanical Transistor

    SciTech Connect

    Mainieri, R.

    1999-06-03

    This is the final report of a three-year, Laboratory-Directed Research and Development (LDRD) project at the Los Alamos National Laboratory (LANL). Micro-mechanical electronic systems are chips with moving parts. They are fabricated with the same techniques that are used to manufacture electronic chips, sharing their low cost. Micro-mechanical chips can also contain electronic components. By combining mechanical parts with electronic parts it becomes possible to process signal mechanically. To achieve designs comparable to those obtained with electronic components it is necessary to have a mechanical device that can change its behavior in response to a small input - a mechanical transistor. The work proposed will develop the design tools for these complex-shaped resonant structures using the geometrical ray technique. To overcome the limitations of geometrical ray chaos, the dynamics of the rays will be studied using the methods developed for the study of nonlinear dynamical systems. T his leads to numerical methods that execute well in parallel computer architectures, using a limited amount of memory and no inter-process communication.

  5. Gated IR Images of Shocked Surfaces

    SciTech Connect

    S. S. Lutz; W. D. Turley; P. M. Rightley; L. E. Primas

    2001-06-01

    Gated infrared (IR) images have been taken of a series of shocked surface geometries in tin. Metal coupons machined with steps and flats were mounted directly to the high explosive. The explosive was point-initiated and 500-ns to 1-microsecond-wide gated images of the target were taken immediately following shock breakout using a Santa Barbara Focalplane InSb camera (SBF-134). Spatial distributions of surface radiance were extracted from the images of the shocked samples and found to be non-single-valued. Several geometries were modeled using CTH, a two-dimensional Eulerian hydrocode.

  6. Hydrogen passivation of electron trap in amorphous In-Ga-Zn-O thin-film transistors

    SciTech Connect

    Hanyu, Yuichiro Domen, Kay; Nomura, Kenji; Hiramatsu, Hidenori; Kamiya, Toshio; Materials Research Center for Element Strategy, Tokyo Institute of Technology, Yokohama ; Kumomi, Hideya; Hosono, Hideo; Frontier Research Center, Tokyo Institute of Technology, Yokohama; Materials Research Center for Element Strategy, Tokyo Institute of Technology, Yokohama

    2013-11-11

    We report an experimental evidence that some hydrogens passivate electron traps in an amorphous oxide semiconductor, a-In-Ga-Zn-O (a-IGZO). The a-IGZO thin-film transistors (TFTs) annealed at 300?C exhibit good operation characteristics; while those annealed at ?400?C show deteriorated ones. Thermal desorption spectra (TDS) of H{sub 2}O indicate that this threshold annealing temperature corresponds to depletion of H{sub 2}O desorption from the a-IGZO layer. Hydrogen re-doping by wet oxygen annealing recovers the good TFT characteristic. The hydrogens responsible for this passivation have specific binding energies corresponding to the desorption temperatures of 300430?C. A plausible structural model is suggested.

  7. Chi-Nu "Gate Review" (Conference) | SciTech Connect

    Office of Scientific and Technical Information (OSTI)

    Chi-Nu "Gate Review" Citation Details In-Document Search Title: Chi-Nu "Gate Review" You are accessing a document from the Department of Energy's (DOE) SciTech Connect. This...

  8. Berkeley Lab Scientists Grow Atomically Thin Transistors and Circuits |

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Department of Energy Berkeley Lab Scientists Grow Atomically Thin Transistors and Circuits Berkeley Lab Scientists Grow Atomically Thin Transistors and Circuits July 12, 2016 - 10:29am Addthis This schematic shows the chemical assembly of two-dimensional crystals. Graphene is first etched into channels and the TMDC molybdenum disulfide (MoS2) begins to nucleate around the edges and within the channel. On the edges, MoS2 slightly overlaps on top of the graphene. Finally, further growth

  9. Reduction of leakage current in In{sub 0.53}Ga{sub 0.47}As channel metal-oxide-semiconductor field-effect-transistors using AlAs{sub 0.56}Sb{sub 0.44} confinement layers

    SciTech Connect

    Huang, Cheng-Ying Lee, Sanghoon; Cohen-Elias, Doron; Law, Jeremy J. M.; Carter, Andrew D.; Rodwell, Mark J. W.; Chobpattana, Varistha; Stemmer, Susanne; Gossard, Arthur C.; Materials Department, University of California, Santa Barbara, California 93106

    2013-11-11

    We compare the DC characteristics of planar In{sub 0.53}Ga{sub 0.47}As channel MOSFETs using AlAs{sub 0.56}Sb{sub 0.44} barriers to similar MOSFETs using In{sub 0.52}Al{sub 0.48}As barriers. AlAs{sub 0.56}Sb{sub 0.44}, with ?1.0?eV conduction-band offset to In{sub 0.53}Ga{sub 0.47}As, improves electron confinement within the channel. At gate lengths below 100?nm and V{sub DS}?=?0.5?V, the MOSFETs with AlAs{sub 0.56}Sb{sub 0.44} barriers show steeper subthreshold swing (SS) and reduced drain-source leakage current. We attribute the greater leakage observed with the In{sub 0.52}Al{sub 0.48}As barrier to thermionic emission from the N?+?In{sub 0.53}Ga{sub 0.47}As source over the In{sub 0.53}Ga{sub 0.47}As/In{sub 0.52}Al{sub 0.48}As heterointerface. A 56?nm gate length device with the AlAs{sub 0.56}Sb{sub 0.44} barrier exhibits 1.96 mS/?m peak transconductance and SS?=?134?mV/dec at V{sub DS}?=?0.5?V.

  10. Designing robust unitary gates: Application to concatenated composite pulses

    SciTech Connect

    Ichikawa, Tsubasa; Bando, Masamitsu; Kondo, Yasushi; Nakahara, Mikio

    2011-12-15

    We propose a simple formalism to design unitary gates robust against given systematic errors. This formalism generalizes our previous observation [Y. Kondo and M. Bando, J. Phys. Soc. Jpn. 80, 054002 (2011)] that vanishing dynamical phase in some composite gates is essential to suppress pulse-length errors. By employing our formalism, we derive a composite unitary gate which can be seen as a concatenation of two known composite unitary operations. The obtained unitary gate has high fidelity over a wider range of error strengths compared to existing composite gates.

  11. Photo-modulated thin film transistor based on dynamic charge transfer within quantum-dots-InGaZnO interface

    SciTech Connect

    Liu, Xiang; Yang, Xiaoxia; Liu, Mingju; Tao, Zhi; Wei, Lei Li, Chi Zhang, Xiaobing; Wang, Baoping; Dai, Qing; Nathan, Arokia

    2014-03-17

    The temporal development of next-generation photo-induced transistor across semiconductor quantum dots and Zn-related oxide thin film is reported in this paper. Through the dynamic charge transfer in the interface between these two key components, the responsibility of photocurrent can be amplified for scales of times (?10{sup 4}?A/W 450?nm) by the electron injection from excited quantum dots to InGaZnO thin film. And this photo-transistor has a broader waveband (from ultraviolet to visible light) optical sensitivity compared with other Zn-related oxide photoelectric device. Moreover, persistent photoconductivity effect can be diminished in visible waveband which lead to a significant improvement in the device's relaxation time from visible illuminated to dark state due to the ultrafast quenching of quantum dots. With other inherent properties such as integrated circuit compatible, low off-state current and high external quantum efficiency resolution, it has a great potential in the photoelectric device application, such as photodetector, phototransistor, and sensor array.

  12. Sulfuric acid and hydrogen peroxide surface passivation effects on AlGaN/GaN high electron mobility transistors

    SciTech Connect

    Zaidi, Z. H. Lee, K. B.; Qian, H.; Jiang, S.; Houston, P. A.; Guiney, I.; Wallis, D. J.; Humphreys, C. J.

    2014-12-28

    In this work, we have compared SiN{sub x} passivation, hydrogen peroxide, and sulfuric acid treatment on AlGaN/GaN HEMTs surface after full device fabrication on Si substrate. Both the chemical treatments resulted in the suppression of device pinch-off gate leakage current below 1??A/mm, which is much lower than that for SiN{sub x} passivation. The greatest suppression over the range of devices is observed with the sulfuric acid treatment. The device on/off current ratio is improved (from 10{sup 4}10{sup 5} to 10{sup 7}) and a reduction in the device sub-threshold (S.S.) slope (from ?215 to 90?mV/decade) is achieved. The sulfuric acid is believed to work by oxidizing the surface which has a strong passivating effect on the gate leakage current. The interface trap charge density (D{sub it}) is reduced (from 4.86 to 0.90??10{sup 12?}cm{sup ?2} eV{sup ?1}), calculated from the change in the device S.S. The gate surface leakage current mechanism is explained by combined Mott hopping conduction and Poole Frenkel models for both untreated and sulfuric acid treated devices. Combining the sulfuric acid treatment underneath the gate with the SiN{sub x} passivation after full device fabrication results in the reduction of D{sub it} and improves the surface related current collapse.

  13. Recovery in dc and rf performance of off-state step-stressed AlGaN/GaN high electron mobility transistors with thermal annealing

    SciTech Connect

    Kim, Byung-Jae; Hwang, Ya-Hsi; Ahn, Shihyun; Zhu, Weidi; Dong, Chen; Lu, Liu; Ren, Fan; Holzworth, M. R.; Jones, Kevin S.; Pearton, Stephen J.; Smith, David J.; Kim, Jihyun; Zhang, Ming-Lan

    2015-04-13

    The recovery effects of thermal annealing on dc and rf performance of off-state step-stressed AlGaN/GaN high electron mobility transistors were investigated. After stress, reverse gate leakage current and sub-threshold swing increased and drain current on-off ratio decreased. However, these degradations were completely recovered after thermal annealing at 450?C for 10 mins for devices stressed either once or twice. The trap densities, which were estimated by temperature-dependent drain-current sub-threshold swing measurements, increased after off-state step-stress and were reduced after subsequent thermal annealing. In addition, the small signal rf characteristics of stressed devices were completely recovered after thermal annealing.

  14. Facile fabrication of high-performance InGaZnO thin film transistor using hydrogen ion irradiation at room temperature

    SciTech Connect

    Ahn, Byung Du [School of Electrical and Electronic Engineering, 50, Yonsei University, Seoul 120-749 (Korea, Republic of); Park, Jin-Seong [Division of Materials Science and Engineering, Hanyang University, Seoul 133-791 (Korea, Republic of); Chung, K. B., E-mail: kbchung@dongguk.edu [Division of Physics and Semiconductor Science, Dongguk University, Seoul 100-715 (Korea, Republic of)

    2014-10-20

    Device performance of InGaZnO (IGZO) thin film transistors (TFTs) are investigated as a function of hydrogen ion irradiation dose at room temperature. Field effect mobility is enhanced, and subthreshold gate swing is improved with the increase of hydrogen ion irradiation dose, and there is no thermal annealing. The electrical device performance is correlated with the electronic structure of IGZO films, such as chemical bonding states, features of the conduction band, and band edge states below the conduction band. The decrease of oxygen deficient bonding and the changes in electronic structure of the conduction band leads to the improvement of device performance in IGZO TFT with an increase of the hydrogen ion irradiation dose.

  15. Method for voltage-gated protein fractionation

    DOEpatents

    Hatch, Anson; Singh, Anup K.

    2012-04-24

    We report unique findings on the voltage dependence of protein exclusion from the pores of nanoporous polymer exclusion membranes. The pores are small enough that proteins are excluded from passage with low applied electric fields, but increasing the field enables proteins to pass through. The requisite field necessary for a change in exclusion is protein-specific with a correlation to protein size. The field-dependence of exclusion is important to consider for preconcentration applications. The ability to selectively gate proteins at exclusion membranes is also a promising means for manipulating and characterizing proteins. We show that field-gated exclusion can be used to selectively remove proteins from a mixture, or to selectively trap protein at one exclusion membrane in a series.

  16. Gated monochromatic x-ray imager

    SciTech Connect

    Oertel, J.A.; Archuleta, T.; Clark, L.

    1995-09-01

    We have recently developed a gated monochromatic x-ray imaging diagnostic for the national Inertial-Confinement Fusion (ICF) program. This new imaging system will be one of the primary diagnostics to be utilized on University of Rochester`s Omega laser fusion facility. The new diagnostic is based upon a Kirkpatrick-Baez (KB) microscope dispersed by diffraction crystals, as first described by Marshall and Su. The dispersed images are gated by four individual proximity focused microchannel plates and recorded on film. Spectral coverage is tunable up to 8 keV, spectral resolution has been measured at 20 eV, temporal resolution is 80 ps, and spatial resolution is better than 10 {mu}m.

  17. Gated beam imager for heavy ion beams

    SciTech Connect

    Ahle, Larry; Hopkins, Harvey S.

    1998-12-10

    As part of the work building a small heavy-ion induction accelerator ring, or recirculator, at Lawrence Livermore National Laboratory, a diagnostic device measuring the four-dimensional transverse phase space of the beam in just a single pulse has been developed. This device, the Gated Beam Imager (GBI), consists of a thin plate filled with an array of 100-micron diameter holes and uses a Micro Channel Plate (MCP), a phosphor screen, and a CCD camera to image the beam particles that pass through the holes after they have drifted for a short distance. By time gating the MCP, the time evolution of the beam can also be measured, with each time step requiring a new pulse.

  18. Gated beam imager for heavy ion beams

    SciTech Connect

    Ahle, L.; Hopkins, H.S.

    1998-12-01

    As part of the work building a small heavy-ion induction accelerator ring, or recirculator, at Lawrence Livermore National Laboratory, a diagnostic device measuring the four-dimensional transverse phase space of the beam in just a single pulse has been developed. This device, the Gated Beam Imager (GBI), consists of a thin plate filled with an array of 100-micron diameter holes and uses a Micro Channel Plate (MCP), a phosphor screen, and a CCD camera to image the beam particles that pass through the holes after they have drifted for a short distance. By time gating the MCP, the time evolution of the beam can also be measured, with each time step requiring a new pulse. {copyright} {ital 1998 American Institute of Physics.}

  19. Cluster computing software for GATE simulations

    SciTech Connect

    Beenhouwer, Jan de; Staelens, Steven; Kruecker, Dirk; Ferrer, Ludovic; D'Asseler, Yves; Lemahieu, Ignace; Rannou, Fernando R.

    2007-06-15

    Geometry and tracking (GEANT4) is a Monte Carlo package designed for high energy physics experiments. It is used as the basis layer for Monte Carlo simulations of nuclear medicine acquisition systems in GEANT4 Application for Tomographic Emission (GATE). GATE allows the user to realistically model experiments using accurate physics models and time synchronization for detector movement through a script language contained in a macro file. The downside of this high accuracy is long computation time. This paper describes a platform independent computing approach for running GATE simulations on a cluster of computers in order to reduce the overall simulation time. Our software automatically creates fully resolved, nonparametrized macros accompanied with an on-the-fly generated cluster specific submit file used to launch the simulations. The scalability of GATE simulations on a cluster is investigated for two imaging modalities, positron emission tomography (PET) and single photon emission computed tomography (SPECT). Due to a higher sensitivity, PET simulations are characterized by relatively high data output rates that create rather large output files. SPECT simulations, on the other hand, have lower data output rates but require a long collimator setup time. Both of these characteristics hamper scalability as a function of the number of CPUs. The scalability of PET simulations is improved here by the development of a fast output merger. The scalability of SPECT simulations is improved by greatly reducing the collimator setup time. Accordingly, these two new developments result in higher scalability for both PET and SPECT simulations and reduce the computation time to more practical values.

  20. Electron density and currents of AlN/GaN high electron mobility transistors with thin GaN/AlN buffer layer

    SciTech Connect

    Bairamis, A.; Zervos, Ch.; Georgakilas, A.; Adikimenakis, A.; Kostopoulos, A.; Kayambaki, M.; Tsagaraki, K.; Konstantinidis, G.

    2014-09-15

    AlN/GaN high electron mobility transistor (HEMT) structures with thin GaN/AlN buffer layer have been analyzed theoretically and experimentally, and the effects of the AlN barrier and GaN buffer layer thicknesses on two-dimensional electron gas (2DEG) density and transport properties have been evaluated. HEMT structures consisting of [300?nm GaN/ 200?nm AlN] buffer layer on sapphire were grown by plasma-assisted molecular beam epitaxy and exhibited a remarkable agreement with the theoretical calculations, suggesting a negligible influence of the crystalline defects that increase near the heteroepitaxial interface. The 2DEG density varied from 6.8??10{sup 12} to 2.1 10{sup 13} cm{sup ?2} as the AlN barrier thickness increased from 2.2 to 4.5?nm, while a 4.5?nm AlN barrier would result to 3.1??10{sup 13} cm{sup ?2} on a GaN buffer layer. The 3.0?nm AlN barrier structure exhibited the highest 2DEG mobility of 900?cm{sup 2}/Vs for a density of 1.3??10{sup 13} cm{sup ?2}. The results were also confirmed by the performance of 1??m gate-length transistors. The scaling of AlN barrier thickness from 1.5?nm to 4.5?nm could modify the drain-source saturation current, for zero gate-source voltage, from zero (normally off condition) to 0.63?A/mm. The maximum drain-source current was 1.1?A/mm for AlN barrier thickness of 3.0?nm and 3.7?nm, and the maximum extrinsic transconductance was 320 mS/mm for 3.0?nm AlN barrier.

  1. Schottky barrier contrasts in single and bi-layer graphene contacts for MoS{sub 2} field-effect transistors

    SciTech Connect

    Du, Hyewon; Kim, Taekwang; Shin, Somyeong; Kim, Dahye; Seo, Sunae; Kim, Hakseong; Lee, Sang Wook; Sung, Ji Ho; Jo, Moon-Ho; Lee, Myoung Jae; Seo, David H.

    2015-12-07

    We have investigated single- and bi-layer graphene as source-drain electrodes for n-type MoS{sub 2} transistors. Ti-MoS{sub 2}-graphene heterojunction transistors using both single-layer MoS{sub 2} (1M) and 4-layer MoS{sub 2} (4M) were fabricated in order to compare graphene electrodes with commonly used Ti electrodes. MoS{sub 2}-graphene Schottky barrier provided electron injection efficiency up to 130 times higher in the subthreshold regime when compared with MoS{sub 2}-Ti, which resulted in V{sub DS} polarity dependence of device parameters such as threshold voltage (V{sub TH}) and subthreshold swing (SS). Comparing single-layer graphene (SG) with bi-layer graphene (BG) in 4M devices, SG electrodes exhibited enhanced device performance with higher on/off ratio and increased field-effect mobility (μ{sub FE}) due to more sensitive Fermi level shift by gate voltage. Meanwhile, in the strongly accumulated regime, we observed opposing behavior depending on MoS{sub 2} thickness for both SG and BG contacts. Differential conductance (σ{sub d}) of 1M increases with V{sub DS} irrespective of V{sub DS} polarity, while σ{sub d} of 4M ceases monotonic growth at positive V{sub DS} values transitioning to ohmic-like contact formation. Nevertheless, the low absolute value of σ{sub d} saturation of the 4M-graphene junction demonstrates that graphene electrode could be unfavorable for high current carrying transistors.

  2. Group-III nitride based high electron mobility transistor (HEMT) with barrier/spacer layer

    DOEpatents

    Chavarkar, Prashant; Smorchkova, Ioulia P.; Keller, Stacia; Mishra, Umesh; Walukiewicz, Wladyslaw; Wu, Yifeng

    2005-02-01

    A Group III nitride based high electron mobility transistors (HEMT) is disclosed that provides improved high frequency performance. One embodiment of the HEMT comprises a GaN buffer layer, with an Al.sub.y Ga.sub.1-y N (y=1 or y 1) layer on the GaN buffer layer. An Al.sub.x Ga.sub.1-x N (0.ltoreq.x.ltoreq.0.5) barrier layer on to the Al.sub.y Ga.sub.1-y N layer, opposite the GaN buffer layer, Al.sub.y Ga.sub.1-y N layer having a higher Al concentration than that of the Al.sub.x Ga.sub.1-x N barrier layer. A preferred Al.sub.y Ga.sub.1-y N layer has y=1 or y.about.1 and a preferred Al.sub.x Ga.sub.1-x N barrier layer has 0.ltoreq.x.ltoreq.0.5. A 2DEG forms at the interface between the GaN buffer layer and the Al.sub.y Ga.sub.1-y N layer. Respective source, drain and gate contacts are formed on the Al.sub.x Ga.sub.1-x N barrier layer. The HEMT can also comprising a substrate adjacent to the buffer layer, opposite the Al.sub.y Ga.sub.1-y N layer and a nucleation layer between the Al.sub.x Ga.sub.1-x N buffer layer and the substrate.

  3. Raman spectra and electron-phonon coupling in disordered graphene with gate-tunable doping

    SciTech Connect

    Childres, Isaac; Jauregui, Luis A.; Chen, Yong P.

    2014-12-21

    We report a Raman spectroscopy study of graphene field-effect transistors with a controlled amount of defects introduced in graphene by exposure to electron-beam irradiation. Raman spectra are taken at T = 8 K over a range of back gate voltages (V{sub g}) for various irradiation dosages (R{sub e}). We study effects in the Raman spectra due to V{sub g}-induced doping and artificially created disorder at various R{sub e}. With moderate disorder (irradiation), the Raman G peak with respect to the graphene carrier density (n{sub FE}) exhibits a minimum in peak frequency and a maximum in peak width near the charge-neutral point (CNP). These trends are similar to those seen in previous works on pristine graphene and have been attributed to a reduction of electron-phonon coupling strength (D) and removal of the Kohn anomaly as the Fermi level moves away from the CNP. We also observe a maximum in I{sub 2D}/I{sub G} and weak maximum in I{sub D}/I{sub G} near the CNP. All the observed dependences of Raman parameters on n{sub FE} weaken at stronger disorder (higher R{sub e}), implying that disorder causes a reduction of D as well. Our findings are valuable for understanding Raman spectra and electron-phonon physics in doped and disordered graphene.

  4. SU-E-T-350: Verification of Gating Performance of a New Elekta Gating Solution: Response Kit and Catalyst System

    SciTech Connect

    Xie, X; Cao, D; Housley, D; Mehta, V; Shepard, D

    2014-06-01

    Purpose: In this work, we have tested the performance of new respiratory gating solutions for Elekta linacs. These solutions include the Response gating and the C-RAD Catalyst surface mapping system.Verification measurements have been performed for a series of clinical cases. We also examined the beam on latency of the system and its impact on delivery efficiency. Methods: To verify the benefits of tighter gating windows, a Quasar Respiratory Motion Platform was used. Its vertical-motion plate acted as a respiration surrogate and was tracked by the Catalyst system to generate gating signals. A MatriXX ion-chamber array was mounted on its longitudinal-moving platform. Clinical plans are delivered to a stationary and moving Matrix array at 100%, 50% and 30% gating windows and gamma scores were calculated comparing moving delivery results to the stationary result. It is important to note that as one moves to tighter gating windows, the delivery efficiency will be impacted by the linac's beam-on latency. Using a specialized software package, we generated beam-on signals of lengths of 1000ms, 600ms, 450ms, 400ms, 350ms and 300ms. As the gating windows get tighter, one can expect to reach a point where the dose rate will fall to nearly zero, indicating that the gating window is close to beam-on latency. A clinically useful gating window needs to be significantly longer than the latency for the linac. Results: As expected, the use of tighter gating windows improved delivery accuracy. However, a lower limit of the gating window, largely defined by linac beam-on latency, exists at around 300ms. Conclusion: The Response gating kit, combined with the C-RAD Catalyst, provides an effective solution for respiratorygated treatment delivery. Careful patient selection, gating window design, even visual/audio coaching may be necessary to ensure both delivery quality and efficiency. This research project is funded by Elekta.

  5. GATE Center of Excellence in Lightweight Materials and Manufacturing

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Technologies | Department of Energy Lightweight Materials and Manufacturing Technologies GATE Center of Excellence in Lightweight Materials and Manufacturing Technologies 2012 DOE Hydrogen and Fuel Cells Program and Vehicle Technologies Program Annual Merit Review and Peer Evaluation Meeting ti026_vaidya_2012_p.pdf (4.01 MB) More Documents & Publications GATE Center of Excellence at UAB in Lightweight Materials for Automotive Applications GATE Center of Excellence in Lightweight

  6. GATE Center of Excellence in Lightweight Materials and Manufacturing...

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Technologies Vehicle Technologies Office Merit Review 2014: GATE Center of Excellence at UAB for Lightweight Materials and Manufacturing for Automotive, Truck and Mass Transit...

  7. Vehicle Technologies Office Merit Review 2015: Gate Driver Optimizatio...

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Gate Driver Optimization for WBG Applications Vehicle Technologies Office Merit Review ... Presentation given by Oak Ridge National Laboratory at 2015 DOE Hydrogen and Fuel Cells ...

  8. High Temperature, High Voltage Fully Integrated Gate Driver Circuit...

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    D.C. PDF icon ape003tolbert2010p.pdf More Documents & Publications High Temperature, High Voltage Fully Integrated Gate Driver Circuit Wide Bandgap Materials Smart ...

  9. High Temperature, High Voltage Fully Integrated Gate Driver Circuit...

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    -- Washington D.C. PDF icon ape03marlino.pdf More Documents & Publications High Temperature, High Voltage Fully Integrated Gate Driver Circuit Smart Integrated Power Module ...

  10. Gates County, North Carolina: Energy Resources | Open Energy...

    OpenEI (Open Energy Information) [EERE & EIA]

    Gates County, North Carolina: Energy Resources Jump to: navigation, search Equivalent URI DBpedia Coordinates 36.4202077, -76.6874701 Show Map Loading map......

  11. Quantifying Cradle-to-Farm Gate Life Cycle Impacts Associated...

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Quantifying Cradle-to-Farm Gate Life Cycle Impacts Associated with Fertilizer used for Corn, Soybean, and Stover Production Fertilizer use can cause environmental problems, ...

  12. Penn State DOE Graduate Automotive Technology Education (Gate...

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Penn State DOE Graduate Automotive Technology Education (Gate) Program for In-Vehicle, High-Power Energy Storage Systems Penn State DOE Graduate Automotive Technology Education ...

  13. PIA - Savannah River Nuclear Solution (SRNS) MedGate Occupational...

    Energy Saver

    PIA - Savannah River Nuclear Solution (SRNS) MedGate Occupational Health and Safety Medical System (OHS) (Includes the Drug and Alcohol Testing System (Assistant)) PIA - Savannah...

  14. PIA - Savannah River Nuclear Solution (SRNS) MedGate Occupational...

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Health and Safety Medical System (OHS) (Includes the Drug and Alcohol Testing System (Assistant)) PIA - Savannah River Nuclear Solution (SRNS) MedGate Occupational Health and ...

  15. Stage Gate Review Guide for the Industrial Technologies Program

    Office of Energy Efficiency and Renewable Energy (EERE)

    Stage-Gate Innovation Management Guidelines: Managing Risk Through Structured Project Decision-Making, February 2007. From the Industrial Technologies Program (now the Advanced Manufacturing Office).

  16. Thermosensitive gating effect and selective gas adsorption in...

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    Thermosensitive gating effect and selective gas adsorption in a porous coordination nanocage Previous Next List Dan Zhao , Daqiang Yuan , Rajamani Krishna , Jasper M. van Baten and...

  17. GATE Global Alternative Energy Holding AG | Open Energy Information

    OpenEI (Open Energy Information) [EERE & EIA]

    Energy Holding AG Place: Wrzburg, Bavaria, Germany Zip: 97080 Product: Germany-based biodiesel producer. References: GATE Global Alternative Energy Holding AG1 This article...

  18. Vehicle Technologies Office: Graduate Automotive Technology Education (GATE)

    Energy.gov [DOE]

    DOE established the Graduate Automotive Technology Education (GATE) Centers of Excellence to provide future generations of engineers and scientists with knowledge and skills in advanced automotive...

  19. Transistor-based filter for inhibiting load noise from entering a power supply

    DOEpatents

    Taubman, Matthew S

    2013-07-02

    A transistor-based filter for inhibiting load noise from entering a power supply is disclosed. The filter includes a first transistor having an emitter coupled to a power supply, a collector coupled to a load, and a base. The filter also includes a first capacitor coupled between the base of the first transistor and a ground terminal. The filter further includes an impedance coupled between the base and a node between the collector and the load, or a second transistor and second capacitor. The impedance can be a resistor or an inductor.

  20. Transistor-based filter for inhibiting load noise from entering a power supply

    DOEpatents

    Taubman, Matthew S

    2015-02-24

    A transistor-based filter for inhibiting load noise from entering a power supply is disclosed. The filter includes a first transistor having an emitter coupled to a power supply, a collector coupled to a load, and a base. The filter also includes a first capacitor coupled between the base of the first transistor and a ground terminal The filter further includes an impedance coupled between the base and a node between the collector and the load, or a second transistor and second capacitor. The impedance can be a resistor or an inductor.

  1. Speed control system for an access gate

    SciTech Connect

    Bzorgi, Fariborz M.

    2012-03-20

    An access control apparatus for an access gate. The access gate typically has a rotator that is configured to rotate around a rotator axis at a first variable speed in a forward direction. The access control apparatus may include a transmission that typically has an input element that is operatively connected to the rotator. The input element is generally configured to rotate at an input speed that is proportional to the first variable speed. The transmission typically also has an output element that has an output speed that is higher than the input speed. The input element and the output element may rotate around a common transmission axis. A retardation mechanism may be employed. The retardation mechanism is typically configured to rotate around a retardation mechanism axis. Generally the retardation mechanism is operatively connected to the output element of the transmission and is configured to retard motion of the access gate in the forward direction when the first variable speed is above a control-limit speed. In many embodiments the transmission axis and the retardation mechanism axis are substantially co-axial. Some embodiments include a freewheel/catch mechanism that has an input connection that is operatively connected to the rotator. The input connection may be configured to engage an output connection when the rotator is rotated at the first variable speed in a forward direction and configured for substantially unrestricted rotation when the rotator is rotated in a reverse direction opposite the forward direction. The input element of the transmission is typically operatively connected to the output connection of the freewheel/catch mechanism.

  2. Electrical characteristics of multilayer MoS{sub 2} transistors at real operating temperatures with different ambient conditions

    SciTech Connect

    Kwon, Hyuk-Jun; Grigoropoulos, Costas P.; Jang, Jaewon Subramanian, Vivek; Kim, Sunkook

    2014-10-13

    Atomically thin, two-dimensional (2D) materials with bandgaps have attracted increasing research interest due to their promising electronic properties. Here, we investigate carrier transport and the impact of the operating ambient conditions on back-gated multilayer MoS{sub 2} field-effect transistors with a thickness of ?50?nm at their realistic working temperatures and under different ambient conditions (in air and in a vacuum of ?10{sup ?5}?Torr). Increases in temperature cause increases in I{sub min} (likely due to thermionic emission at defects), and result in decreased I{sub on} at high V{sub G} (likely due to increased phonon scattering). Thus, the I{sub on}/I{sub min} ratio decreases as the temperature increases. Moreover, the ambient effects with working temperatures on field effect mobilities were investigated. The adsorbed oxygen and water created more defect sites or impurities in the MoS{sub 2} channel, which can lead another scattering of the carriers. In air, the adsorbed molecules and phonon scattering caused a reduction of the field effect mobility, significantly. These channel mobility drop-off rates in air and in a vacuum reached 0.12?cm{sup 2}/V s K and 0.07?cm{sup 2}/V s K, respectively; the rate of degradation is steeper in air than in a vacuum due to enhanced phonon mode by the adsorbed oxygen and water molecules.

  3. Modeling gated neutron images of THD capsules

    SciTech Connect

    Wilson, Douglas Carl; Grim, Gary P; Tregillis, Ian L; Wilke, Mark D; Morgan, George L; Loomis, Eric N; Wilde, Carl H; Oertel, John A; Fatherley, Valerie E; Clark, David D; Schmitt, Mark J; Merrill, Frank E; Wang, Tai - Sen F; Danly, Christopher R; Batha, Steven H; Patel, M; Sepke, S; Hatarik, R; Fittinghoff, D; Bower, D; Marinak, M; Munro, D; Moran, M; Hilko, R; Frank, M; Buckles, R

    2010-01-01

    Time gating a neutron detector 28m from a NIF implosion can produce images at different energies. The brighter image near 14 MeV reflects the size and symmetry of the capsule 'hot spot'. Scattered neutrons, {approx}9.5-13 MeV, reflect the size and symmetry of colder, denser fuel, but with only {approx}1-7% of the neutrons. The gated detector records both the scattered neutron image, and, to a good approximation, an attenuated copy of the primary image left by scintillator decay. By modeling the imaging system the energy band for the scattered neutron image (10-12 MeV) can be chosen, trading off the decayed primary image and the decrease of scattered image brightness with energy. Modeling light decay from EJ399, BC422, BCF99-55, Xylene, DPAC-30, and Liquid A leads to a preference from BCF99-55 for the first NIF detector, but DPAC 30 and Liquid A would be preferred if incorporated into a system. Measurement of the delayed light from the NIF scintillator using implosions at the Omega laser shows BCF99-55 to be a good choice for down-scattered imaging at 28m.

  4. University of Illinois at Urbana-Champaigns GATE Center for...

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Champaigns GATE Center for Advanced Automotive Bio-Fuel Combustion Engines University of Illinois at Urbana-Champaigns GATE Center for Advanced Automotive Bio-Fuel Combustion ...

  5. Apparatus and method for recharging a string a avalanche transistors within a pulse generator

    DOEpatents

    Fulkerson, E. Stephen

    2000-01-01

    An apparatus and method for recharging a string of avalanche transistors within a pulse generator is disclosed. A plurality of amplification stages are connected in series. Each stage includes an avalanche transistor and a capacitor. A trigger signal, causes the apparatus to generate a very high voltage pulse of a very brief duration which discharges the capacitors. Charge resistors inject current into the string of avalanche transistors at various points, recharging the capacitors. The method of the present invention includes the steps of supplying current to charge resistors from a power supply; using the charge resistors to charge capacitors connected to a set of serially connected avalanche transistors; triggering the avalanche transistors; generating a high-voltage pulse from the charge stored in the capacitors; and recharging the capacitors through the charge resistors.

  6. Combustion-process derived comparable performances of Zn-(In:Sn)-O thin-film transistors with a complete miscibility

    SciTech Connect

    Jiang, Qingjun; Lu, Jianguo Cheng, Jipeng; Sun, Rujie; Feng, Lisha; Dai, Wen; Yan, Weichao; Ye, Zhizhen; Li, Xifeng

    2014-09-29

    Amorphous zinc-indium-tin oxide (a-ZITO) thin-film transistors (TFTs) have been prepared using a low-temperature combustion process, with an emphasis on complete miscibility of In and Sn contents. The a-ZITO TFTs were comparatively studied in detail, especially for the working stability. The a-ZITO TFTs all exhibited acceptable and excellent behaviors from Sn-free TFTs to In-free TFTs. The obtained a-ZTO TFTs presented a field-effect mobility of 1.20?cm{sup 2} V{sup ?1} s{sup ?1}, an on/off current ratio of 4.89??10{sup 6}, and a long-term stability under positive bias stress, which are comparable with those of the a-ZIO TFTs. The In-free a-ZTO TFTs are very potential for electrical applications with a low cost.

  7. Bottom-up graphene nanoribbon field-effect transistors

    SciTech Connect

    Bennett, Patrick B.; Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, California 94720 ; Pedramrazi, Zahra; Madani, Ali; Chen, Yen-Chia; Crommie, Michael F.; Materials Sciences Division, Lawrence Berkeley National Laboratories, Berkeley, California 94720 ; Oteyza, Dimas G. de; Centro de Física de Materiales CSIC Chen, Chen; Fischer, Felix R.; Materials Sciences Division, Lawrence Berkeley National Laboratories, Berkeley, California 94720 ; Bokor, Jeffrey; Materials Sciences Division, Lawrence Berkeley National Laboratories, Berkeley, California 94720

    2013-12-16

    Recently developed processes have enabled bottom-up chemical synthesis of graphene nanoribbons (GNRs) with precise atomic structure. These GNRs are ideal candidates for electronic devices because of their uniformity, extremely narrow width below 1 nm, atomically perfect edge structure, and desirable electronic properties. Here, we demonstrate nano-scale chemically synthesized GNR field-effect transistors, made possible by development of a reliable layer transfer process. We observe strong environmental sensitivity and unique transport behavior characteristic of sub-1 nm width GNRs.

  8. Enhanced shot noise in carbon nanotube field-effect transistors

    SciTech Connect

    Betti, A.; Fiori, G.; Iannaccone, G.

    2009-12-21

    We predict shot noise enhancement in defect-free carbon nanotube field-effect transistors through a numerical investigation based on the self-consistent solution of the Poisson and Schroedinger equations within the nonequilibrium Green's functions formalism, and on a Monte Carlo approach to reproduce injection statistics. Noise enhancement is due to the correlation between trapping of holes from the drain into quasibound states in the channel and thermionic injection of electrons from the source, and can lead to an appreciable Fano factor of 1.22 at room temperature.

  9. Electrical properties of single CuO nanowires for device fabrication: Diodes and field effect transistors

    SciTech Connect

    Florica, Camelia; Costas, Andreea; Boni, Andra Georgia; Negrea, Raluca; Preda, Nicoleta E-mail: encu@infim.ro; Pintilie, Lucian; Enculescu, Ionut E-mail: encu@infim.ro; Ion, Lucian

    2015-06-01

    High aspect ratio CuO nanowires are synthesized by a simple and scalable method, thermal oxidation in air. The structural, morphological, optical, and electrical properties of the semiconducting nanowires were studied. Au-Ti/CuO nanowire and Pt/CuO nanowire electrical contacts were investigated. A dominant Schottky mechanism was evidenced in the Au-Ti/CuO nanowire junction and an ohmic behavior was observed for the Pt/CuO nanowire junction. The Pt/CuO nanowire/Pt structure allows the measurements of the intrinsic transport properties of the single CuO nanowires. It was found that an activation mechanism describes the behavior at higher temperatures, while a nearest neighbor hopping transport mechanism is characteristic at low temperatures. This was also confirmed by four-probe resistivity measurements on the single CuO nanowires. By changing the metal/semiconductor interface, devices such as Schottky diodes and field effect transistors based on single CuO p-type nanowire semiconductor channel are obtained. These devices are suitable for being used in various electronic circuits where their size related properties can be exploited.

  10. Gated Si nanowires for large thermoelectric power factors

    SciTech Connect

    Neophytou, Neophytos; Kosina, Hans

    2014-08-18

    We investigate the effect of electrostatic gating on the thermoelectric power factor of p-type Si nanowires (NWs) of up to 20 nm in diameter in the [100], [110], and [111] crystallographic transport orientations. We use atomistic tight-binding simulations for the calculation of the NW electronic structure, coupled to linearized Boltzmann transport equation for the calculation of the thermoelectric coefficients. We show that gated NW structures can provide ∼5× larger thermoelectric power factor compared to doped channels, attributed to their high hole phonon-limited mobility, as well as gating induced bandstructure modifications which further improve mobility. Despite the fact that gating shifts the charge carriers near the NW surface, surface roughness scattering is not strong enough to degrade the transport properties of the accumulated hole layer. The highest power factor is achieved for the [111] NW, followed by the [110], and finally by the [100] NW. As the NW diameter increases, the advantage of the gated channel is reduced. We show, however, that even at 20 nm diameters (the largest ones that we were able to simulate), a ∼3× higher power factor for gated channels is observed. Our simulations suggest that the advantage of gating could still be present in NWs with diameters of up to ∼40 nm.

  11. New Flexible Channels for Room Temperature Tunneling Field Effect Transistors

    DOE PAGES [OSTI]

    Hao, Boyi; Asthana, Anjana; Hazaveh, Paniz Khanmohammadi; Bergstrom, Paul L.; Banyai, Douglas; Savaikar, Madhusudan A.; Jaszczak, John A.; Yap, Yoke Khin

    2016-02-05

    Tunneling field effect transistors (TFETs) have been proposed to overcome the fundamental issues of Si based transistors, such as short channel effect, finite leakage current, and high contact resistance. Unfortunately, most if not all TFETs are operational only at cryogenic temperatures. Here we report that iron (Fe) quantum dots functionalized boron nitride nanotubes (QDs-BNNTs) can be used as the flexible tunneling channels of TFETs at room temperatures. The electrical insulating BNNTs are used as the one-dimensional (1D) substrates to confine the uniform formation of Fe QDs on their surface as the flexible tunneling channel. Consistent semiconductor-like transport behaviors under variousmore » bending conditions are detected by scanning tunneling spectroscopy in a transmission electron microscopy system (insitu STM-TEM). Ultimately, as suggested by computer simulation, the uniform distribution of Fe QDs enable an averaging effect on the possible electron tunneling pathways, which is responsible for the consistent transport properties that are not sensitive to bending.« less

  12. Nonlinear photoresponse of field effect transistors terahertz detectors at high irradiation intensities

    SciTech Connect

    But, D. B.; Drexler, C.; Ganichev, S. D.; Sakhno, M. V.; Sizov, F. F.; Dyakonova, N.; Drachenko, O.; Gutin, A.; Knap, W.

    2014-04-28

    Terahertz power dependence of the photoresponse of field effect transistors, operating at frequencies from 0.1 to 3 THz for incident radiation power density up to 100 kW/cm{sup 2} was studied for Si metal–oxide–semiconductor field-effect transistors and InGaAs high electron mobility transistors. The photoresponse increased linearly with increasing radiation intensity up to the kW/cm{sup 2} range. Nonlinearity followed by saturation of the photoresponse was observed for all investigated field effect transistors for intensities above several kW/cm{sup 2}. The observed photoresponse nonlinearity is explained by nonlinearity and saturation of the transistor channel current. A theoretical model of terahertz field effect transistor photoresponse at high intensity was developed. The model explains quantitative experimental data both in linear and nonlinear regions. Our results show that dynamic range of field effect transistors is very high and can extend over more than six orders of magnitudes of power densities (from ∼0.5 mW/cm{sup 2} to ∼5 kW/cm{sup 2})

  13. Reprogrammable read only variable threshold transistor memory with isolated addressing buffer

    DOEpatents

    Lodi, Robert J.

    1976-01-01

    A monolithic integrated circuit, fully decoded memory comprises a rectangular array of variable threshold field effect transistors organized into a plurality of multi-bit words. Binary address inputs to the memory are decoded by a field effect transistor decoder into a plurality of word selection lines each of which activates an address buffer circuit. Each address buffer circuit, in turn, drives a word line of the memory array. In accordance with the word line selected by the decoder the activated buffer circuit directs reading or writing voltages to the transistors comprising the memory words. All of the buffer circuits additionally are connected to a common terminal for clearing all of the memory transistors to a predetermined state by the application to the common terminal of a large magnitude voltage of a predetermined polarity. The address decoder, the buffer and the memory array, as well as control and input/output control and buffer field effect transistor circuits, are fabricated on a common substrate with means provided to isolate the substrate of the address buffer transistors from the remainder of the substrate so that the bulk clearing function of simultaneously placing all of the memory transistors into a predetermined state can be performed.

  14. Stage Gate Review Guide for the Biomass Program | Department of Energy

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Biomass Program Stage Gate Review Guide for the Biomass Program Stage Gate Management in the Biomass Program (now the Bioenergy Technologies Office), a document from February 2005. Stage Gate Review Guide (282.61 KB) More Documents & Publications Stage Gate Review Guide for the Industrial Technologies Program 2009 Biochemical Conversion Platform Review Report 2009 Thermochemical Conversion Platform Review Report

  15. Ultrafast terahertz gating of the polarization and giant nonlinear...

    Office of Scientific and Technical Information (OSTI)

    Journal Article: Ultrafast terahertz gating of the polarization and giant nonlinear optical response in BiFeO3 thin films Citation Details In-Document Search Title: Ultrafast ...

  16. Liquid-based gating mechanism with tunable multiphase selectivity...

    Office of Scientific and Technical Information (OSTI)

    uses a capillary-stabilized liquid as a reversible, reconfigurable gate that fills and seals pores in the closed state, and creates a non-fouling, liquid-lined pore in the open ...

  17. Cryogenic Preamplification of a Single-Electron-Transistor using a Silicon-Germanium Heterojunction-Bipolar-Transistor

    SciTech Connect

    Curry, Matthew J.; England, Troy Daniel; Bishop, Nathaniel; Ten Eyck, Gregory A.; Wendt, Joel R.; Pluym, Tammy; Lilly, Michael; Carr, Stephen M; Carroll, Malcolm S.

    2015-05-21

    We examine a silicon-germanium heterojunction bipolar transistor (HBT) for cryogenic pre-amplification of a single electron transistor (SET). The SET current modulates the base current of the HBT directly. The HBT-SET circuit is immersed in liquid helium, and its frequency response from low frequency to several MHz is measured. The current gain and the noise spectrum with the HBT result in a signal-to-noise-ratio (SNR) that is a factor of 10100 larger than without the HBT at lower frequencies. Furthermore, the transition frequency defined by SNR = 1 has been extended by as much as a factor of 10 compared to without the HBT amplification. The power dissipated by the HBT cryogenic pre-amplifier is approximately 5 nW to 5 ?W for the investigated range of operation. We found that the circuit is also operated in a single electron charge read-out configuration in the time-domain as a proof-of-principle demonstration of the amplification approach for single spin read-out.

  18. Cryogenic Preamplification of a Single-Electron-Transistor using a Silicon-Germanium Heterojunction-Bipolar-Transistor

    DOE PAGES [OSTI]

    Curry, Matthew J.; England, Troy Daniel; Bishop, Nathaniel; Ten Eyck, Gregory A.; Wendt, Joel R.; Pluym, Tammy; Lilly, Michael; Carr, Stephen M; Carroll, Malcolm S.

    2015-05-21

    We examine a silicon-germanium heterojunction bipolar transistor (HBT) for cryogenic pre-amplification of a single electron transistor (SET). The SET current modulates the base current of the HBT directly. The HBT-SET circuit is immersed in liquid helium, and its frequency response from low frequency to several MHz is measured. The current gain and the noise spectrum with the HBT result in a signal-to-noise-ratio (SNR) that is a factor of 10–100 larger than without the HBT at lower frequencies. Furthermore, the transition frequency defined by SNR = 1 has been extended by as much as a factor of 10 compared to withoutmore » the HBT amplification. The power dissipated by the HBT cryogenic pre-amplifier is approximately 5 nW to 5 μW for the investigated range of operation. We found that the circuit is also operated in a single electron charge read-out configuration in the time-domain as a proof-of-principle demonstration of the amplification approach for single spin read-out.« less

  19. Cryogenic Preamplification of a Single-Electron-Transistor using a Silicon-Germanium Heterojunction-Bipolar-Transistor

    SciTech Connect

    Curry, Matthew J.; England, Troy Daniel; Bishop, Nathaniel; Ten Eyck, Gregory A.; Wendt, Joel R.; Pluym, Tammy; Lilly, Michael; Carr, Stephen M; Carroll, Malcolm S.

    2015-05-21

    We examine a silicon-germanium heterojunction bipolar transistor (HBT) for cryogenic pre-amplification of a single electron transistor (SET). The SET current modulates the base current of the HBT directly. The HBT-SET circuit is immersed in liquid helium, and its frequency response from low frequency to several MHz is measured. The current gain and the noise spectrum with the HBT result in a signal-to-noise-ratio (SNR) that is a factor of 10–100 larger than without the HBT at lower frequencies. Furthermore, the transition frequency defined by SNR = 1 has been extended by as much as a factor of 10 compared to without the HBT amplification. The power dissipated by the HBT cryogenic pre-amplifier is approximately 5 nW to 5 μW for the investigated range of operation. We found that the circuit is also operated in a single electron charge read-out configuration in the time-domain as a proof-of-principle demonstration of the amplification approach for single spin read-out.

  20. Fabrication and electrical properties of single wall carbon nanotube channel and graphene electrode based transistors arrays

    SciTech Connect

    Seo, M.; Kim, H.; Kim, Y. H.; Yun, H.; McAllister, K.; Lee, S. W.; Na, J.; Kim, G. T.; Lee, B. J.; Kim, J. J.; Jeong, G. H.; Lee, I.; Kim, K. S.

    2015-07-20

    A transistor structure composed of an individual single-walled carbon nanotube (SWNT) channel with a graphene electrode was demonstrated. The integrated arrays of transistor devices were prepared by transferring patterned graphene electrode patterns on top of the aligned SWNT along one direction. Both single and multi layer graphene were used for the electrode materials; typical p-type transistor and Schottky diode behavior were observed, respectively. Based on our fabrication method and device performances, several issues are suggested and discussed to improve the device reliability and finally to realize all carbon based future electronic systems.

  1. Bill Gates visit to Idaho validates innovation role for national

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    laboratories FOR IMMEDIATE RELEASE Oct. 24, 2013 NEWS MEDIA CONTACTS: Amy Lientz, 208-520-7718, amy.lientz@inl.gov Teri Ehresman, 208-526-7785, teri.ehresman@inl.gov Bill Gates visit to Idaho validates innovation role for national laboratories IDAHO FALLS - Privately funded research utilizing government owned facilities validates the important role national laboratories have in advancing innovation. Bill Gates, American business magnate and chair of the nuclear reactor startup company

  2. Final Technical GATE Report, 1998-2006

    SciTech Connect

    GATE Fuel Cell Vehicle Center

    2006-09-30

    In 1998, the U.S. Department of Energy (DOE) funded 10 proposals to establish graduate automotive technology education (GATE) centers of excellence at nine universities, each addressing a specific technological area. The University of California, Davis was chosen for two centers: Fuel Cell Center and Hybrid-Electric Vehicle Design Center (power drivetrains and control strategies). This report is specific to the Fuel Cell Center only, which was housed at the UC Davis Institute of Transportation Studies (ITS-Davis). ITS-Davis created the Fuel Cell Vehicle Center, with the following goals: (1) create an interdisciplinary fuel cell vehicle curriculum that cuts across engineering, the physical sciences and, to a lesser extent, the social sciences; (2) expand and strengthen the then-emerging multidisciplinary fuel cell vehicle research program; (3) strengthen links with industry; (4) create an active public outreach program; and (5) serve as neutral ground for interactions between academia, the auto, energy, and technology industries, government, and public-interest non-governmental organizations. At the time of proposal, the Center had a solid track record in fuel cell research, strong connections with industry, strong campus support, a core group of distinguished and motivated faculty, and an established institutional foundation for fuel cell vehicle research and education.

  3. Impulse radar with swept range gate

    DOEpatents

    McEwan, T.E.

    1998-09-08

    A radar range finder and hidden object locator is based on ultra-wide band radar with a high resolution swept range gate. The device generates an equivalent time amplitude scan with a typical range of 4 inches to 20 feet, and an analog range resolution as limited by a jitter of on the order of 0.01 inches. A differential sampling receiver is employed to effectively eliminate ringing and other aberrations induced in the receiver by the near proximity of the transmit antenna, so a background subtraction is not needed, simplifying the circuitry while improving performance. Techniques are used to reduce clutter in the receive signal, such as decoupling the receive and transmit cavities by placing a space between them, using conductive or radiative damping elements on the cavities, and using terminating plates on the sides of the openings. The antennas can be arranged in a side-by-side parallel spaced apart configuration or in a coplanar opposed configuration which significantly reduces main bang coupling. 25 figs.

  4. Impulse radar with swept range gate

    DOEpatents

    McEwan, Thomas E. (Livermore, CA)

    1998-09-08

    A radar range finder and hidden object locator is based on ultra-wide band radar with a high resolution swept range gate. The device generates an equivalent time amplitude scan with a typical range of 4 inches to 20 feet, and an analog range resolution as limited by a jitter of on the order of 0.01 inches. A differential sampling receiver is employed to effectively eliminate ringing and other aberrations induced in the receiver by the near proximity of the transmit antenna (10), so a background subtraction is not needed, simplifying the circuitry while improving performance. Techniques are used to reduce clutter in the receive signal, such as decoupling the receive (24) and transmit cavities (22) by placing a space between them, using conductive or radiative damping elements on the cavities, and using terminating plates on the sides of the openings. The antennas can be arranged in a side-by-side parallel spaced apart configuration or in a coplanar opposed configuration which significantly reduces main bang coupling.

  5. Gated integrator with signal baseline subtraction

    DOEpatents

    Wang, X.

    1996-12-17

    An ultrafast, high precision gated integrator includes an opamp having differential inputs. A signal to be integrated is applied to one of the differential inputs through a first input network, and a signal indicative of the DC offset component of the signal to be integrated is applied to the other of the differential inputs through a second input network. A pair of electronic switches in the first and second input networks define an integrating period when they are closed. The first and second input networks are substantially symmetrically constructed of matched components so that error components introduced by the electronic switches appear symmetrically in both input circuits and, hence, are nullified by the common mode rejection of the integrating opamp. The signal indicative of the DC offset component is provided by a sample and hold circuit actuated as the integrating period begins. The symmetrical configuration of the integrating circuit improves accuracy and speed by balancing out common mode errors, by permitting the use of high speed switching elements and high speed opamps and by permitting the use of a small integrating time constant. The sample and hold circuit substantially eliminates the error caused by the input signal baseline offset during a single integrating window. 5 figs.

  6. Gated integrator with signal baseline subtraction

    DOEpatents

    Wang, Xucheng

    1996-01-01

    An ultrafast, high precision gated integrator includes an opamp having differential inputs. A signal to be integrated is applied to one of the differential inputs through a first input network, and a signal indicative of the DC offset component of the signal to be integrated is applied to the other of the differential inputs through a second input network. A pair of electronic switches in the first and second input networks define an integrating period when they are closed. The first and second input networks are substantially symmetrically constructed of matched components so that error components introduced by the electronic switches appear symmetrically in both input circuits and, hence, are nullified by the common mode rejection of the integrating opamp. The signal indicative of the DC offset component is provided by a sample and hold circuit actuated as the integrating period begins. The symmetrical configuration of the integrating circuit improves accuracy and speed by balancing out common mode errors, by permitting the use of high speed switching elements and high speed opamps and by permitting the use of a small integrating time constant. The sample and hold circuit substantially eliminates the error caused by the input signal baseline offset during a single integrating window.

  7. Rapidly reconfigurable all-optical universal logic gate

    DOEpatents

    Goddard, Lynford L.; Bond, Tiziana C.; Kallman, Jeffrey S.

    2010-09-07

    A new reconfigurable cascadable all-optical on-chip device is presented. The gate operates by combining the Vernier effect with a novel effect, the gain-index lever, to help shift the dominant lasing mode from a mode where the laser light is output at one facet to a mode where it is output at the other facet. Since the laser remains above threshold, the speed of the gate for logic operations as well as for reprogramming the function of the gate is primarily limited to the small signal optical modulation speed of the laser, which can be on the order of up to about tens of GHz. The gate can be rapidly and repeatedly reprogrammed to perform any of the basic digital logic operations by using an appropriate analog optical or electrical signal at the gate selection port. Other all-optical functionality includes wavelength conversion, signal duplication, threshold switching, analog to digital conversion, digital to analog conversion, signal routing, and environment sensing. Since each gate can perform different operations, the functionality of such a cascaded circuit grows exponentially.

  8. ALD TiO2-Al2O3 Stack: An Improved Gate Dielectrics on Ga-polar GaN MOSCAPs

    DOE PAGES [OSTI]

    Wei, Daming; Edgar, James H.; Briggs, Dayrl P.; Srijanto, Bernadeta R.; Retterer, Scott T.; Meyer, III, Harry M.

    2014-10-15

    This research focuses on the benefits and properties of TiO2-Al2O3 nano-stack thin films deposited on Ga2O3/GaN by plasma-assisted atomic layer deposition (PA-ALD) for gate dielectric development. This combination of materials achieved a high dielectric constant, a low leakage current, and a low interface trap density. Correlations were sought between the films’ structure, composition, and electrical properties. The gate dielectrics were approximately 15 nm thick and contained 5.1 nm TiO2, 7.1 nm Al2O3 and 2 nm Ga2O3 as determined by spectroscopic ellipsometry. The interface carbon concentration, as measured by x-ray photoelectron spectroscopy (XPS) depth profile, was negligible for GaN pretreated bymore » thermal oxidation in O2 for 30 minutes at 850°C. The RMS roughness slightly increased after thermal oxidation and remained the same after ALD of the nano-stack, as determined by atomic force microscopy. The dielectric constant of TiO2-Al2O3 on Ga2O3/GaN was increased to 12.5 compared to that of pure Al2O3 (8~9) on GaN. In addition, the nano-stack's capacitance-voltage (C-V) hysteresis was small, with a total trap density of 8.74 × 1011 cm-2. The gate leakage current density (J=2.81× 10-8 A/cm2) was low at +1 V gate bias. These results demonstrate the promising potential of plasma ALD deposited TiO2/Al2O3 for serving as the gate oxide on Ga2O3/GaN based MOS devices.« less

  9. Encapsulated graphene field-effect transistors for air stable operation

    SciTech Connect

    Alexandrou, Konstantinos Kymissis, Ioannis; Petrone, Nicholas; Hone, James

    2015-03-16

    In this work, we report the fabrication of encapsulated graphene field effects transistors (GFETs) with excellent air stability operation in ambient environment. Graphene's 2D nature makes its electronics properties very sensitive to the surrounding environment, and thus, non-encapsulated graphene devices show extensive vulnerability due to unintentional hole doping from the presence of water molecules and oxygen limiting their performance and use in real world applications. Encapsulating GFETs with a thin layer of parylene-C and aluminum deposited on top of the exposed graphene channel area resulted in devices with excellent electrical performance stability for an extended period of time. Moisture penetration is reduced significantly and carrier mobility degraded substantially less when compared to non-encapsulated control devices. Our CMOS compatible encapsulation method minimizes the problems of environmental doping and lifetime performance degradation, enabling the operation of air stable devices for next generation graphene-based electronics.

  10. Polarization of Bi{sub 2}Te{sub 3} thin film in a floating-gate capacitor structure

    SciTech Connect

    Yuan, Hui E-mail: qli6@gmu.edu; Li, Haitao; Zhu, Hao; Zhang, Kai; Baumgart, Helmut; Bonevich, John E.; Richter, Curt A.; Li, Qiliang E-mail: qli6@gmu.edu

    2014-12-08

    Metal-Oxide-Semiconductor (MOS) capacitors with Bi{sub 2}Te{sub 3} thin film sandwiched and embedded inside the oxide layer have been fabricated and studied. The capacitors exhibit ferroelectric-like hysteresis which is a result of the robust, reversible polarization of the Bi{sub 2}Te{sub 3} thin film while the gate voltage sweeps. The temperature-dependent capacitance measurement indicates that the activation energy is about 0.33?eV for separating the electron and hole pairs in the bulk of Bi{sub 2}Te{sub 3}, and driving them to either the top or bottom surface of the thin film. Because of the fast polarization speed, potentially excellent endurance, and the complementary metaloxidesemiconductor compatibility, the Bi{sub 2}Te{sub 3} embedded MOS structures are very interesting for memory application.

  11. Innovative secondary support systems for gate roads

    SciTech Connect

    Barczak, T.; Molinda, G.M.; Zelanko, J.C.

    1996-12-31

    With the development of the shield support, the primary requirement for successful ground control in longwall mining is to provide stable gate road and bleeder entries. Wood cribbing has been the dominant form of secondary and supplemental support. However, the cost and limited availability of timber, along with the poor performance of softwood crib supports, has forced western U.S. mines to explore the utilization of support systems other than conventional wood cribbing. The recent success of cable bolts has engendered much interest from western operators. Eastern U.S. coal operators are also now experimenting with various intrinsic and freestanding alternative support systems that provide effective ground control while reducing material handling costs and injuries. These innovative freestanding support systems include (1) {open_quotes}The Can{close_quotes} support by Burrell Mining Products International, Inc., (2) Hercules and Link-N-Lock wood cribs and Propsetter supports by Strata Products (USA) Inc., (3) Variable Yielding Crib and Power Crib supports by Mountainland Support Systems, (4) the Confined Core Crib developed by Southern Utah Fuels Corporation; and (5) the MEGA prop by MBK Hydraulik. This paper assesses design considerations and compares the performance and application of these alternative secondary support systems. Support performance in the form of load-displacement behavior is compared to conventional wood cribbing. Much of the data was developed through full-scale tests conducted by the U.S. Bureau of Mines (USBM) at the Strategic Structures Testing Laboratory in the unique Mine Roof Simulator load frame at the Pittsburgh Research Center. A summary of current mine experience with these innovative supports is also documented.

  12. Stories of Discovery & Innovation: Beyond the Transistor | U.S. DOE Office

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    of Science (SC) Beyond the Transistor Energy Frontier Research Centers (EFRCs) EFRCs Home Centers Research Science Highlights News & Events EFRC News EFRC Events DOE Announcements Publications History Contact BES Home 10.12.11 Stories of Discovery & Innovation: Beyond the Transistor Print Text Size: A A A Subscribe FeedbackShare Page EFRC researchers fabricate a novel device for channeling light. This work, featured in the Office of Science's Stories of Discovery & Innovation,

  13. Beyond the Transistor | U.S. DOE Office of Science (SC)

    Office of Science (SC)

    Beyond the Transistor News News Home Featured Articles 2016 2015 2014 2013 2012 2011 2010 2009 2008 2007 2006 2005 Science Headlines Science Highlights Presentations & Testimony News Archives Communications and Public Affairs Contact Information Office of Science U.S. Department of Energy 1000 Independence Ave., SW Washington, DC 20585 P: (202) 586-5430 10.12.11 Beyond the Transistor EFRC researchers fabricate a novel device for channeling light. Print Text Size: A A A Subscribe

  14. Low Voltage, Low Power Organic Light Emitting Transistors for AMOLED Displays

    SciTech Connect

    McCarthy, M. A. [University of Florida, Gainesville; Liu, B. [University of Florida, Gainesville; Donoghue, E. P. [University of Florida, Gainesville; Kravchenko, Ivan I [ORNL; Kim, D. Y. [University of Florida, Gainesville; Reynolds, J. R. [University of Florida, Gainesville; So, Franky [University of Florida, Gainesville; Rinzler, A. G. [University of Florida, Gainesville

    2011-01-01

    Low voltage, low power dissipation, high aperture ratio organic light emitting transistors are demonstrated. The high level of performance is enabled by a carbon nanotube source electrode that permits integration of the drive transistor and the organic light emitting diode into an efficient single stacked device. Given the demonstrated performance, this technology could break the technical logjam holding back widespread deployment of active matrix organic light emitting displays at flat panel screen sizes.

  15. Pressure locking and thermal binding of gate valves

    SciTech Connect

    Kelly, E.M.

    1996-12-01

    Pressure locking and thermal binding represent potential common mode failure mechanisms that can cause safety-related power-operated gate valves to fail in the closed position, thus rendering redundant safety-related systems incapable of performing their safety functions. Supplement 6 to Generic Letter 89-10, {open_quotes}Safety-Related Motor-Operated Gate Valve Testing and Surveillance,{close_quotes} provided an acceptable approach to addressing pressure locking and thermal binding of gate valves. More recently, the NRC has issued Generic Letter 95-07, {open_quotes}Pressure Locking and Thermal Binding of Safety-Related Power-Operated Gate Valves,{close_quotes} to request that licensees take certain actions to ensure that safety-related power-operated gate valves that are susceptible to pressure locking or thermal binding are capable of performing their safety functions within the current licensing bases. Over the past two years, several plants in Region I determined that valves in certain systems were potentially susceptible to pressure locking and thermal binding, and have taken various corrective actions. The NRC Region I Systems Engineering Branch has been actively involved in the inspection of licensee actions in response to the pressure locking and thermal binding issue. Region I continues to maintain an active involvement in this area, including participation with the Office of Nuclear Reactor Regulation in reviewing licensee responses to Generic Letter 95-07.

  16. Deterministic and cascadable conditional phase gate for photonic qubits

    SciTech Connect

    Chudzicki, Christopher; Chuang, Isaac; Shapiro, Jeffrey H.

    2014-12-04

    Previous analyses of conditional ?{sub NL}-phase gates for photonic qubits that treat crossphase modulation (XPM) in a causal, multimode, quantum field setting suggest that a large (?? rad) nonlinear phase shift is always accompanied by fidelity-degrading noise [J. H. Shapiro, Phys. Rev. A 73, 062305 (2006); J. Gea-Banacloche, Phys. Rev. A 81, 043823 (2010)]. Using an atomic V-system to model an XPM medium, we present a conditional phase gate that, for sufficiently small nonzero ?{sub NL}, has high fidelity. The gate is made cascadable by using a special measurement, principal mode projection, to exploit the quantum Zeno effect and preclude the accumulation of fidelity-degrading departures from the principal-mode Hilbert space when both control and target photons illuminate the gate. The nonlinearity of the V-system we study is too weak for this particular implementation to be practical. Nevertheless, the idea of cascading through principal mode projection is of potential use to overcome fidelity degrading noise for a wide variety of nonlinear optical primitive gates.

  17. Effects of breathing variation on gating window internal target volume in respiratory gated radiation therapy

    SciTech Connect

    Cai Jing; McLawhorn, Robert; Read, Paul W.; Larner, James M.; Yin, Fang-fang; Benedict, Stanley H.; Sheng, Ke

    2010-08-15

    Purpose: To investigate the effects of breathing variation on gating window internal target volume (ITV{sub GW}) in respiratory gated radiation therapy. Method and Materials: Two-dimensional dynamic MRI (dMRI) of lung motion was acquired in ten volunteers and eight lung cancer patients. Resorted dMRI using 4DCT acquisition method (RedCAM) was generated for selected subjects by simulating the image rebinning process. A dynamic software generated phantom (dSGP) was created by moving a solid circle (to mimic the ''tumor'') with dMRI-determined motion trajectories. The gating window internal target area (ITA{sub GW}, 2D counterpart of ITV{sub GW}) was determined from both RedCAM and dSGP/dMRI. Its area (A), major axis (L1), minor axis (L2), and similarity (S) were calculated and compared. Results: In the phantom study of 3 cm tumor, measurements of the ITA{sub GW} from dSGP (A=10.0{+-}1.3 cm{sup 2}, L1=3.8{+-}0.4 cm, and L2=3.3{+-}0.1 cm) are significantly (p<0.001) greater than those from RedCAM (A=8.5{+-}0.7 cm{sup 2}, L1=3.5{+-}0.2 cm, and L2=3.1{+-}0.1 cm). Similarly, the differences are significantly greater (p<0.001) for the 1 cm tumor (A=1.9{+-}0.5 cm{sup 2}, L1=1.9{+-}0.4 cm, and L2=1.3{+-}0.1 cm in dSGP; A=1.3{+-}0.1 cm{sup 2}, L1=1.5{+-}0.2 cm, and L2=1.1{+-}0.1 cm in RedCAM). In patient studies, measurements of the ITA{sub GW} from dMRI (A=15.5{+-}8.2 cm{sup 2}, L1=5.0{+-}1.1 cm, and L2=3.8{+-}1.2 cm) are also significantly greater (p<0.05) than those from RedCAM (A=13.2{+-}8.5 cm{sup 2}, L1=4.3{+-}1.4 cm, and L2=3.7{+-}1.2 cm). Similarities were 0.9{+-}0.1, 0.8{+-}0.1, and 0.8{+-}0.1 in the 3 cm tumor phantom, 1 cm tumor phantom, and patient studies, respectively. Conclusion: ITV{sub GW} can be underestimated by 4DCT due to breathing variations. An additional margin may be needed to account for this potential error in generating a PTV{sub GW}. Cautions need to be taken when generating ITV{sub GW} from 4DCT in respiratory gated radiation therapy, especially

  18. Nonlinear transport in ionic liquid gated strontium titanate nanowires

    SciTech Connect

    Bretz-Sullivan, Terence M.; Goldman, A. M.

    2015-09-14

    Measurements of the current-voltage (I–V) characteristics of ionic liquid gated nanometer scale channels of strontium titanate have been carried out. At low gate voltages, the I–V characteristics exhibit a large voltage threshold for conduction and a nonlinear power law behavior at all temperatures measured. The source-drain current of these nanowires scales as a power law of the difference between the source-drain voltage and the threshold voltage. The scaling behavior of the I–V characteristic is reminiscent of collective electronic transport through an array of quantum dots. At large gate voltages, the narrow channel acts as a quasi-1D wire whose conductance follows Landauer's formula for multichannel transport.

  19. Ligand-gated Diffusion Across the Bacterial Outer Membrane

    SciTech Connect

    B Lepore; M Indic; H Pham; E Hearn; D Patel; B van den Berg

    2011-12-31

    Ligand-gated channels, in which a substrate transport pathway is formed as a result of the binding of a small-molecule chemical messenger, constitute a diverse class of membrane proteins with important functions in prokaryotic and eukaryotic organisms. Despite their widespread nature, no ligand-gated channels have yet been found within the outer membrane (OM) of Gram-negative bacteria. Here we show, using in vivo transport assays, intrinsic tryptophan fluorescence and X-ray crystallography, that high-affinity (submicromolar) substrate binding to the OM long-chain fatty acid transporter FadL from Escherichia coli causes conformational changes in the N terminus that open up a channel for substrate diffusion. The OM long-chain fatty acid transporter FadL from E. coli is a unique paradigm for OM diffusion-driven transport, in which ligand gating within a {beta}-barrel membrane protein is a prerequisite for channel formation.

  20. Compositional and Gate Tuning of the Interfacial Conductivity in

    Office of Scientific and Technical Information (OSTI)

    LaAlO3/LaTiO3/SrTiO3 Heterostructures (Journal Article) | SciTech Connect Compositional and Gate Tuning of the Interfacial Conductivity in LaAlO3/LaTiO3/SrTiO3 Heterostructures Citation Details In-Document Search Title: Compositional and Gate Tuning of the Interfacial Conductivity in LaAlO3/LaTiO3/SrTiO3 Heterostructures Authors: Hosoda, Masayuki ; Bell, Christopher ; Hikita, Yasuyuki ; Hwang, Harold Y. Publication Date: 2012-12-06 OSTI Identifier: 1056813 Report Number(s): SLAC-PUB-15308

  1. Evaluation of AlGaN/GaN high electron mobility transistors grown on ZrTi buffer layers with sapphire substrates

    DOE PAGES [OSTI]

    Ren, Fan; Pearton, Stephen J.; Ahn, Shihyun; Lin, Yi -Hsuan; Machuca, Francisco; Weiss, Robert; Welsh, Alex; McCartney, Martha R.; Smith, David J.; Kravchenko, Ivan I.

    2016-09-21

    Here, AlGaN/GaN high electron mobility transistors (HEMTs) have been grown on sapphire substrates, using ZrTi buffer layers to provide in-plane lattice-matching to hexagonal GaN. X-ray diffraction (XRD) as well as cross-section transmission electron microscopy (TEM) were used to assess the quality of the HEMT structure. The XRD 2θ scans showed full-width-at-half-maximum values of 0.16°, 0.07°, and 0.08° for ZrTi alloy, GaN buffer layer, and the entire HEMT structure, respectively. TEM studies of the GaN buffer layer and the AlN/ZrTi/AlN stack showed the importance of growing thin AlN buffer layers on the ZrTi layer prior to growth of the GaN buffermore » layer. The density of threading dislocations in the GaN channel layer of the HEMT structure was estimated to be in the 108 cm–2 range. The HEMT device exhibited a saturation drain current density of 820 mA/mm, and the channel of the fabricated HEMTs could be well modulated. A cutoff frequency (fT) of 8.9 GHz and a maximum frequency of oscillation (fmax) of 17.3 GHz were achieved for HEMTs with gate dimensions of 1 × 200 μm.« less

  2. Change in Electronic States in the Accumulation Layer at Interfaces in a Poly(3-hexylthiophene) Field-Effect Transistor and the Impact of Encapsulation

    SciTech Connect

    Park, Byoungnam; Kim, Y. J.; Graham, Samuel; Reichmanis, Elsa

    2011-09-28

    The electrical properties of organic field-effect transistors (OFETs) are largely determined by the accumulation layer that extends only a few molecular layers away from the gate dielectric/organic semiconductor interface. To understand degradation processes that occur within the device structure under ambient conditions, it is thus essential to probe the interface using an architecture that minimizes the effects of bulk transport of contaminating species through upper layers of material in a thick film device. Using FETs designed with multiple voltage probes along the conducting channel and an ultrathin film of the active material, we found that the charge carrier density and the FET mobility decrease, and further, the contact and channel properties are strongly correlated. FET devices prepared with an ultrathin film of P3HT become significantly contact limited in air due to a hole diffusion barrier near the drain electrode. Encapsulation of the device with a layered organic/inorganic barrier material consisting of parylene and Al₂O₃ appreciably retarded diffusion of molecular species from ambient air into P3HT.

  3. Possible Dynamically Gated Conductance along Heme Wires in Bacterial Multiheme Cytochromes

    SciTech Connect

    Smith, Dayle MA; Rosso, Kevin M.

    2014-07-24

    The staggered cross decaheme configuration of electron transfer co-factors in the outer-membrane cytochrome MtrF may serve as a prototype for conformationally-gated multi-heme electron transport. Derived from the bacterium Shewanella oneidensis, the staggered cross configuration reveals intersecting c-type octaheme and tetraheme “wires” containing thermodynamic “hills” and “valleys”, suggesting that the protein structure may include a dynamical mechanism for conductance and pathway switching depending on enzymatic functional need. Recent molecular simulations have established the pair-wise electronic couplings, redox potentials, and reorganization energies to predict the maximum conductance along the various heme wire pathways by sequential hopping of a single electron (PNAS (2014) 11,611-616). Here, we expand this information with classical molecular and statistical mechanics calculations of large-amplitude protein dynamics in MtrF, to address its potential to modulate pathway conductance, including assessment of the effect of the total charge state. Explicit solvent molecular dynamics simulations of fully oxidized and fully reduced MtrF employing ten independent 50-ns simulations at 300 K and 1 atm showed that reduced MtrF is more expanded and explores more conformational space than oxidized MtrF, and that heme reduction leads to increased heme solvent exposure. The slowest mode of collective decaheme motion is 90% similar between the oxidized and reduced states, and consists primarily of inter-heme separation with minor rotational contributions. The frequency of this motion is 1.7×107 s 1 for fully-oxidized and fully-reduced MtrF, respectively, slower than the downhill electron transfer rates between stacked heme pairs at the octaheme termini and faster than the electron transfer rates between parallel hemes in the tetraheme chain. This implies that MtrF uses slow conformational fluctuations to modulate electron flow along the octaheme pathway

  4. Side-gate modulation effects on high-quality BN-Graphene-BN nanoribbon capacitors

    SciTech Connect

    Wang, Yang; Chen, Xiaolong; Ye, Weiguang; Wu, Zefei; Han, Yu; Han, Tianyi; He, Yuheng; Cai, Yuan; Wang, Ning

    2014-12-15

    High-quality BN-Graphene-BN nanoribbon capacitors with double side-gates of graphene have been experimentally realized. The double side-gates can effectively modulate the electronic properties of graphene nanoribbon capacitors. By applying anti-symmetric side-gate voltages, we observed significant upward shifting and flattening of the V-shaped capacitance curve near the charge neutrality point. Symmetric side-gate voltages, however, only resulted in tilted upward shifting along the opposite direction of applied gate voltages. These modulation effects followed the behavior of graphene nanoribbons predicted theoretically for metallic side-gate modulation. The negative quantum capacitance phenomenon predicted by numerical simulations for graphene nanoribbons modulated by graphene side-gates was not observed, possibly due to the weakened interactions between the graphene nanoribbon and side-gate electrodes caused by the Ga{sup +} beam etching process.

  5. Radiation Hardening of Gated X-ray Imagers for the National Ignition...

    Office of Scientific and Technical Information (OSTI)

    Radiation Hardening of Gated X-ray Imagers for the National Ignition Facility Citation Details In-Document Search Title: Radiation Hardening of Gated X-ray Imagers for the National ...

  6. Electrolyte Gate-Controlled Kondo Effect in SrTiO3 (Journal Article...

    Office of Scientific and Technical Information (OSTI)

    Electrolyte Gate-Controlled Kondo Effect in SrTiO3 Prev Next Title: Electrolyte Gate-Controlled Kondo Effect in SrTiO3 Authors: Lee, Menyoung ; Williams, J. R. ; Zhang, Sipei ...

  7. Research Update: Electrical monitoring of cysts using organic electrochemical transistors

    SciTech Connect

    Huerta, M.; Rivnay, J.; Ramuz, M.; Hama, A.; Owens, R. M.

    2015-03-01

    Organotypic three-dimensional (3D) cell culture models have the potential to act as surrogate tissues in vitro, both for basic research and for drug discovery/toxicology. 3D cultures maintain not only 3D architecture but also cell-cell and cell extracellular matrix interactions, particularly when grown in cysts or spheroids. Characterization of cell cultures grown in 3D formats, however, provides a significant challenge for cell biologists due to the incompatibility of these structures with commonly found optical or electronic monitoring systems. Electronic impedance spectroscopy is a cell culture monitoring technique with great potential; however, it has not been possible to integrate 3D cultures with commercially available systems to date. Cyst-like 3D cultures are particularly challenging due to their small size and difficulty in manipulation. Herein, we demonstrate isolation of cyst-like 3D cultures by capillarity and subsequent integration with the organic electrochemical transistor for monitoring the integrity of these structures. We show not only that this versatile device can be adapted to the cyst format for measuring resistance and, therefore, the quality of the cysts, but also can be used for quantitative monitoring of the effect of toxic compounds on cells in a 3D format. The ability to quantitatively predict effects of drugs on 3D cultures in vitro has large future potential for the fields of drug discovery and toxicology.

  8. Proposal for a phase-coherent thermoelectric transistor

    SciTech Connect

    Giazotto, F.; Robinson, J. W. A.; Moodera, J. S.; Bergeret, F. S.

    2014-08-11

    Identifying materials and devices which offer efficient thermoelectric effects at low temperature is a major obstacle for the development of thermal management strategies for low-temperature electronic systems. Superconductors cannot offer a solution since their near perfect electron-hole symmetry leads to a negligible thermoelectric response; however, here we demonstrate theoretically a superconducting thermoelectric transistor which offers unparalleled figures of merit of up to ∼45 and Seebeck coefficients as large as a few mV/K at sub-Kelvin temperatures. The device is also phase-tunable meaning its thermoelectric response for power generation can be precisely controlled with a small magnetic field. Our concept is based on a superconductor-normal metal-superconductor interferometer in which the normal metal weak-link is tunnel coupled to a ferromagnetic insulator and a Zeeman split superconductor. Upon application of an external magnetic flux, the interferometer enables phase-coherent manipulation of thermoelectric properties whilst offering efficiencies which approach the Carnot limit.

  9. Ambipolar charge transport in microcrystalline silicon thin-film transistors

    SciTech Connect

    Knipp, Dietmar; Marinkovic, M.; Chan, Kah-Yoong; Gordijn, Aad; Stiebig, Helmut

    2011-01-15

    Hydrogenated microcrystalline silicon ({mu}c-Si:H) is a promising candidate for thin-film transistors (TFTs) in large-area electronics due to high electron and hole charge carrier mobilities. We report on ambipolar TFTs based on {mu}c-Si:H prepared by plasma-enhanced chemical vapor deposition at temperatures compatible with flexible substrates. Electrons and holes are directly injected into the {mu}c-Si:H channel via chromium drain and source contacts. The TFTs exhibit electron and hole charge carrier mobilities of 30-50 cm{sup 2}/V s and 10-15 cm{sup 2}/V s, respectively. In this work, the electrical characteristics of the ambipolar {mu}c-Si:H TFTs are described by a simple analytical model that takes the ambipolar charge transport into account. The analytical expressions are used to model the transfer curves, the potential and the net surface charge along the channel of the TFTs. The electrical model provides insights into the electronic transport of ambipolar {mu}c-Si:H TFTs.

  10. Fast Out of the Gate: How Developing Asian Countries can Prepare...

    OpenEI (Open Energy Information) [EERE & EIA]

    (Redirected from Fast Out of the Gate: How Developing Asian Countries can Prepare to Access International Green Growth Financing)...

  11. Technical Feasibility Assessment of LED Roadway Lighting on the Golden Gate Bridge

    SciTech Connect

    Tuenge, J. R.

    2012-09-01

    GATEWAY program report on the technical feasibility of LED roadway lighting on the Golden Gate Bridge in San Francisco, CA.

  12. Controlled phase gate for solid-state charge-qubit architectures

    SciTech Connect

    Schirmer, S.G.; Oi, D.K.L.; Greentree, Andrew D.

    2005-01-01

    We describe a mechanism for realizing a controlled phase gate for solid-state charge qubits. By augmenting the positionally defined qubit with an auxiliary state, and changing the charge distribution in the three-dot system, we are able to effectively switch the Coulombic interaction, effecting an entangling gate. We consider two architectures, and numerically investigate their robustness to gate noise.

  13. DOE Tour of Zero Floorplans: Row Homes at RidgeGate by Thrive Home Builders

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    | Department of Energy Row Homes at RidgeGate by Thrive Home Builders DOE Tour of Zero Floorplans: Row Homes at RidgeGate by Thrive Home Builders DOE Tour of Zero Floorplans: Row Homes at RidgeGate by Thrive Home Builders

  14. Gating of high-mobility InAs metamorphic heterostructures

    SciTech Connect

    Shabani, J.; McFadden, A. P.; Shojaei, B.; Palmstrøm, C. J.

    2014-12-29

    We investigate the performance of gate-defined devices fabricated on high mobility InAs metamorphic heterostructures. We find that heterostructures capped with In{sub 0.75}Ga{sub 0.25}As often show signs of parallel conduction due to proximity of their surface Fermi level to the conduction band minimum. Here, we introduce a technique that can be used to estimate the density of this surface charge that involves cool-downs from room temperature under gate bias. We have been able to remove the parallel conduction under high positive bias, but achieving full depletion has proven difficult. We find that by using In{sub 0.75}Al{sub 0.25}As as the barrier without an In{sub 0.75}Ga{sub 0.25}As capping, a drastic reduction in parallel conduction can be achieved. Our studies show that this does not change the transport properties of the quantum well significantly. We achieved full depletion in InAlAs capped heterostructures with non-hysteretic gating response suitable for fabrication of gate-defined mesoscopic devices.

  15. Temperature-controlled molecular depolarization gates in nuclear magnetic resonance

    SciTech Connect

    Schroder, Leif; Schroder, Leif; Chavez, Lana; Meldrum, Tyler; Smith, Monica; Lowery, Thomas J.; E. Wemmer, David; Pines, Alexander

    2008-02-27

    Down the drain: Cryptophane cages in combination with selective radiofrequency spin labeling can be used as molecular 'transpletor' units for transferring depletion of spin polarization from a hyperpolarized 'source' spin ensemble to a 'drain' ensemble. The flow of nuclei through the gate is adjustable by the ambient temperature, thereby enabling controlled consumption of hyperpolarization.

  16. High Temperature, High Voltage Fully Integrated Gate Driver Circuit |

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Department of Energy 10 DOE Vehicle Technologies and Hydrogen Programs Annual Merit Review and Peer Evaluation Meeting, June 7-11, 2010 -- Washington D.C. ape003_tolbert_2010_p.pdf (757.36 KB) More Documents & Publications High Temperature, High Voltage Fully Integrated Gate Driver Circuit Wide Bandgap Materials Smart Integrated Power Module

  17. High Temperature, High Voltage Fully Integrated Gate Driver Circuit |

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Department of Energy 09 DOE Hydrogen Program and Vehicle Technologies Program Annual Merit Review and Peer Evaluation Meeting, May 18-22, 2009 -- Washington D.C. ape_03_marlino.pdf (846.17 KB) More Documents & Publications High Temperature, High Voltage Fully Integrated Gate Driver Circuit Smart Integrated Power Module Wide Bandgap Materials

  18. Optimal gate-width setting for passive neutrons multiplicity counting

    SciTech Connect

    Croft, Stephen; Evans, Louise G; Schear, Melissa A

    2010-01-01

    When setting up a passive neutron coincidence counter it is natural to ask what coincidence gate settings should be used to optimize the counting precision. If the gate width is too short then signal is lost and the precision is compromised because in a given period only a few coincidence events will be observed. On the other hand if the gate is too large the signal will be maximized but it will also be compromised by the high level of random pile-up or Accidental coincidence events which must be subtracted. In the case of shift register electronics connected to an assay chamber with an exponential dieaway profile operating in the regime where the Accidentals rate dominates the Reals coincidence rate but where dead-time is not a concern, simple arguments allow one to show that the relative precision on the net Reals rate is minimized when the coincidence gate is set to about 1.2 times the lie dieaway time of the system. In this work we show that making the same assumptions it is easy to show that the relative precision on the Triples rates is also at a minimum when the relative precision of the Doubles (or Reals) is at a minimum. Although the analysis is straightforward to our knowledge such a discussion has not been documented in the literature before. Actual measurement systems do not always behave in the ideal we choose to model them. Fortunately however the variation in the relative precision as a function of gate width is rather flat for traditional safeguards counters and so the performance is somewhat forgiving of the exact choice. The derivation further serves to delineate the important parameters which determine the relative counting precision of the Doubles and Triples rates under the regime considered. To illustrate the similarities and differences we consider the relative standard deviation that might be anticipated for a passive correlation count of an axial section of a spent nuclear fuel assembly under practically achievable conditions.

  19. SU-C-210-03: Impact of Breathing Irregularities On Gated Treatments

    SciTech Connect

    Schiuma, D; Arheit, M; Schmelzer, P; Scheib, S; Buchsbaum, T; Pemler, P

    2015-06-15

    Purpose: To evaluate the effect of breathing irregularities on target location in gated treatments using amplitude and phase gating. Methods: 111 breathing patterns acquired using RPM system were categorized based on period and amplitude STD as regular (STD period ≤ 0.5 s, STD amplitude ≤ 1.5 mm), medium (0.5 s < STD period ≤ 1 s, 1.5 mm < STD amplitude ≤ 3 mm) and irregular (STD period > 1 s, STD amplitude > 3 mm). One pattern representative of the average defined population was selected per category and corresponding target motion reproduced using Quasar Respiratory Motion Phantom. Phantom in motion underwent 4D-CT scan with phase reconstruction. Gated window was defined at end of exhale and DRRs reconstructed in treatment planning at 40% (beam on) and 60% phase (beam off). Target location uncertainty was assessed by comparing gated kV triggered images continuously acquired at beam on/off on a True Beam 2.0 with corresponding DRRs. Results: Average target uncertainty with amplitude gating was in [0.4 – 1.9] mm range for the different scenarios with maximum STD of 1.2 mm for the irregular pattern. Average target uncertainty with phase gating was [1.1 – 2.2] mm for regular and medium patterns, while it increased to [3.6 – 9.6] mm for the irregular pattern. Live gated motion was stable with amplitude gating, while increasing with phase gating for the irregular pattern. Treatment duration range was [68 – 160] s with amplitude and [70 – 74] s with phase gating. Conclusion: Breathing irregularities were found to affect gated treatments only when using phase gating. For regular and medium patterns no significant difference was found between the two gating strategies. Amplitude gating ensured stable gated motion within the different patterns, thus reducing intra-fraction target location variability for the irregular pattern and resulting in longer treatment duration.

  20. Plasma treatment effect on charge carrier concentrations and surface traps in a-InGaZnO thin-film transistors

    SciTech Connect

    Kim, Jae-Sung; Xing Piao, Ming; Jang, Ho-Kyun; Kim, Gyu-Tae; Joo, Min-Kyu; Ahn, Seung-Eon; Choi, Yong-Hee

    2014-03-21

    Various plasma treatment effects such as oxygen (O{sub 2}), nitrogen (N{sub 2}), and argon (Ar) on amorphous indium gallium zinc oxide thin-film transistors (a-IGZO TFTs) are investigated. To study oxygen stoichiometry in a-IGZO TFTs with respect to various plasma environments, X-ray photoelectron spectroscopy was employed. The results showed that oxygen vacancies were reduced by O{sub 2} and N{sub 2} plasmas while they were increased after Ar plasma treatment. Additionally, the effects of plasma treatment on trap distribution in bulk and surface channels were explored by means of low-frequency noise analysis. Details of the mechanisms used for generating and restoring traps on the surface and bulk channel are presented.

  1. High performance transistors via aligned polyfluorene-sorted carbon nanotubes

    SciTech Connect

    Brady, Gerald J.; Joo, Yongho; Singha Roy, Susmit; Gopalan, Padma; Arnold, Michael S.

    2014-02-24

    We evaluate the performance of exceptionally electronic-type sorted, semiconducting, aligned single-walled carbon nanotubes (s-SWCNTs) in field effect transistors (FETs). High on-conductance and high on/off conductance modulation are simultaneously achieved at channel lengths which are both shorter and longer than individual s-SWCNTs. The s-SWCNTs are isolated from heterogeneous mixtures using a polyfluorene-derivative as a selective agent and aligned on substrates via dose-controlled, floating evaporative self-assembly at densities of ?50 s-SWCNTs ?m{sup ?1}. At a channel length of 9??m the s-SWCNTs percolate to span the FET channel, and the on/off ratio and charge transport mobility are 2.2??10{sup 7} and 46?cm{sup 2}?V{sup ?1}?s{sup ?1}, respectively. At a channel length of 400?nm, a large fraction of the s-SWCNTs directly span the channel, and the on-conductance per width is 61??S??m{sup ?1} and the on/off ratio is 4??10{sup 5}. These results are considerably better than previous solution-processed FETs, which have suffered from poor on/off ratio due to spurious metallic nanotubes that bridge the channel. 4071 individual and small bundles of s-SWCNTs are tested in 400?nm channel length FETs, and all show semiconducting behavior, demonstrating the high fidelity of polyfluorenes as selective agents and the promise of assembling s-SWCNTs from solution to create high performance semiconductor electronic devices.

  2. Layered CU-based electrode for high-dielectric constant oxide thin film-based devices

    DOEpatents

    Auciello, Orlando

    2010-05-11

    A layered device including a substrate; an adhering layer thereon. An electrical conducting layer such as copper is deposited on the adhering layer and then a barrier layer of an amorphous oxide of TiAl followed by a high dielectric layer are deposited to form one or more of an electrical device such as a capacitor or a transistor or MEMS and/or a magnetic device.

  3. Light quasiparticles dominate electronic transport in molecular crystal field-effect transistors

    SciTech Connect

    Li, Z. Q.; Podzorov, V.; Sai, N.; Martin, Michael C.; Gershenson, M. E.; Di Ventra, M.; Basov, D. N.

    2007-03-01

    We report on an infrared spectroscopy study of mobile holes in the accumulation layer of organic field-effect transistors based on rubrene single crystals. Our data indicate that both transport and infrared properties of these transistors at room temperature are governed by light quasiparticles in molecular orbital bands with the effective masses m[small star, filled]comparable to free electron mass. Furthermore, the m[small star, filled]values inferred from our experiments are in agreement with those determined from band structure calculations. These findings reveal no evidence for prominent polaronic effects, which is at variance with the common beliefs of polaron formation in molecular solids.

  4. A 1 A laser driver in 0.35 {mu}m complementary metal oxide semiconductor technology for a pulsed time-of-flight laser rangefinder

    SciTech Connect

    Nissinen, Jan; Kostamovaara, Juha

    2009-10-15

    An integrated complementary metal oxide semiconductor (CMOS) current pulse generator is presented which achieves an ampere-scale peak current pulse with a rise time and pulse width of less than 1 and 2.5 ns (pulse width at half maximum), respectively. The generator is implemented in a 0.35 {mu}m CMOS process and consists of four parallel n-type metal oxide semiconductor transistors driven by a scaled buffer chain to achieve fast switching.

  5. Unitary-gate synthesis for continuous-variable systems

    SciTech Connect

    Fiurasek, Jaromir

    2003-08-01

    We investigate the synthesis of continuous-variable two-mode unitary gates in the setting where two modes A and B are coupled by a fixed quadratic Hamiltonian H. The gate synthesis consists of a sequence of evolutions governed by Hamiltonian H, which are interspaced by local phase shifts applied to A and B. We concentrate on protocols that require the minimum number of necessary steps and we show how to implement the beam splitter and the two-mode squeezer in just three steps. Particular attention is paid to Hamiltonian x{sub A}p{sub B} that describes the effective off-resonant interaction of light with the collective atomic spin.

  6. Quantum gate using qubit states separated by terahertz

    SciTech Connect

    Toyoda, Kenji; Urabe, Shinji [Graduate School of Engineering Science, Osaka University, 1-3 Machikaneyama, Toyonaka, Osaka 560-8531 (Japan); JST-CREST, 4-1-8 Honmachi, Kawaguchi, Saitama 331-0012 (Japan); Haze, Shinsuke [Graduate School of Engineering Science, Osaka University, 1-3 Machikaneyama, Toyonaka, Osaka 560-8531 (Japan); Yamazaki, Rekishu [JST-CREST, 4-1-8 Honmachi, Kawaguchi, Saitama 331-0012 (Japan)

    2010-03-15

    A two-qubit quantum gate is realized using electronically excited states in a single ion with an energy separation on the order of a terahertz times the Planck constant as a qubit. Two phase-locked lasers are used to excite a stimulated Raman transition between two metastable states D{sub 3/2} and D{sub 5/2} separated by 1.82 THz in a single trapped {sup 40}Ca{sup +} ion to construct a qubit, which is used as the target bit for the Cirac-Zoller two-qubit controlled NOT gate. Quantum dynamics conditioned on a motional qubit is clearly observed as a fringe reversal in Ramsey interferometry.

  7. A Compact Reactor Gate Discharge Monitor for Spent Fuel.

    SciTech Connect

    Franco, J. B.; Menlove, Howard O.; Eccleston, G. W.; Miller, M. C.

    2005-01-01

    This paper presents a new design for a reactor gate discharge monitor that has evolved from the baseline discharge monitors used at the Fugen and Tokai-1 reactors in Japan. The main design innovation is the ability to determine direction-of-motion of spent fuel using a single sensor module, as opposed to the two modules used in both baseline design systems. Use of a single module reduces the final system complexity and weight significantly without compromising functionality. The reactor gate discharge monitor uses standard International Atomic Energy Agency (IAEA) hardware and software components. The requirements to determine direction-of-motion from a single module precipitated several development efforts described herein in both the MiniGRAND data acquisition hardware and in the uninterruptible power supply source.

  8. Microsoft Word - S.J. Gates-1.doc

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    Ronald E. Hatcher Science on Saturday Lecture Series 07 February 2015 IS SUSY THE GUARDIAN OF OUR REALITY FROM OBLIVION? S. James Gates, Jr. Distinguished University Professor, University System of Maryland Regents Professor, John S. Toll Professor of Physics, and Center for String & Particle Theory Director University of Maryland, College Park, MD ABSTRACT: The proposed property of supersymmetry (SUSY) is being searched for by the LHC in its newest scientific planned run. What is SUSY? How

  9. Transistors for Electric Motor Drives: High-Performance GaN HEMT Modules for Agile Power Electronics

    SciTech Connect

    2010-09-01

    ADEPT Project: Transphorm is developing transistors with gallium nitride (GaN) semiconductors that could be used to make cost-effective, high-performance power converters for a variety of applications, including electric motor drives which transmit power to a motor. A transistor acts like a switch, controlling the electrical energy that flows around an electrical circuit. Most transistors today use low-cost silicon semiconductors to conduct electrical energy, but silicon transistors don’t operate efficiently at high speeds and voltage levels. Transphorm is using GaN as a semiconductor material in its transistors because GaN performs better at higher voltages and frequencies, and it is more energy efficient than straight silicon. However, Transphorm is using inexpensive silicon as a base to help keep costs low. The company is also packaging its transistors with other electrical components that can operate quickly and efficiently at high power levels—increasing the overall efficiency of both the transistor and the entire motor drive.

  10. GATE Center for Automotive Fuel Cell Systems at Virginia Tech

    SciTech Connect

    Nelson, Douglas

    2011-09-30

    The Virginia Tech GATE Center for Automotive Fuel Cell Systems (CAFCS) achieved the following objectives in support of the domestic automotive industry: Expanded and updated fuel cell and vehicle technologies education programs; Conducted industry directed research in three thrust areas development and characterization of materials for PEM fuel cells; performance and durability modeling for PEM fuel cells; and fuel cell systems design and optimization, including hybrid and plug-in hybrid fuel cell vehicles; Developed MS and Ph.D. engineers and scientists who are pursuing careers related to fuel cells and automotive applications; Published research results that provide industry with new knowledge which contributes to the advancement of fuel cell and vehicle systems commercialization. With support from the Dept. of Energy, the CAFCS upgraded existing graduate course offerings; introduced a hands-on laboratory component that make use of Virginia Tech's comprehensive laboratory facilities, funded 15 GATE Fellowships over a five year period; and expanded our program of industry interaction to improve student awareness of challenges and opportunities in the automotive industry. GATE Center graduate students have a state-of-the-art research experience preparing them for a career to contribute to the advancement fuel cell and vehicle technologies.

  11. Gate dielectric degradation: Pre-existing vs. generated defects

    SciTech Connect

    Veksler, Dmitry E-mail: gennadi.bersuker@sematech.org; Bersuker, Gennadi E-mail: gennadi.bersuker@sematech.org

    2014-01-21

    We consider the possibility that degradation of the electrical characteristics of high-k gate stacks under low voltage stresses of practical interest is caused primarily by activation of pre-existing defects rather than generation of new ones. In nFETs in inversion, in particular, defect activation is suggested to be associated with the capture of an injected electron: in this charged state, defects can participate in a fast exchange of charge carriers with the carrier reservoir (substrate or gate electrode) that constitutes the physical process underlying a variety of electrical measurements. The degradation caused by the activation of pre-existing defects, as opposed to that of new defect generation, is both reversible and exhibits a tendency to saturate through the duration of stress. By using the multi-phonon assisted charge transport description, it is demonstrated that the trap activation concept allows reproducing a variety of experimental results including stress time dependency of the threshold voltage, leakage current, charge pumping current, and low frequency noise. Continuous, long-term degradation described by the power law time dependency is shown to be determined by the activation of defects located in the interfacial SiO{sub 2} layer of the high-k gate stacks. The findings of this study can direct process optimization efforts towards reduction of as-grown precursors of the charge trapping defects as the major factor affecting reliability.

  12. Gate valve and motor-operator research findings

    SciTech Connect

    Steele, R. Jr.; DeWall, K.G.; Watkins, J.C.; Russell, M.J.; Bramwell, D.

    1995-09-01

    This report provides an update on the valve research being sponsored by the US Nuclear Regulatory Commission (NRC) and conducted at the Idaho National Engineering Laboratory (INEL). The research addresses the need to provide assurance that motor-operated valves can perform their intended safety function, usually to open or close against specified (design basis) flow and pressure loads. This report describes several important developments: Two methods for estimating or bounding the design basis stem factor (in rising-stem valves), using data from tests less severe than design basis tests; a new correlation for evaluating the opening responses of gate valves and for predicting opening requirements; an extrapolation method that uses the results of a best effort flow test to estimate the design basis closing requirements of a gate valve that exhibits atypical responses (peak force occurs before flow isolation); and the extension of the original INEL closing correlation to include low- flow and low-pressure loads. The report also includes a general approach, presented in step-by-step format, for determining operating margins for rising-stem valves (gate valves and globe valves) as well as quarter-turn valves (ball valves and butterfly valves).

  13. Measuring bi-directional current through a field-effect transistor by virtue of drain-to-source voltage measurement

    DOEpatents

    Turner, Steven Richard

    2006-12-26

    A method and apparatus for measuring current, and particularly bi-directional current, in a field-effect transistor (FET) using drain-to-source voltage measurements. The drain-to-source voltage of the FET is measured and amplified. This signal is then compensated for variations in the temperature of the FET, which affects the impedance of the FET when it is switched on. The output is a signal representative of the direction of the flow of current through the field-effect transistor and the level of the current through the field-effect transistor. Preferably, the measurement only occurs when the FET is switched on.

  14. Use of a hard mask for formation of gate and dielectric via nanofilament field emission devices

    DOEpatents

    Morse, Jeffrey D.; Contolini, Robert J.

    2001-01-01

    A process for fabricating a nanofilament field emission device in which a via in a dielectric layer is self-aligned to gate metal via structure located on top of the dielectric layer. By the use of a hard mask layer located on top of the gate metal layer, inert to the etch chemistry for the gate metal layer, and in which a via is formed by the pattern from etched nuclear tracks in a trackable material, a via is formed by the hard mask will eliminate any erosion of the gate metal layer during the dielectric via etch. Also, the hard mask layer will protect the gate metal layer while the gate structure is etched back from the edge of the dielectric via, if such is desired. This method provides more tolerance for the electroplating of a nanofilament in the dielectric via and sharpening of the nanofilament.

  15. Liquid crystal terahertz phase shifters with functional indium-tin-oxide nanostructures for biasing and alignment

    SciTech Connect

    Yang, Chan-Shan; Tang, Tsung-Ta; Pan, Ru-Pin; Yu, Peichen; Pan, Ci-Ling

    2014-04-07

    Indium Tin Oxide (ITO) nanowhiskers (NWhs) obliquely evaporated by electron-beam glancing-angle deposition can serve simultaneously as transparent electrodes and alignment layer for liquid crystal (LC) devices in the terahertz (THz) frequency range. To demonstrate, we constructed a THz LC phase shifter with ITO NWhs. Phase shift exceeding ?/2 at 1.0 THz was achieved in a ?517??m-thick cell. The phase shifter exhibits high transmittance (?78%). The driving voltage required for quarter-wave operation is as low as 5.66?V (rms), compatible with complementary metal-oxide-semiconductor (CMOS) and thin-film transistor (TFT) technologies.

  16. PIA - Savannah River Nuclear Solution (SRNS) MedGate Occupational Health

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    and Safety Medical System (OHS) (Includes the Drug and Alcohol Testing System (Assistant)) | Department of Energy MedGate Occupational Health and Safety Medical System (OHS) (Includes the Drug and Alcohol Testing System (Assistant)) PIA - Savannah River Nuclear Solution (SRNS) MedGate Occupational Health and Safety Medical System (OHS) (Includes the Drug and Alcohol Testing System (Assistant)) PIA - Savannah River Nuclear Solution (SRNS) MedGate Occupational Health and Safety Medical System

  17. Technical Feasibility Assessment of LED Roadway Lighting on the Golden Gate

    Office of Scientific and Technical Information (OSTI)

    Bridge (Technical Report) | SciTech Connect Technical Feasibility Assessment of LED Roadway Lighting on the Golden Gate Bridge Citation Details In-Document Search Title: Technical Feasibility Assessment of LED Roadway Lighting on the Golden Gate Bridge Subsequent to preliminary investigations by the Golden Gate Bridge Highway & Transportation District (GGB), in coordination with Pacific Gas & Electric (PG&E), the GATEWAY Demonstration program was asked to evaluate the technical

  18. Day Two of 2012 ARPA-E Summit Will Feature Bill Gates, Secretary...

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    - Bart Gordon, K&L Gates, Partner; Former Representative from Tennessee Stefan Heck, McKinsey & Co., Director, Leader of Global Cleantech Practice Carrie Houtman, The Dow Chemical...

  19. Sandia Energy - ECIS and i-GATE: Innovation Hub Connects Clean...

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    support system to accelerate the commercialization of innovative technologies related to green transportation and clean energy. There are now eight i-GATE clients developing fuel...

  20. Bill Gates and Deputy Secretary Poneman Discuss the Energy Technology Landscape

    Energy.gov [DOE]

    Bill Gates and Deputy Secretary of Energy Daniel Poneman discuss the future of energy technology during the twenty-second Plenary Meeting of the Nuclear Suppliers Group.

  1. Computer assisted design of poly-silicon gated enhancement-mode...

    Office of Scientific and Technical Information (OSTI)

    design of poly-silicon gated enhancement-mode lateral double quantum dot devices for quantum computing. Citation Details In-Document Search Title: Computer assisted design of ...

  2. Global Access-controlled Transfer e-frame (GATe)

    Energy Science and Technology Software Center

    2012-05-30

    Global Access-controlled Transfer e-frame (GATe) was designed to take advantage of the patterns that occur during an electronic record transfer process. The e-frame (or electronic framework or platform) is the foundation for developing secure information transfer to meet classified and unclassified business processes and is particularly useful when there is a need to share information with various entities in a controlled and secure environment. It can share, search, upload, download and retrieve sensitive information, asmore » well as provides reporting capabilities.« less

  3. Global Access-controlled Transfer e-frame (GATe)

    SciTech Connect

    2012-05-30

    Global Access-controlled Transfer e-frame (GATe) was designed to take advantage of the patterns that occur during an electronic record transfer process. The e-frame (or electronic framework or platform) is the foundation for developing secure information transfer to meet classified and unclassified business processes and is particularly useful when there is a need to share information with various entities in a controlled and secure environment. It can share, search, upload, download and retrieve sensitive information, as well as provides reporting capabilities.

  4. Nonadiabatic molecular orientation by polarization-gated ultrashort laser pulses

    SciTech Connect

    Chen Cheng; Wu Jian; Zeng Heping [State Key Laboratory of Precision Spectroscopy, East China Normal University, Shanghai 200062 (China)

    2010-09-15

    We show that the nonadiabatic orientation of diatomic polar molecules can be controlled by polarization-gated ultrashort laser pulses. By finely adjusting the time interval between two circularly polarized pulses of different wavelengths but the same helicity, the orientation direction of the molecules can be twirled. A cloverlike potential is created by using two circularly polarized laser pulses of different wavelengths and opposite helicity, leading to multidirectional molecular orientation along the potential wells, which can be well revealed by a high-order statistics metric of <>.

  5. SU-E-J-45: Design and Study of An In-House Respiratory Gating Phantom Platform for Gated Radiotherapy

    SciTech Connect

    Senthilkumar, S

    2014-06-01

    Purpose: The main purpose of this work was to develop an in-house low cost respiratory motion phantom platform for testing the accuracy of the gated radiotherapy system and analyze the dosimetric difference during gated radiotherapy. Methods: An in-house respiratory motion platform(RMP) was designed and constructed for testing the targeting accuracy of respiratory tracking system. The RMP consist of acrylic Chest Wall Platform, 2 DC motors, 4 IR sensors, speed controller circuit, 2 LED and 2 moving rods inside the RMP. The velocity of the movement can be varied from 0 to 30 cycles per minute. The platform mounted to a base using precision linear bearings. The base and platform are made of clear, 15mm thick polycarbonate plastic and the linear ball bearings are oriented to restrict the platform to a movement of approximately 50mm up and down with very little friction. Results: The targeting accuracy of the respiratory tracking system was evaluated using phantom with and without respiratory movement with varied amplitude. We have found the 5% dose difference to the PTV during the movement in comparison with stable PTV. The RMP can perform sinusoidal motion in 1D with fixed peak to peak motion of 5 to 50mm and cycle interval from 2 to 6 seconds. The RMP was designed to be able to simulate the gross anatomical anterior posterior motion attributable to respiration-induced motion of the thoracic region. Conclusion: The unique RMP simulates breathing providing the means to create a comprehensive program for commissioning, training, quality assurance and dose verification of gated radiotherapy treatments. Create the anterior/posterior movement of a target over a 5 to 50 mm distance to replicate tumor movement. The targeting error of the respiratory tracking system is less than 1.0 mm which shows suitable for clinical treatment with highly performance.

  6. Controlling field-effect mobility in pentacene-based transistors by supersonic molecular-beam deposition

    SciTech Connect

    Toccoli, T.; Pallaoro, A.; Coppede, N.; Iannotta, S.; De Angelis, F.; Mariucci, L.; Fortunato, G.

    2006-03-27

    We show that pentacene field-effect transistors, fabricated by supersonic molecular beams, have a performance strongly depending on the precursor's kinetic energy (K{sub E}). The major role played by K{sub E} is in achieving highly ordered and flat films. In the range K{sub E}{approx_equal}3.5-6.5 eV, the organic field effect transistor linear mobility increases of a factor {approx}5. The highest value (1.0 cm{sup 2} V{sup -1} s{sup -1}) corresponds to very uniform and flat films (layer-by-layer type growth). The temperature dependence of mobility for films grown at K{sub E}>6 eV recalls that of single crystals (bandlike) and shows an opposite trend for films grown at K{sub E}{<=}5.5 eV.

  7. Nanoporous carbon tunable resistor/transistor and methods of production thereof

    DOEpatents

    Biener, Juergen; Baumann, Theodore F; Dasgupta, Subho; Hahn, Horst

    2014-04-22

    In one embodiment, a tunable resistor/transistor includes a porous material that is electrically coupled between a source electrode and a drain electrode, wherein the porous material acts as an active channel, an electrolyte solution saturating the active channel, the electrolyte solution being adapted for altering an electrical resistance of the active channel based on an applied electrochemical potential, wherein the active channel comprises nanoporous carbon arranged in a three-dimensional structure. In another embodiment, a method for forming the tunable resistor/transistor includes forming a source electrode, forming a drain electrode, and forming a monolithic nanoporous carbon material that acts as an active channel and selectively couples the source electrode to the drain electrode electrically. In any embodiment, the electrolyte solution saturating the nanoporous carbon active channel is adapted for altering an electrical resistance of the nanoporous carbon active channel based on an applied electrochemical potential.

  8. Workshop on gate valve pressure locking and thermal binding

    SciTech Connect

    Brown, E.J.

    1995-07-01

    The purpose of the Workshop on Gate Valve Pressure Locking and Thermal Binding was to discuss pressure locking and thermal binding issues that could lead to inoperable gate valves in both boiling water and pressurized water reactors. The goal was to foster exchange of information to develop the technical bases to understand the phenomena, identify the components that are susceptible, discuss actual events, discuss the safety significance, and illustrate known corrective actions that can prevent or limit the occurrence of pressure locking or thermal binding. The presentations were structured to cover U.S. Nuclear Regulatory Commission staff evaluation of operating experience and planned regulatory activity; industry discussions of specific events, including foreign experience, and efforts to determine causes and alleviate the affects; and valve vendor experience and recommended corrective action. The discussions indicated that identifying valves susceptible to pressure locking and thermal binding was a complex process involving knowledge of components, systems, and plant operations. The corrective action options are varied and straightforward.

  9. Thin film transistors on plastic substrates with reflective coatings for radiation protection

    DOEpatents

    Wolfe, Jesse D.; Theiss, Steven D.; Carey, Paul G.; Smith, Patrick M.; Wickboldt, Paul

    2003-11-04

    Fabrication of silicon thin film transistors (TFT) on low-temperature plastic substrates using a reflective coating so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The TFT can be used in large area low cost electronics, such as flat panel displays and portable electronics such as video cameras, personal digital assistants, and cell phones.

  10. Thin film transistors on plastic substrates with reflective coatings for radiation protection

    DOEpatents

    Wolfe, Jesse D.; Theiss, Steven D.; Carey, Paul G.; Smith, Patrick M.; Wickbold, Paul

    2006-09-26

    Fabrication of silicon thin film transistors (TFT) on low-temperature plastic substrates using a reflective coating so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The TFT can be used in large area low cost electronics, such as flat panel displays and portable electronics such as video cameras, personal digital assistants, and cell phones.

  11. Electronic system for data acquisition to study radiation effects on operating MOSFET transistors

    SciTech Connect

    Alves de Oliveira, Juliano; Assis de Melo, Marco Antnio; Guazzelli da Silveira, Marcilei A.; Medina, Nilberto H.

    2014-11-11

    In this work we present the development of an acquisition system for characterizing transistors under X-ray radiation. The system is able to carry out the acquisition and to storage characteristic transistor curves. To test the acquisition system we have submitted polarized P channel MOS transistors under continuous 10-keV X-ray doses up to 1500 krad. The characterization system can operate in the saturation region or in the linear region in order to observe the behavior of the currents or voltages involved during the irradiation process. Initial tests consisted of placing the device under test (DUT) in front of the X-ray beam direction, while its drain current was constantly monitored through the prototype generated in this work, the data are stored continuously and system behavior was monitored during the test. In order to observe the behavior of the DUT during the radiation tests, we used an acquisition system that consists of an ultra-low consumption16-bit Texas Instruments MSP430 microprocessor. Preliminary results indicate linear behavior of the voltage as a function of the exposure time and fast recovery. These features may be favorable to use this device as a radiation dosimeter to monitor low rate X-ray.

  12. Modulation and amplification of radiative far field heat transfer: Towards a simple radiative thermal transistor

    SciTech Connect

    Joulain, Karl; Ezzahri, Younès; Drevillon, Jérémie; Ben-Abdallah, Philippe

    2015-03-30

    We show in this article that phase change materials (PCM) exhibiting a phase transition between a dielectric state and a metallic state are good candidates to perform modulation as well as amplification of radiative thermal flux. We propose a simple situation in plane parallel geometry where a so-called radiative thermal transistor could be achieved. In this configuration, we put a PCM between two blackbodies at different temperatures. We show that the transistor effect can be achieved easily when this material has its critical temperature between the two blackbody temperatures. We also see that the more the material is reflective in the metallic state, the more switching effect is realized, whereas the more PCM transition is stiff in temperature, the more thermal amplification is high. We finally take the example of VO{sub 2} that exhibits an insulator-metallic transition at 68 °C. We show that a demonstrator of a radiative transistor could easily be achieved in view of the heat flux levels predicted. Far-field thermal radiation experiments are proposed to back the results presented.

  13. Apparatus for sensing patterns of electrical field variations across a surface

    DOEpatents

    Warren, William L.; Devine, Roderick A. B.

    2001-01-01

    An array of nonvolatile field effect transistors used to sense electric potential variations. The transistors owe their nonvolatility to the movement of protons within the oxide layer that occurs only in response to an externally applied electric potential between the gate on one side of the oxide and the source/drain on the other side. The position of the protons within the oxide layer either creates or destroys a conducting channel in the adjacent source/channel/drain layer below it, the current in the channel being measured as the state of the nonvolatile memory. The protons can also be moved by potentials created by other instrumentalities, such as charges on fingerprints or styluses above the gates, pressure on a piezoelectric layer above the gates, light shining upon a photoconductive layer above the gates. The invention allows sensing of fingerprints, handwriting, and optical images, which are converted into digitized images thereof in a nonvolatile format.

  14. Gated frequency-resolved optical imaging with an optical parametric amplifier

    DOEpatents

    Cameron, S.M.; Bliss, D.E.; Kimmel, M.W.; Neal, D.R.

    1999-08-10

    A system for detecting objects in a turbid media utilizes an optical parametric amplifier as an amplifying gate for received light from the media. An optical gating pulse from a second parametric amplifier permits the system to respond to and amplify only ballistic photons from the object in the media. 13 figs.

  15. Gated frequency-resolved optical imaging with an optical parametric amplifier

    DOEpatents

    Cameron, Stewart M.; Bliss, David E.; Kimmel, Mark W.; Neal, Daniel R.

    1999-01-01

    A system for detecting objects in a turbid media utilizes an optical parametric amplifier as an amplifying gate for received light from the media. An optical gating pulse from a second parametric amplifier permits the system to respond to and amplify only ballistic photons from the object in the media.

  16. Static ferroelectric memory transistor having improved data retention

    DOEpatents

    Evans, Jr., Joseph T.; Warren, William L.; Tuttle, Bruce A.

    1996-01-01

    An improved ferroelectric FET structure in which the ferroelectric layer is doped to reduce retention loss. A ferroelectric FET according to the present invention includes a semiconductor layer having first and second contacts thereon, the first and second contacts being separated from one another. The ferroelectric FET also includes a bottom electrode and a ferroelectric layer which is sandwiched between the semiconductor layer and the bottom electrode. The ferroelectric layer is constructed from a perovskite structure of the chemical composition ABO.sub.3 wherein the B site comprises first and second elements and a dopant element that has an oxidation state greater than +4 in sufficient concentration to impede shifts in the resistance measured between the first and second contacts with time. The ferroelectric FET structure preferably comprises Pb in the A-site. The first and second elements are preferably Zr and Ti, respectively. The preferred B-site dopants are Niobium, Tantalum, and Tungsten at concentrations between 1% and 8%.

  17. A proposal for the realization of universal quantum gates via superconducting qubits inside a cavity

    SciTech Connect

    Obada, A.-S.F.; Hessian, H.A.; Mohamed, A.-B.A.; Community College, Salman Bin Abdulaziz University, Al-Aflaj ; Homid, Ali H.

    2013-07-15

    A family of quantum logic gates is proposed via superconducting (SC) qubits coupled to a SC-cavity. The Hamiltonian for SC-charge qubits inside a single mode cavity is considered. Three- and two-qubit operations are generated by applying a classical magnetic field with the flux. Therefore, a number of quantum logic gates are realized. Numerical simulations and calculation of the fidelity are used to prove the success of these operations for these gates. -- Highlights: A family of quantum logic gates is proposed via SC-qubits coupled to a cavity. Three- and two-qubit operations are generated via a classical field with the flux. Numerical simulations and calculation of the fidelity are used to prove the success of these operations for these gates.

  18. Oxidation catalyst

    DOEpatents

    Ceyer, Sylvia T.; Lahr, David L.

    2010-11-09

    The present invention generally relates to catalyst systems and methods for oxidation of carbon monoxide. The invention involves catalyst compositions which may be advantageously altered by, for example, modification of the catalyst surface to enhance catalyst performance. Catalyst systems of the present invention may be capable of performing the oxidation of carbon monoxide at relatively lower temperatures (e.g., 200 K and below) and at relatively higher reaction rates than known catalysts. Additionally, catalyst systems disclosed herein may be substantially lower in cost than current commercial catalysts. Such catalyst systems may be useful in, for example, catalytic converters, fuel cells, sensors, and the like.

  19. Passivation of oxide traps and interface states in GaAs metal-oxide-semiconductor capacitor by LaTaON passivation layer and fluorine incorporation

    SciTech Connect

    Liu, L. N.; Choi, H. W.; Lai, P. T.; Xu, J. P.

    2015-11-23

    GaAs metal-oxide-semiconductor capacitor with TaYON/LaTaON gate-oxide stack and fluorine-plasma treatment is fabricated and compared with its counterparts without the LaTaON passivation interlayer or the fluorine treatment. Experimental results show that the sample exhibits better characteristics: low interface-state density (8 × 10{sup 11 }cm{sup −2}/eV), small flatband voltage (0.69 V), good capacitance-voltage behavior, small frequency dispersion, and small gate leakage current (6.35 × 10{sup −6} A/cm{sup 2} at V{sub fb} + 1 V). These should be attributed to the suppressed growth of unstable Ga and As oxides on the GaAs surface during gate-oxide annealing by the LaTaON interlayer and fluorine incorporation, and the passivating effects of fluorine atoms on the acceptor-like interface and near-interface traps.

  20. Gas-controlled dynamic vacuum insulation with gas gate

    DOEpatents

    Benson, David K.; Potter, Thomas F.

    1994-06-07

    Disclosed is a dynamic vacuum insulation comprising sidewalls enclosing an evacuated chamber and gas control means for releasing hydrogen gas into a chamber to increase gas molecule conduction of heat across the chamber and retrieving hydrogen gas from the chamber. The gas control means includes a metal hydride that absorbs and retains hydrogen gas at cooler temperatures and releases hydrogen gas at hotter temperatures; a hydride heating means for selectively heating the metal hydride to temperatures high enough to release hydrogen gas from the metal hydride; and gate means positioned between the metal hydride and the chamber for selectively allowing hydrogen to flow or not to flow between said metal hydride and said chamber.

  1. Gas-controlled dynamic vacuum insulation with gas gate

    DOEpatents

    Benson, D.K.; Potter, T.F.

    1994-06-07

    Disclosed is a dynamic vacuum insulation comprising sidewalls enclosing an evacuated chamber and gas control means for releasing hydrogen gas into a chamber to increase gas molecule conduction of heat across the chamber and retrieving hydrogen gas from the chamber. The gas control means includes a metal hydride that absorbs and retains hydrogen gas at cooler temperatures and releases hydrogen gas at hotter temperatures; a hydride heating means for selectively heating the metal hydride to temperatures high enough to release hydrogen gas from the metal hydride; and gate means positioned between the metal hydride and the chamber for selectively allowing hydrogen to flow or not to flow between said metal hydride and said chamber. 25 figs.

  2. Gate Drive For High Speed, High Power IGBTs

    SciTech Connect

    Nguyen, M.N.; Cassel, R.L.; de Lamare, J.E.; Pappas, G.C.; /SLAC

    2007-06-18

    A new gate drive for high-voltage, high-power IGBTs has been developed for the SLAC NLC (Next Linear Collider) Solid State Induction Modulator. This paper describes the design and implementation of a driver that allows an IGBT module rated at 800A/3300V to switch up to 3000A at 2200V in 3{micro}S with a rate of current rise of more than 10000A/{micro}S, while still being short circuit protected. Issues regarding fast turn on, high de-saturation voltage detection, and low short circuit peak current will be presented. A novel approach is also used to counter the effect of unequal current sharing between parallel chips inside most high-power IGBT modules. It effectively reduces the collector-emitter peak current, and thus protects the IGBT from being destroyed during soft short circuit conditions at high di/dt.

  3. Quantum gates controlled by spin chain soliton excitations

    SciTech Connect

    Cuccoli, Alessandro; Nuzzi, Davide; Vaia, Ruggero; Verrucchi, Paola

    2014-05-07

    Propagation of soliton-like excitations along spin chains has been proposed as a possible way for transmitting both classical and quantum information between two distant parties with negligible dispersion and dissipation. In this work, a somewhat different use of solitons is considered. Solitons propagating along a spin chain realize an effective magnetic field, well localized in space and time, which can be exploited as a means to manipulate the state of an external spin (i.e., a qubit) that is weakly coupled to the chain. We have investigated different couplings between the qubit and the chain, as well as different soliton shapes, according to a Heisenberg chain model. It is found that symmetry properties strongly affect the effectiveness of the proposed scheme, and the most suitable setups for implementing single qubit quantum gates are singled out.

  4. Methods for determining atypical gate valve thrust requirements

    SciTech Connect

    Steele, R. Jr.; Watkins, J.C.; DeWall, K.G.

    1995-04-01

    Evaluating the performance of rising stem, wedge type, gate valves used in nuclear power plant is not a problem when the valves can be design-basis tested and their operability margins determined diagnostically. The problem occurs when they cannot be tested because of plant system limitations or when they can be tested only at some less-than-design-basis condition. To evaluate the performance of these valves requires various analytical and/or extrapolation methods by which the design-basis stem thrust requirement can be determined. This has been typically accomplished with valve stem thrust models used to calculate the requirements or by extrapolating the results from a less-than-design-basis test. The stem thrust models used by the nuclear industry to determine the opening or closing stem thrust requirements for these gate valves have generally assumed that the highest load the valve experiences during closure (but before seating) is at flow isolation and during unwedging or before flow initiation in the opening direction. However, during full-scale valve testing conducted for the USNRC, several of the valves produced stem thrust histories that showed peak closing stem forces occurring before flow isolation in the closing direction and after flow initiation in the opening direction. All of the valves that exhibited this behavior in the closing direction also showed signs of internal damage. Initially, we dismissed the early peak in the closing stem thrust requirement as damage-induced and labeled it nonpredictable behavior. Opening responses were not a priority in our early research, so that phenomenon was set aside for later evaluation.

  5. Low-frequency 1/f noise in MoS{sub 2} transistors: Relative contributions of the channel and contacts

    SciTech Connect

    Renteria, J.; Jiang, C.; Samnakay, R.; Rumyantsev, S. L.; Goli, P.; Balandin, A. A.; Shur, M. S.

    2014-04-14

    We report on the results of the low-frequency (1/f, where f is frequency) noise measurements in MoS{sub 2} field-effect transistors revealing the relative contributions of the MoS{sub 2} channel and Ti/Au contacts to the overall noise level. The investigation of the 1/f noise was performed for both as fabricated and aged transistors. It was established that the McWhorter model of the carrier number fluctuations describes well the 1/f noise in MoS{sub 2} transistors, in contrast to what is observed in graphene devices. The trap densities extracted from the 1/f noise data for MoS{sub 2} transistors, are 2??10{sup 19}?eV{sup ?1}cm{sup ?3} and 2.5??10{sup 20}?eV{sup ?1}cm{sup ?3} for the as fabricated and aged devices, respectively. It was found that the increase in the noise level of the aged MoS{sub 2} transistors is due to the channel rather than the contact degradation. The obtained results are important for the proposed electronic applications of MoS{sub 2} and other van der Waals materials.

  6. The Gated X-ray Detector for the National Ignition Facility

    SciTech Connect

    Oertel, J A; Barnes, C; Archuleta, T; Casper, L; Fatherley, V; Heinrichs, T; King, R; Landers, D; Lopez, F; Sanchez, P; Sandoval, G; Schrank, L; Walsh, P; Bell, P; Brown, M; Costa, R; Holder, J; Montalongo, S; Pederson, N

    2006-05-18

    Two new gated x-ray imaging cameras have recently been designed, constructed and delivered to the National Ignition Facility in Livermore, CA. These Gated X-ray Detectors are each designed to fit within an aluminum airbox with a large capacity cooling plane and are fitted with an array of environmental housekeeping sensors. These instruments are significant different from earlier generations of gated x-ray images due in parts to an innovative impendence matching scheme, advanced phosphor screens, pulsed phosphor circuits, precision assembly fixturing, unique system monitoring and complete remote computer control. Preliminary characterization has shown repeatable uniformity between imaging strips, improved spatial resolution and no detectable impendence reflections.

  7. Design of a spin-wave majority gate employing mode selection

    SciTech Connect

    Klingler, S. Pirro, P.; Brcher, T.; Leven, B.; Hillebrands, B.; Chumak, A. V.

    2014-10-13

    The design of a microstructured, fully functional spin-wave majority gate is presented and studied using micromagnetic simulations. This all-magnon logic gate consists of three-input waveguides, a spin-wave combiner, and an output waveguide. In order to ensure the functionality of the device, the output waveguide is designed to perform spin-wave mode selection. We demonstrate that the gate evaluates the majority of the input signals coded into the spin-wave phase. Moreover, the all-magnon data processing device is used to perform logic AND-, OR-, NAND-, and NOR- operations.

  8. VIDEO: Bill Gates and Secretary Chu Chat on the Future of Energy |

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Department of Energy Bill Gates and Secretary Chu Chat on the Future of Energy VIDEO: Bill Gates and Secretary Chu Chat on the Future of Energy March 5, 2012 - 1:24pm Addthis Secretary Chu sits down with Microsoft Founder and Chairman Bill Gates at the 2012 ARPA-E Energy Innovation Summit. April Saylor April Saylor Former Digital Outreach Strategist, Office of Public Affairs Last week, attendees at the 2012 ARPA-E Energy Innovation Summit heard from a variety of leaders from across the

  9. Negative differential resistance in GaN tunneling hot electron transistors

    SciTech Connect

    Yang, Zhichao; Nath, Digbijoy; Rajan, Siddharth

    2014-11-17

    Room temperature negative differential resistance is demonstrated in a unipolar GaN-based tunneling hot electron transistor. Such a device employs tunnel-injected electrons to vary the electron energy and change the fraction of reflected electrons, and shows repeatable negative differential resistance with a peak to valley current ratio of 7.2. The device was stable when biased in the negative resistance regime and tunable by changing collector bias. Good repeatability and double-sweep characteristics at room temperature show the potential of such device for high frequency oscillators based on quasi-ballistic transport.

  10. Influence of anharmonic phonon decay on self-heating in Si nanowire transistors

    SciTech Connect

    Rhyner, Reto Luisier, Mathieu

    2014-08-11

    Anharmonic phonon-phonon scattering is incorporated into an electro-thermal quantum transport approach based on the nonequilibrium Green's function formalism. Electron-phonon and phonon-phonon interactions are taken into account through scattering self-energies solved in the self-consistent Born approximation. While studying self-heating effects in ultra-scaled Si nanowire transistors, it is found that the phonon decay process softens the artificial accumulation of high energy phonons caused by electron relaxations close to the drain region. This leads to an increase of the device current in the ON-state and a reduction of the effective lattice temperature.

  11. Mesoscopic Kondo Screening Effect in a Single-Electron Transistor Embedded in a Metallic Ring

    SciTech Connect

    Hu, Hui; Zhang, Guang-Ming; Yu, Lu

    2001-06-11

    We study the Kondo screening effect generated by a single-electron transistor or quantum dot embedded in a small metallic ring. When the ring circumference L becomes comparable to the fundamental length scale {xi}{sup 0}{sub K}={Dirac_h}{upsilon}{sub F}/ T{sup 0}{sub K} associated with the bulk Kondo temperature, the Kondo resonance is strongly affected, depending on the total number of electrons (mod4) and magnetic flux threading the ring. The resulting Kondo-assisted persistent currents are also calculated in both Kondo and mixed-valence regimes, and the maximum values are found in the crossover region.

  12. Carrier injection engineering in nanowire transistors via dopant and shape monitoring of the access regions

    SciTech Connect

    Berrada, Salim Bescond, Marc Cavassilas, Nicolas; Raymond, Laurent; Lannoo, Michel

    2015-10-12

    This work theoretically studies the influence of both the geometry and the discrete nature of dopants of the access regions in ultra-scaled nanowire transistors. By means of self-consistent quantum transport simulations, we show that discrete dopants induce quasi-localized states which govern carrier injection into the channel. Carrier injection can be enhanced by taking advantage of the dielectric confinement occurring in these access regions. We demonstrate that the optimization of access resistance can be obtained by a careful control of shape and dopant position. These results pave the way for contact resistance engineering in forthcoming device generations.

  13. Solvent-induced changes in PEDOT:PSS films for organic electrochemical transistors

    SciTech Connect

    Zhang, Shiming; Kumar, Prajwal; Nouas, Amel Sarah; Fontaine, Laurie; Tang, Hao; Cicoira, Fabio

    2015-01-01

    Organic electrochemical transistors based on the conducting polymer poly(3,4-ethylenedioxythiophene) doped with poly(styrenesulfonate) (PEDOT:PSS) are of interest for several bioelectronic applications. In this letter, we investigate the changes induced by immersion of PEDOT:PSS films, processed by spin coating from different mixtures, in water and other solvents of different polarities. We found that the film thickness decreases upon immersion in polar solvents, while the electrical conductivity remains unchanged. The decrease in film thickness is minimized via the addition of a cross-linking agent to the mixture used for the spin coating of the films.

  14. Radio frequency ion source operated with field effect transistor based radio frequency system

    SciTech Connect

    Ando, A.; Komuro, A.; Matsuno, T.; Tsumori, K.; Takeiri, Y.

    2010-02-15

    Characteristics of radio frequency (RF) plasma production are investigated using a field effect transistor inverter power supply as an RF wave source. With the frequency of around 0.3 MHz, an electron density over 10{sup 18} m{sup -3} is produced in argon plasma. Although lower densities are obtained in hydrogen plasma, it drastically increased up to 5x10{sup 18} m{sup -3} with an axial magnetic field of around 100 G applied in the driver region. Effects of the magnetic field and gas pressure are investigated in the RF produced plasma with the frequency of several hundred kilohertz.

  15. Total dose and dose rate models for bipolar transistors in circuit simulation.

    SciTech Connect

    Campbell, Phillip Montgomery; Wix, Steven D.

    2013-05-01

    The objective of this work is to develop a model for total dose effects in bipolar junction transistors for use in circuit simulation. The components of the model are an electrical model of device performance that includes the effects of trapped charge on device behavior, and a model that calculates the trapped charge densities in a specific device structure as a function of radiation dose and dose rate. Simulations based on this model are found to agree well with measurements on a number of devices for which data are available.

  16. Non-hysteretic superconducting quantum interference proximity transistor with enhanced responsivity

    SciTech Connect

    Jabdaraghi, R. N.; Meschke, M.; Pekola, J. P.

    2014-02-24

    This Letter presents fabrication and characterization of an optimized superconducting quantum interference proximity transistor. The present device, characterized by reduced tunnel junction area and shortened normal-metal section, demonstrates no hysteresis at low temperatures as we increased the Josephson inductance of the weak link by decreasing its cross section. It has consequently almost an order of magnitude improved magnetic field responsivity as compared to the earlier design. The modulation of both the current and the voltage across the junction have been measured as a function of magnetic flux piercing the superconducting loop.

  17. Ballistic electron transport calculation of strained germanium-tin fin field-effect transistors

    SciTech Connect

    Lan, H.-S.; Liu, C. W.

    2014-05-12

    The dependence of ballistic electron current on Sn content, sidewall orientations, fin width, and uniaxial stress is theoretically studied for the GeSn fin field-effect transistors. Alloying Sn increases the direct ? valley occupancy and enhances the injection velocity at virtual source node. (112{sup }) sidewall gives the highest current enhancement due to the rapidly increasing ? valley occupancy. The non-parabolicity of the ? valley affects the occupancy significantly. However, uniaxial tensile stress and the shrinkage of fin width reduce the ? valley occupancy, and the currents are enhanced by increasing occupancy of specific indirect L valleys with high injection velocity.

  18. Impact of graphene polycrystallinity on the performance of graphene field-effect transistors

    SciTech Connect

    Jimnez, David; Chaves, Ferney [Departament d'Enginyeria Electrnica, Escola d'Enginyeria, Universitat Autnoma de Barcelona, 08193-Bellaterra (Spain); Cummings, Aron W.; Van Tuan, Dinh [ICN2, Institut Catal de Nanociencia i Nanotecnologia, Campus UAB, 08193 Bellaterra (Barcelona) (Spain); Kotakoski, Jani [Faculty of Physics, University of Vienna, Boltzmanngasse 5, 1090 Wien (Austria); Department of Physics, University of Helsinki, P.O. Box 43, 00014 University of Helsinki (Finland); Roche, Stephan [ICN2, Institut Catal de Nanociencia i Nanotecnologia, Campus UAB, 08193 Bellaterra (Barcelona) (Spain); ICREA, Instituci Catalana de Recerca i Estudis Avanats, 08070 Barcelona (Spain)

    2014-01-27

    We have used a multi-scale physics-based model to predict how the grain size and different grain boundary morphologies of polycrystalline graphene will impact the performance metrics of graphene field-effect transistors. We show that polycrystallinity has a negative impact on the transconductance, which translates to a severe degradation of the maximum and cutoff frequencies. On the other hand, polycrystallinity has a positive impact on current saturation, and a negligible effect on the intrinsic gain. These results reveal the complex role played by graphene grain boundaries and can be used to guide the further development and optimization of graphene-based electronic devices.

  19. A versatile LabVIEW and field-programmable gate array-based scanning probe microscope for in operando electronic device characterization

    SciTech Connect

    Berger, Andrew J. Page, Michael R.; Young, Justin R.; Bhallamudi, Vidya P.; Johnston-Halperin, Ezekiel; Pelekhov, Denis V.; Hammel, P. Chris; Jacob, Jan; Lewis, Jim; Wenzel, Lothar

    2014-12-15

    Understanding the complex properties of electronic and spintronic devices at the micro- and nano-scale is a topic of intense current interest as it becomes increasingly important for scientific progress and technological applications. In operando characterization of such devices by scanning probe techniques is particularly well-suited for the microscopic study of these properties. We have developed a scanning probe microscope (SPM) which is capable of both standard force imaging (atomic, magnetic, electrostatic) and simultaneous electrical transport measurements. We utilize flexible and inexpensive FPGA (field-programmable gate array) hardware and a custom software framework developed in National Instrument's LabVIEW environment to perform the various aspects of microscope operation and device measurement. The FPGA-based approach enables sensitive, real-time cantilever frequency-shift detection. Using this system, we demonstrate electrostatic force microscopy of an electrically biased graphene field-effect transistor device. The combination of SPM and electrical transport also enables imaging of the transport response to a localized perturbation provided by the scanned cantilever tip. Facilitated by the broad presence of LabVIEW in the experimental sciences and the openness of our software solution, our system permits a wide variety of combined scanning and transport measurements by providing standardized interfaces and flexible access to all aspects of a measurement (input and output signals, and processed data). Our system also enables precise control of timing (synchronization of scanning and transport operations) and implementation of sophisticated feedback protocols, and thus should be broadly interesting and useful to practitioners in the field.

  20. Low Power, Red, Green and Blue Carbon Nanotube Enabled Vertical Organic Light Emitting Transistors for Active Matrix OLED Displays

    SciTech Connect

    McCarthy, M. A. [University of Florida, Gainesville; Liu, B. [University of Florida, Gainesville; Donoghue, E. P. [University of Florida, Gainesville; Kravchenko, Ivan I [ORNL; Kim, D. Y. [University of Florida, Gainesville; So, Franky [University of Florida, Gainesville; Rinzler, A. G. [University of Florida, Gainesville

    2011-01-01

    Organic semiconductors are potential alternatives to polycrystalline silicon as the semiconductor used in the backplane of active matrix organic light emitting diode displays. Demonstrated here is a light-emitting transistor with an organic channel, operating with low power dissipation at low voltage, and high aperture ratio, in three colors: red, green and blue. The single-wall carbon nanotube network source electrode is responsible for the high level of performance demonstrated. A major benefit enabled by this architecture is the integration of the drive transistor, storage capacitor and light emitter into a single device. Performance comparable to commercialized polycrystalline-silicon TFT driven OLEDs is demonstrated.

  1. Progress in high-temperature superconducting transistors and other devices; Proceedings of the SPIE Meeting, Vol. 1394, Santa Clara, CA, Oct. 4, 5, 1990

    SciTech Connect

    Singh, R.; Narayan, J.; Shaw, D.T.

    1991-01-01

    Various papers on progress in high-temperature superconducting transistors and other devices are presented. Individual topics addressed include: superconductor/semiconductor structure and its application to superconducting devices, superconducting YBa{sup 2}Cu{sub 3}O{sub 7} films on Si and GaAs with conducting indium tin oxide buffer layers, high-temperature superconducting Josephson junction devices, planar SNS Josephson junctions using multilayer Bi system, YBa{sup 2}Cu{sub 3}O{sub 7-x}/Au/Nb device structures, cleaved surfaces of high Tc films for making SNS structures, high-temperature superconductive microwave technology for space applications, high-Tc superconducting infrared bolometric detector, thin film processing and device fabrication in the Tl-Ca-Ba-Cu-O system. Also discussed are: grain-oriented high--Tc superconductors and their applications, speed of optically controlled superconducting devices, effect of laser irradiation on superconducting properties of laser-deposited YBa{sub 2}Cu{sub 3}O{sub 7} thin films, role of buffer layers in the laser-ablated films on metallic substrates, progress toward device applications using MOCVD of TlBaCaCuO, versatility of metal organic chemical vapor deposition process for fabrication of high-quality YBCO superconducting thin films.

  2. Vehicle Technologies Office Merit Review 2015: GATE Center for Electric Drive Transportation

    Energy.gov [DOE]

    Presentation given by Regents University of Michigan at 2015 DOE Hydrogen and Fuel Cells Program and Vehicle Technologies Office Annual Merit Review and Peer Evaluation Meeting about GATE Center...

  3. Formation of strain-induced quantum dots in gated semiconductor nanostructures

    SciTech Connect

    Thorbeck, Ted; Zimmerman, Neil M.

    2015-08-15

    A long-standing mystery in the field of semiconductor quantum dots (QDs) is: Why are there so many unintentional dots (also known as disorder dots) which are neither expected nor controllable. It is typically assumed that these unintentional dots are due to charged defects, however the frequency and predictability of the location of the unintentional QDs suggests there might be additional mechanisms causing the unintentional QDs besides charged defects. We show that the typical strains in a semiconductor nanostructure from metal gates are large enough to create strain-induced quantum dots. We simulate a commonly used QD device architecture, metal gates on bulk silicon, and show the formation of strain-induced QDs. The strain-induced QD can be eliminated by replacing the metal gates with poly-silicon gates. Thus strain can be as important as electrostatics to QD device operation operation.

  4. Vehicle Technologies Office Merit Review 2014: DOE GATE Center of Excellence in Sustainable Vehicle Systems

    Energy.gov [DOE]

    Presentation given by Clemson University at 2014 DOE Hydrogen and Fuel Cells Program and Vehicle Technologies Office Annual Merit Review and Peer Evaluation Meeting about DOE GATE Center of...

  5. Multi-images deconvolution improves signal-to-noise ratio on gated stimulated emission depletion microscopy

    SciTech Connect

    Castello, Marco; Diaspro, Alberto; Vicidomini, Giuseppe

    2014-12-08

    Time-gated detection, namely, only collecting the fluorescence photons after a time-delay from the excitation events, reduces complexity, cost, and illumination intensity of a stimulated emission depletion (STED) microscope. In the gated continuous-wave- (CW-) STED implementation, the spatial resolution improves with increased time-delay, but the signal-to-noise ratio (SNR) reduces. Thus, in sub-optimal conditions, such as a low photon-budget regime, the SNR reduction can cancel-out the expected gain in resolution. Here, we propose a method which does not discard photons, but instead collects all the photons in different time-gates and recombines them through a multi-image deconvolution. Our results, obtained on simulated and experimental data, show that the SNR of the restored image improves relative to the gated image, thereby improving the effective resolution.

  6. Three dimensional time-gated tracking of non-blinking quantum...

    Office of Scientific and Technical Information (OSTI)

    As a result, signal-to-noise is improved in the cellular milieu through the use of pulsed excitation and time-gated detection. Authors: DeVore, Matthew S. 1 ; Werner, James H. ...

  7. Vehicle Technologies Office Merit Review 2015: GATE Center of Excellence in Sustainable Vehicle Systems

    Office of Energy Efficiency and Renewable Energy (EERE)

    Presentation given by Clemson University at 2015 DOE Hydrogen and Fuel Cells Program and Vehicle Technologies Office Annual Merit Review and Peer Evaluation Meeting about GATE center of excellence...

  8. Vehicle Technologies Office Merit Review 2014: GATE: Energy Efficient Vehicles for Sustainable Mobility

    Office of Energy Efficiency and Renewable Energy (EERE)

    Presentation given by Ohio State University at 2014 DOE Hydrogen and Fuel Cells Program and Vehicle Technologies Office Annual Merit Review and Peer Evaluation Meeting about GATE: energy efficient...

  9. Vehicle Technologies Office Merit Review 2015: GATE: Energy Efficient Vehicles for Sustainable Mobility

    Office of Energy Efficiency and Renewable Energy (EERE)

    Presentation given by The Ohio State University at 2015 DOE Hydrogen and Fuel Cells Program and Vehicle Technologies Office Annual Merit Review and Peer Evaluation Meeting about GATE: energy...

  10. Vehicle Technologies Office Merit Review 2015: Gate Driver Optimization for WBG Applications

    Energy.gov [DOE]

    Presentation given by Oak Ridge National Laboratory at 2015 DOE Hydrogen and Fuel Cells Program and Vehicle Technologies Office Annual Merit Review and Peer Evaluation Meeting about gate driver...

  11. Performance analysis of boron nitride embedded armchair graphene nanoribbon metaloxidesemiconductor field effect transistor with Stone Wales defects

    SciTech Connect

    Chanana, Anuja; Sengupta, Amretashis; Mahapatra, Santanu

    2014-01-21

    We study the performance of a hybrid Graphene-Boron Nitride armchair nanoribbon (a-GNR-BN) n-MOSFET at its ballistic transport limit. We consider three geometric configurations 3p, 3p + 1, and 3p + 2 of a-GNR-BN with BN atoms embedded on either side (2, 4, and 6 BN) on the GNR. Material properties like band gap, effective mass, and density of states of these H-passivated structures are evaluated using the Density Functional Theory. Using these material parameters, self-consistent Poisson-Schrodinger simulations are carried out under the Non Equilibrium Green's Function formalism to calculate the ballistic n-MOSFET device characteristics. For a hybrid nanoribbon of width ?5?nm, the simulated ON current is found to be in the range of 265??A280??A with an ON/OFF ratio 7.1 10{sup 6}7.4 10{sup 6} for a V{sub DD}?=?0.68?V corresponding to 10?nm technology node. We further study the impact of randomly distributed Stone Wales (SW) defects in these hybrid structures and only 2.5% degradation of ON current is observed for SW defect density of 3.18%.

  12. Gate-tunable exchange coupling between cobalt clusters on graphene (Journal

    Office of Scientific and Technical Information (OSTI)

    Article) | DOE PAGES Gate-tunable exchange coupling between cobalt clusters on graphene Title: Gate-tunable exchange coupling between cobalt clusters on graphene Authors: Chen, Hua ; Niu, Qian ; Zhang, Zhenyu ; MacDonald, Allan H. Publication Date: 2013-04-10 OSTI Identifier: 1104471 Type: Publisher's Accepted Manuscript Journal Name: Physical Review B Additional Journal Information: Journal Volume: 87; Journal Issue: 14; Journal ID: ISSN 1098-0121 Publisher: American Physical Society

  13. Effects of pressure and temperature on gate valve unwedging

    SciTech Connect

    Damerell, P.S.; Harrison, D.H.; Hayes, P.W.; Simons, J.W.; Walker, T.A.

    1996-12-01

    The stem thrust required to unwedge a gate valve is influenced by the pressure and temperature when the valve is closed and by the changes in these conditions between closure and opening. {open_quotes}Pressure locking{close_quotes} and {open_quotes}thermal binding{close_quotes} refer to situations where pressure and temperature effects cause the unwedging load to be much higher than normal. A model of these phenomena has been developed. Wedging (closure) is modeled as developing an {open_quotes}interference{close_quotes} between the disk and its seat rings in the valve. The effects of pressure and temperature are analyzed to determine the change in this disk-to-seat {open_quotes}interference{close_quotes}. Flexibilities, of the disk, body, stem and yoke strongly influence the unwedging thrust. Calculations and limited comparisons to data have been performed for a range of valve designs and scenarios. Pressure changes can increase the unwedging load when there is either a uniform pressure decrease, or a situation where the bonnet pressure exceeds the pressures in the adjacent piping. Temperature changes can increase the unwedging load when: (1) valve closure at elevated system temperature produces a delayed stem expansion, (2) a temperature increase after closure produces a bonnet pressure increase, or (3) a temperature change after closure produces an increase in the disk-to-seat {open_quotes}interference{close_quotes} or disk-to-seat friction.

  14. Range-gated imaging for near-field target identification

    SciTech Connect

    Yates, G.J.; Gallegos, R.A.; McDonald, T.E.

    1996-12-01

    The combination of two complementary technologies developed independently at Los Alamos National Laboratory (LANL) and Sandia National Laboratory (SNL) has demonstrated feasibility of target detection and image capture in a highly light-scattering, medium. The technique uses a compact SNL developed Photoconductive Semiconductor Switch/Laser Diode Array (PCSS/LDA) for short-range (distances of 8 to 10 m) large Field-Of-View (FOV) target illumination. Generation of a time-correlated echo signal is accomplished using a photodiode. The return image signal is recorded with a high-speed shuttered Micro-Channel-Plate Image Intensifier (MCPII), declined by LANL and manufactured by Philips Photonics. The MCPII is rated using a high-frequency impedance-matching microstrip design to produce 150 to 200 ps duration optical exposures. The ultra first shuttering producer depth resolution of a few inches along the optic axis between the MCPII and the target, producing enhanced target images effectively deconvolved from noise components from the scattering medium in the FOV. The images from the MCPII are recorded with an RS-170 Charge-Coupled-Device camera and a Big Sky, Beam Code, PC-based digitizer frame grabber and analysis package. Laser pulse data were obtained by the but jitter problems and spectral mismatches between diode spectral emission wavelength and MCPII photocathode spectral sensitivity prevented the capture of fast gating imaging with this demonstration system. Continued development of the system is underway.

  15. Growth and properties of crystalline barium oxide on the GaAs(100) substrate

    SciTech Connect

    Yasir, M.; Dahl, J.; Lng, J.; Tuominen, M.; Punkkinen, M. P. J.; Laukkanen, P. Kokko, K.; Kuzmin, M.; Ioffe Physical-Technical Institute, Russian Academy of Sciences, St. Petersburg 194021 ; Korpijrvi, V.-M.; Polojrvi, V.; Guina, M.

    2013-11-04

    Growing a crystalline oxide film on III-V semiconductor renders possible approaches to improve operation of electronics and optoelectronics heterostructures such as oxide/semiconductor junctions for transistors and window layers for solar cells. We demonstrate the growth of crystalline barium oxide (BaO) on GaAs(100) at low temperatures, even down to room temperature. Photoluminescence (PL) measurements reveal that the amount of interface defects is reduced for BaO/GaAs, compared to Al{sub 2}O{sub 3}/GaAs, suggesting that BaO is a useful buffer layer to passivate the surface of the III-V device material. PL and photoemission data show that the produced junction tolerates the post heating around 600?C.

  16. Theory of signal and noise in double-gated nanoscale electronic pH sensors

    SciTech Connect

    Go, Jonghyun; Nair, Pradeep R.; Alam, Muhammad A.

    2012-08-01

    The maximum sensitivity of classical nanowire (NW)-based pH sensors is defined by the Nernst limit of 59 mV/pH. For typical noise levels in ultra-small single-gated nanowire sensors, the signal-to-noise ratio is often not sufficient to resolve pH changes necessary for a broad range of applications. Recently, a new class of double-gated devices was demonstrated to offer apparent 'super-Nernstian' response (>59 mV/pH) by amplifying the original pH signal through innovative biasing schemes. However, the pH-sensitivity of these nanoscale devices as a function of biasing configurations, number of electrodes, and signal-to-noise ratio (SNR) remains poorly understood. Even the basic question such as 'Do double-gated sensors actually resolve smaller changes in pH compared to conventional single-gated sensors in the presence of various sources of noise?' remains unanswered. In this article, we provide a comprehensive numerical and analytical theory of signal and noise of double-gated pH sensors to conclude that, while the theoretical lower limit of pH-resolution does not improve for double-gated sensors, this new class of sensors does improve the (instrument-limited) pH resolution.

  17. GATE Center of Excellence at UAB in Lightweight Materials for Automotive Applications

    SciTech Connect

    2011-07-31

    This report summarizes the accomplishments of the UAB GATE Center of Excellence in Lightweight Materials for Automotive Applications. The first Phase of the UAB DOE GATE center spanned the period 2005-2011. The UAB GATE goals coordinated with the overall goals of DOE's FreedomCAR and Vehicles Technologies initiative and DOE GATE program. The FCVT goals are: (1) Development and validation of advanced materials and manufacturing technologies to significantly reduce automotive vehicle body and chassis weight without compromising other attributes such as safety, performance, recyclability, and cost; (2) To provide a new generation of engineers and scientists with knowledge and skills in advanced automotive technologies. The UAB GATE focused on both the FCVT and GATE goals in the following manner: (1) Train and produce graduates in lightweight automotive materials technologies; (2) Structure the engineering curricula to produce specialists in the automotive area; (3) Leverage automotive related industry in the State of Alabama; (4) Expose minority students to advanced technologies early in their career; (5) Develop innovative virtual classroom capabilities tied to real manufacturing operations; and (6) Integrate synergistic, multi-departmental activities to produce new product and manufacturing technologies for more damage tolerant, cost-effective, and lighter automotive structures.

  18. Integrated digital inverters based on two-dimensional anisotropic ReS₂ field-effect transistors

    DOE PAGES [OSTI]

    Liu, Erfu; Fu, Yajun; Wang, Yaojia; Feng, Yanqing; Liu, Huimei; Wan, Xiangang; Zhou, Wei; Wang, Baigeng; Shao, Lubin; Ho, Ching -Hwa; et al

    2015-05-07

    Semiconducting two-dimensional transition metal dichalcogenides are emerging as top candidates for post-silicon electronics. While most of them exhibit isotropic behaviour, lowering the lattice symmetry could induce anisotropic properties, which are both scientifically interesting and potentially useful. Here we present atomically thin rhenium disulfide (ReS₂) flakes with unique distorted 1T structure, which exhibit in-plane anisotropic properties. We fabricated monolayer and few-layer ReS₂ field-effect transistors, which exhibit competitive performance with large current on/off ratios (~10⁷) and low subthreshold swings (100 mV per decade). The observed anisotropic ratio along two principle axes reaches 3.1, which is the highest among all known two-dimensional semiconductingmore » materials. Furthermore, we successfully demonstrated an integrated digital inverter with good performance by utilizing two ReS₂ anisotropic field-effect transistors, suggesting the promising implementation of large-scale two-dimensional logic circuits. Our results underscore the unique properties of two-dimensional semiconducting materials with low crystal symmetry for future electronic applications.« less

  19. Integrated digital inverters based on two-dimensional anisotropic ReS₂ field-effect transistors

    SciTech Connect

    Liu, Erfu; Fu, Yajun; Wang, Yaojia; Feng, Yanqing; Liu, Huimei; Wan, Xiangang; Zhou, Wei; Wang, Baigeng; Shao, Lubin; Ho, Ching -Hwa; Huang, Ying -Sheng; Cao, Zhengyi; Wang, Laiguo; Li, Aidong; Zeng, Junwen; Song, Fengqi; Wang, Xinran; Shi, Yi; Yuan, Hongtao; Hwang, Harold Y.; Cui, Yi; Miao, Feng; Xing, Dingyu

    2015-05-07

    Semiconducting two-dimensional transition metal dichalcogenides are emerging as top candidates for post-silicon electronics. While most of them exhibit isotropic behaviour, lowering the lattice symmetry could induce anisotropic properties, which are both scientifically interesting and potentially useful. Here we present atomically thin rhenium disulfide (ReS₂) flakes with unique distorted 1T structure, which exhibit in-plane anisotropic properties. We fabricated monolayer and few-layer ReS₂ field-effect transistors, which exhibit competitive performance with large current on/off ratios (~10⁷) and low subthreshold swings (100 mV per decade). The observed anisotropic ratio along two principle axes reaches 3.1, which is the highest among all known two-dimensional semiconducting materials. Furthermore, we successfully demonstrated an integrated digital inverter with good performance by utilizing two ReS₂ anisotropic field-effect transistors, suggesting the promising implementation of large-scale two-dimensional logic circuits. Our results underscore the unique properties of two-dimensional semiconducting materials with low crystal symmetry for future electronic applications.

  20. A Water-Soluble Polythiophene for Organic Field-Effect Transistors

    SciTech Connect

    Shao, Ming; He, Youjun; Hong, Kunlun; Rouleau, Christopher M; Geohegan, David B; Xiao, Kai

    2013-01-01

    Synthesis of a non-ionic, water-soluble poly(thiophene) (PT) derivative, poly(3-(2-(2-methoxyethoxy) ethoxy)ethoxy) methylthiophene) (P3TEGT) with a hydrophilic tri-ethylene glycol side group, is reported and thin films of the polymer suitable for organic field-effect transistors (OFETs) are characterized by combining analysis techniques that include UV-Vis absorption and fluorescence spectroscopy, x-ray diffraction, and atomic force microscopy. After thermal annealing, P3TEGT films exhibit a well-organized nanofibrillar lamellar nanostructure that originates from the strong - stacking of the thiophene backbones. P-type organic field-effect transistors (OFETs) with hole mobilities of 10-5 cm2V-1s-1 were fabricated from this water-soluble poly(thiophene) derivative, demonstrating the possibility that environmentally-friendly solvents may be promising alternatives for the low-cost, green solution-based organic electronic device manufacturing of OFETs, organic photovoltaics (OPVs), and biosensors.

  1. P-doping-free III-nitride high electron mobility light-emitting diodes and transistors

    SciTech Connect

    Li, Baikui; Tang, Xi; Chen, Kevin J.; Wang, Jiannong

    2014-07-21

    We report that a simple metal-AlGaN/GaN Schottky diode is capable of producing GaN band-edge ultraviolet emission at 3.4?eV at a small forward bias larger than ?2?V at room temperature. Based on the surface states distribution of AlGaN, a mature impact-ionization-induced Fermi-level de-pinning model is proposed to explain the underlying mechanism of the electroluminescence (EL) process. By experimenting with different Schottky metals, Ni/Au and Pt/Au, we demonstrated that this EL phenomenon is a universal property of metal-AlGaN/GaN Schottky diodes. Since this light-emitting Schottky diode shares the same active structure and fabrication processes as the AlGaN/GaN high electron mobility transistors, straight-forward and seamless integration of photonic and electronic functional devices has been demonstrated on doping-free III-nitride heterostructures. Using a semitransparent Schottky drain electrode, an AlGaN/GaN high electron mobility light-emitting transistor is demonstrated.

  2. Growth control of the oxidation state in vanadium oxide thin...

    Office of Scientific and Technical Information (OSTI)

    Growth control of the oxidation state in vanadium oxide thin films Prev Next Title: Growth control of the oxidation state in vanadium oxide thin films Authors: Lee, Shinbuhm ...

  3. Design, fabrication, and performance analysis of GaN vertical electron transistors with a buried p/n junction

    SciTech Connect

    Yeluri, Ramya Lu, Jing; Keller, Stacia; Mishra, Umesh K.; Hurni, Christophe A.; Browne, David A.; Speck, James S.; Chowdhury, Srabanti

    2015-05-04

    The Current Aperture Vertical Electron Transistor (CAVET) combines the high conductivity of the two dimensional electron gas channel at the AlGaN/GaN heterojunction with better field distribution offered by a vertical design. In this work, CAVETs with buried, conductive p-GaN layers as the current blocking layer are reported. The p-GaN layer was regrown by metalorganic chemical vapor deposition and the subsequent channel regrowth was done by ammonia molecular beam epitaxy to maintain the p-GaN conductivity. Transistors with high ON current (10.9?kA/cm{sup 2}) and low ON-resistance (0.4 m? cm{sup 2}) are demonstrated. Non-planar selective area regrowth is identified as the limiting factor to transistor breakdown, using planar and non-planar n/p/n structures. Planar n/p/n structures recorded an estimated electric field of 3.1 MV/cm, while non-planar structures showed a much lower breakdown voltage. Lowering the p-GaN regrowth temperature improved breakdown in the non-planar n/p/n structure. Combining high breakdown voltage with high current will enable GaN vertical transistors with high power densities.

  4. Single-charge transport in ambipolar silicon nanoscale field-effect transistors

    SciTech Connect

    Mueller, Filipp; Konstantaras, Georgios; Wiel, Wilfred G. van der; Zwanenburg, Floris A.

    2015-04-27

    We report single-charge transport in ambipolar nanoscale MOSFETs, electrostatically defined in near-intrinsic silicon. We use the ambipolarity to demonstrate the confinement of either a few electrons or a few holes in exactly the same crystalline environment underneath a gate electrode. We find similar electron and hole quantum dot properties while the mobilities differ quantitatively like in microscale devices. The understanding and control of individual electrons and holes are essential for spin-based quantum information processing.

  5. SU-C-204-06: Surface Imaging for the Set-Up of Proton Post-Mastectomy Chestwall Irradiation: Gated Images Vs Non Gated Images

    SciTech Connect

    Batin, E; Depauw, N; MacDonald, S; Lu, H

    2015-06-15

    Purpose: Historically, the set-up for proton post-mastectomy chestwall irradiation at our institution started with positioning the patient using tattoos and lasers. One or more rounds of orthogonal X-rays at gantry 0° and beamline X-ray at treatment gantry angle were then taken to finalize the set-up position. As chestwall targets are shallow and superficial, surface imaging is a promising tool for set-up and needs to be investigated Methods: The orthogonal imaging was entirely replaced by AlignRT™ (ART) images. The beamline X-Ray image is kept as a confirmation, based primarily on three opaque markers placed on skin surface instead of bony anatomy. In the first phase of the process, ART gated images were used to set-up the patient and the same specific point of the breathing curve was used every day. The moves (translations and rotations) computed for each point of the breathing curve during the first five fractions were analyzed for ten patients. During a second phase of the study, ART gated images were replaced by ART non-gated images combined with real-time monitoring. In both cases, ART images were acquired just before treatment to access the patient position compare to the non-gated CT. Results: The average difference between the maximum move and the minimum move depending on the chosen breathing curve point was less than 1.7 mm for all translations and less than 0.7° for all rotations. The average position discrepancy over the course of treatment obtained by ART non gated images combined to real-time monitoring taken before treatment to the planning CT were smaller than the average position discrepancy obtained using ART gated images. The X-Ray validation images show similar results with both ART imaging process. Conclusion: The use of ART non gated images combined with real time imaging allows positioning post-mastectomy chestwall patients in less than 3 mm / 1°.

  6. Sodium channel activation mechanisms. Insights from deuterium oxide substitution

    SciTech Connect

    Alicata, D.A.; Rayner, M.D.; Starkus, J.G. )

    1990-04-01

    Schauf and Bullock, using Myxicola giant axons, demonstrated that solvent substitution with deuterium oxide (D2O) significantly affects both sodium channel activation and inactivation kinetics without corresponding changes in gating current or tail current rates. They concluded that (a) no significant component of gating current derives from the final channel opening step, and (b) channels must deactivate (during tail currents) by a different pathway from that used in channel opening. By contrast, Oxford found in squid axons that when a depolarizing pulse is interrupted by a brief (approximately 100 microseconds) return to holding potential, subsequent reactivation (secondary activation) is very rapid and shows almost monoexponential kinetics. Increasing the interpulse interval resulted in secondary activation rate returning towards control, sigmoid (primary activation) kinetics. He concluded that channels open and close (deactivate) via the same pathway. We have repeated both sets of observations in crayfish axons, confirming the results obtained in both previous studies, despite the apparently contradictory conclusions reached by these authors. On the other hand, we find that secondary activation after a brief interpulse interval (50 microseconds) is insensitive to D2O, although reactivation after longer interpulse intervals (approximately 400 microseconds) returns towards a D2O sensitivity similar to that of primary activation. We conclude that D2O-sensitive primary activation and D2O-insensitive tail current deactivation involve separate pathways. However, D2O-insensitive secondary activation involves reversal of the D2O-insensitive deactivation step. These conclusions are consistent with parallel gate models, provided that one gating particle has a substantially reduced effective valence.

  7. lithium cobalt oxide cathode

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    lithium cobalt oxide cathode - Sandia Energy Energy Search Icon Sandia Home Locations ... SunShot Grand Challenge: Regional Test Centers lithium cobalt oxide cathode Home...

  8. Bedrock refractive-flow cells: A passive treatment analog to funnel-and-gate

    SciTech Connect

    Dick, V.; Edwards, D.

    1997-12-31

    Funnel-and-gate technology provides a mechanism to passively treat groundwater contaminant plumes, but depends on placement of a sufficient barrier ({open_quotes}funnel{close_quotes}) in the plume flow path to channel the plume to a pass-through treatment zone ({open_quotes}gate{close_quotes}). Conventional barrier technologies limit funnel-and-gate deployment to unconsolidated overburden applications. A method has been developed which allows similar passive treatment to be applied to bedrock plumes. Rather than use barriers as the funnel, the method uses engineered bedrock zones, installed via precision blasting or other means, to refract groundwater flow along a preferred path to treatment (gate). The method requires orienting the refractive cell based on the Tangent Law and extending refractive cell limbs down gradient of the gate to disperse head and control flow. A typical Refractive-Flow cell may be{open_quotes}Y{close_quotes}shaped, with each limb 3-10 ft [1-3 m] wide and several tens to a few hundred feet [10 - 100 m] in length. Treatment takes place at the center of the X. MODFLOW modeling has been used to successfully simulate desired flow. Engineered blasting has been used at full scale application to create bedrock rubble zones for active collection/flow control for several years. The method provides a previously unavailable method to passively treat contaminated groundwater in bedrock at low cost.

  9. Water gate array for current flow or tidal movement pneumatic harnessing system

    DOEpatents

    Gorlov, Alexander M.

    1991-01-01

    The invention, which provides a system for harnessing power from current flow or tidal movement in a body of water, comprises first and second hydro-pneumatic chambers each having ingress and egress below the water surface near the river or ocean floor and water gates operative to open or seal the ports to the passage of water. In an exemplary embodiment, the gates are sychronized by shafts so that the ingress ports of each chamber are connected to the egress ports of each other chamber. Thus, one set of gates is closed, while the other is open, thereby allowing water to flow into one chamber and build air pressure therein and allowing water to flow out of the other chamber and create a partial vacuum therein. A pipe connects the chambers, and an air turbine harnesses the air movement within the pipe. When water levels are equilibrated, the open set of gates is closed by a counterweight, and the other set is allowed to open by natural force of the water differential. The water gates may be comprised of a plurality of louvers which are ganged for simultaneous opening and closing. The system is designed to operate with air turbines or other pneumatic devices. Its design minimizes construction cost and environmental impact, yet provides a clean renewable energy source.

  10. UC Davis Fuel Cell, Hydrogen, and Hybrid Vehicle (FCH2V) GATE Center of Excellence

    SciTech Connect

    Erickson, Paul

    2012-05-31

    This is the final report of the UC Davis Fuel Cell, Hydrogen, and Hybrid Vehicle (FCH2V) GATE Center of Excellence which spanned from 2005-2012. The U.S. Department of Energy (DOE) established the Graduate Automotive Technology Education (GATE) Program, to provide a new generation of engineers and scientists with knowledge and skills to create advanced automotive technologies. The UC Davis Fuel Cell, Hydrogen, and Hybrid Vehicle (FCH2V) GATE Center of Excellence established in 2005 is focused on research, education, industrial collaboration and outreach within automotive technology. UC Davis has had two independent GATE centers with separate well-defined objectives and research programs from 1998. The Fuel Cell Center, administered by ITS-Davis, has focused on fuel cell technology. The Hybrid-Electric Vehicle Design Center (HEV Center), administered by the Department of Mechanical and Aeronautical Engineering, has focused on the development of plug-in hybrid technology using internal combustion engines. The merger of these two centers in 2005 has broadened the scope of research and lead to higher visibility of the activity. UC Davis's existing GATE centers have become the campus's research focal points on fuel cells and hybrid-electric vehicles, and the home for graduate students who are studying advanced automotive technologies. The centers have been highly successful in attracting, training, and placing top-notch students into fuel cell and hybrid programs in both industry and government.

  11. Influence of electron–phonon interactions in single dopant nanowire transistors

    SciTech Connect

    Carrillo-Nuñez, H. Bescond, M. Cavassilas, N.; Dib, E.; Lannoo, M.

    2014-10-28

    Single dopant nanowire transistors can be viewed as the ultimate miniaturization of nano electronic devices. In this work, we theoretically investigate the influence of the electron-phonon coupling on their transport properties using a non-equilibrium Green's function approach in the self-consistent Born approximation. For an impurity located at the center of the wire we find that, at room temperature, acoustic phonons broaden the impurity level so that the bistability predicted in the ballistic regime is suppressed. Optical phonons are found to have a beneficial impact on carrier transport via a phonon-assisted tunneling effect. We discuss the position and temperature dependence of these effects, showing that such systems might be very promising for engineering of ultimate devices.

  12. Method for extracting relevant electrical parameters from graphene field-effect transistors using a physical model

    SciTech Connect

    Boscá, A.; Pedrós, J.; Martínez, J.; Calle, F.

    2015-01-28

    Due to its intrinsic high mobility, graphene has proved to be a suitable material for high-speed electronics, where graphene field-effect transistor (GFET) has shown excellent properties. In this work, we present a method for extracting relevant electrical parameters from GFET devices using a simple electrical characterization and a model fitting. With experimental data from the device output characteristics, the method allows to calculate parameters such as the mobility, the contact resistance, and the fixed charge. Differentiated electron and hole mobilities and direct connection with intrinsic material properties are some of the key aspects of this method. Moreover, the method output values can be correlated with several issues during key fabrication steps such as the graphene growth and transfer, the lithographic steps, or the metalization processes, providing a flexible tool for quality control in GFET fabrication, as well as a valuable feedback for improving the material-growth process.

  13. Influence of curvature on the device physics of thin film transistors on flexible substrates

    SciTech Connect

    Amalraj, Rex; Sambandan, Sanjiv

    2014-10-28

    Thin film transistors (TFTs) on elastomers promise flexible electronics with stretching and bending. Recently, there have been several experimental studies reporting the behavior of TFTs under bending and buckling. In the presence of stress, the insulator capacitance is influenced due to two reasons. The first is the variation in insulator thickness depending on the Poisson ratio and strain. The second is the geometric influence of the curvature of the insulator-semiconductor interface during bending or buckling. This paper models the role of curvature on TFT performance and brings to light an elegant result wherein the TFT characteristics is dependent on the area under the capacitance-distance curve. The paper compares models with simulations and explains several experimental findings reported in literature.

  14. On the role of disorder on graphene and graphene nanoribbon-based vertical tunneling transistors

    SciTech Connect

    Ghobadi, Nayereh; Pourfath, Mahdi E-mail: pourfath@iue.tuwien.ac.at

    2014-11-14

    In this work, the characteristics of vertical tunneling field-effect transistors based on graphene (VTGFET) and graphene nanoribbon heterostructure (VTGNRFET) in the presence of disorder are theoretically investigated. An statistical analysis based on an atomistic tight-binding model for the electronic bandstructure along with the non-equilibrium Green's function formalism are employed. We study the dependence of the averaged density of states, transmission probability, on- and off-state conductances, on/off conductance ratio, and transfer characteristics on the substrate induced potential fluctuations and vacancies. In addition, the variabilities of the device characteristics due to the presence of disorder are evaluated. It can be inferred from the results that while introducing vacancies cause a relatively modest suppression of the transmission probability, potential fluctuations lead to the significant increase of transmission probability and conductance of the device. Moreover, the results show that the transport properties of VTGFET are more robust against disorder compared to VTGNRFET.

  15. Fully transparent organic transistors with junction-free metallic network electrodes

    SciTech Connect

    Pei, Ke; Wang, Zongrong; Ren, Xiaochen; Zhang, Zhichao; Peng, Boyu; Chan, Paddy K. L.

    2015-07-20

    We utilize highly transparent, junction-free metal network electrodes to fabricate fully transparent organic field effect transistors (OFETs). The patterned transparent Ag networks are developed by polymer crack template with adjustable line width and density. Sheet resistance of the network is 6.8 Ω/sq and optical transparency in the whole visible range is higher than 80%. The bottom contact OFETs with DNTT active layer and parylene-C dielectric insulator show a maximum field-effect mobility of 0.13 cm{sup 2}/V s (average mobility is 0.12 cm{sup 2}/V s) and on/off ratio is higher than 10{sup 7}. The current OFETs show great potential for applications in the next generation of transparent and flexible electronics.

  16. Ultralow-light-level all-optical transistor in rubidium vapor

    SciTech Connect

    Jing, Jietai Zhou, Zhifan; Liu, Cunjin; Qin, Zhongzhong; Fang, Yami; Zhou, Jun; Zhang, Weiping

    2014-04-14

    An all-optical transistor (AOT) is a device in which one light beam can efficiently manipulate another. It is the foundational component of an all-optical communication network. An AOT that can operate at ultralow light levels is especially attractive for its potential application in the quantum information field. Here, we demonstrate an AOT driven by a weak light beam with an energy density of 2.5 × 10{sup −5} photons/(λ{sup 2}/2π) (corresponding to 6  yJ/(λ{sup 2}/2π) and about 800 total photons) using the double-Λ four-wave mixing process in hot rubidium vapor. This makes it a promising candidate for ultralow-light-level optical communication and quantum information science.

  17. High-performance InGaP/GaAs pnp {delta}-doped heterojunction bipolar transistor

    SciTech Connect

    Tsai, J.-H. Chiu, S.-Y.; Lour, W.-S.; Guo, D.-F.

    2009-07-15

    In this article, a novel InGaP/GaAs pnp {delta}-doped heterojunction bipolar transistor is first demonstrated. Though the valence band discontinuity at InGaP/GaAs heterojunction is relatively large, the addition of a {delta}-doped sheet between two spacer layers at the emitter-base (E-B) junction effectively eliminates the potential spike and increases the confined barrier for electrons, simultaneously. Experimentally, a high current gain of 25 and a relatively low E-B offset voltage of 60 mV are achieved. The offset voltage is much smaller than the conventional InGaP/GaAs pnp HBT. The proposed device could be used for linear amplifiers and low-power complementary integrated circuit applications.

  18. Suppression of low-frequency charge noise in gates-defined GaAs quantum dots

    SciTech Connect

    You, Jie; Li, Hai-Ou E-mail: gpguo@ustc.edu.cn; Wang, Ke; Cao, Gang; Song, Xiang-Xiang; Xiao, Ming; Guo, Guo-Ping E-mail: gpguo@ustc.edu.cn

    2015-12-07

    To reduce the charge noise of a modulation-doped GaAs/AlGaAs quantum dot, we have fabricated shallow-etched GaAs/AlGaAs quantum dots using the wet-etching method to study the effects of two-dimensional electron gas (2DEG) underneath the metallic gates. The low-frequency 1/f noise in the Coulomb blockade region of the shallow-etched quantum dot is compared with a non-etched quantum dot on the same wafer. The average values of the gate noise are approximately 0.5 μeV in the shallow-etched quantum dot and 3 μeV in the regular quantum dot. Our results show the quantum dot low-frequency charge noise can be suppressed by the removal of the 2DEG underneath the metallic gates, which provides an architecture for noise reduction.

  19. Optical imaging through turbid media with a degenerate four-wave mixing correlation time gate

    DOEpatents

    Sappey, Andrew D.

    1998-04-14

    Optical imaging through turbid media is demonstrated using a degenerate four-wave mixing correlation time gate. An apparatus and method for detecting ballistic and/or snake light while rejecting unwanted diffusive light for imaging structures within highly scattering media are described. Degenerate four-wave mixing (DFWM) of a doubled YAG laser in rhodamine 590 is used to provide an ultrafast correlation time gate to discriminate against light that has undergone multiple scattering and therefore has lost memory of the structures within the scattering medium. Images have been obtained of a test cross-hair pattern through highly turbid suspensions of whole milk in water that are opaque to the naked eye, which demonstrates the utility of DFWM for imaging through turbid media. Use of DFWM as an ultrafast time gate for the detection of ballistic and/or snake light in optical mammography is discussed.

  20. Liquid-based gating mechanism with tunable multiphase selectivity and antifouling behaviour

    SciTech Connect

    Hou, X; Hu, YH; Grinthal, A; Khan, M; Aizenberg, J

    2015-03-04

    Living organisms make extensive use of micro- and nanometre-sized pores as gatekeepers for controlling the movement of fluids, vapours and solids between complex environments. The ability of such pores to coordinate multiphase transport, in a highly selective and subtly triggered fashion and without clogging, has inspired interest in synthetic gated pores for applications ranging from fluid processing to 3D printing and lab-on-chip systems(1-10). But although specific gating and transport behaviours have been realized by precisely tailoring pore surface chemistries and pore geometries(6,11-17), a single system capable of controlling complex, selective multiphase transport has remained a distant prospect, and fouling is nearly inevitable(11,12). Here we introduce a gating mechanism that uses a capillary-stabilized liquid as a reversible, reconfigurable gate that fills and seals pores in the closed state, and creates a non-fouling, liquid-lined pore in the open state. Theoretical modelling and experiments demonstrate that for each transport substance, the gating threshold-the pressure needed to open the pores-can be rationally tuned over a wide pressure range. This enables us to realize in one system differential response profiles for a variety of liquids and gases, even letting liquids flow through the pore while preventing gas from escaping. These capabilities allow us to dynamically modulate gas-liquid sorting in a microfluidic flow and to separate a three-phase air-water-oil mixture, with the liquid lining ensuring sustained antifouling behaviour. Because the liquid gating strategy enables efficient long-term operation and can be applied to a variety of pore structures and membrane materials, and to micro- as well as macroscale fluid systems, we expect it to prove useful in a wide range of applications.

  1. Liquid-based gating mechanism with tunable multiphase selectivity and antifouling behaviour

    DOE PAGES [OSTI]

    Hou, Xu; Hu, Yuhang; Grinthal, Alison; Khan, Mughees; Aizenberg, Joanna

    2015-03-04

    Living organisms make extensive use of micro- and nanometre-sized pores as gatekeepers for controlling the movement of fluids, vapours and solids between complex environments. In addition, the ability of such pores to coordinate multiphase transport, in a highly selective and subtly triggered fashion and without clogging, has inspired interest in synthetic gated pores for applications ranging from fluid processing to 3D printing and lab-on-chip systems1-10.But although specific gating and transport behaviours have been realized by precisely tailoring pore surface chemistries and pore geometries6,11–17, a single system capable of controlling complex, selective multiphase transport has remained a distant prospect, and foulingmore » is nearly inevitable.Here we introduce a gating mechanism that uses a capillary-stabilized liquid as a reversible, reconfigurable gate that fills and seals pores in the closed state, and creates a non-fouling, liquid-lined pore in the open state.Theoretical modelling and experiments demonstrate that for each transport substance, the gating threshold—the pressure needed to open the pores—can be rationally tuned over a wide pressure range. This enables us to realize in one system differential response profiles for a variety of liquids and gases, even letting liquids flow through the pore while preventing gas from escaping.These capabilities allow us to dynamically modulate gas–liquid sorting in a microfluidic flow and to separate a three-phase air water–oil mixture, with the liquid lining ensuring sustained antifouling behaviour. Because the liquid gating strategy enables efficient long-term operation and can be applied to a variety of pore structures and membrane materials, and to micro- as well as macroscale fluid systems, we expect it to prove useful in a wide range of applications.« less

  2. Liquid-based gating mechanism with tunable multiphase selectivity and antifouling behaviour

    SciTech Connect

    Hou, Xu; Hu, Yuhang; Grinthal, Alison; Khan, Mughees; Aizenberg, Joanna

    2015-03-04

    Living organisms make extensive use of micro- and nanometre-sized pores as gatekeepers for controlling the movement of fluids, vapours and solids between complex environments. In addition, the ability of such pores to coordinate multiphase transport, in a highly selective and subtly triggered fashion and without clogging, has inspired interest in synthetic gated pores for applications ranging from fluid processing to 3D printing and lab-on-chip systems1-10.But although specific gating and transport behaviours have been realized by precisely tailoring pore surface chemistries and pore geometries6,11–17, a single system capable of controlling complex, selective multiphase transport has remained a distant prospect, and fouling is nearly inevitable.Here we introduce a gating mechanism that uses a capillary-stabilized liquid as a reversible, reconfigurable gate that fills and seals pores in the closed state, and creates a non-fouling, liquid-lined pore in the open state.Theoretical modelling and experiments demonstrate that for each transport substance, the gating threshold—the pressure needed to open the pores—can be rationally tuned over a wide pressure range. This enables us to realize in one system differential response profiles for a variety of liquids and gases, even letting liquids flow through the pore while preventing gas from escaping.These capabilities allow us to dynamically modulate gas–liquid sorting in a microfluidic flow and to separate a three-phase air water–oil mixture, with the liquid lining ensuring sustained antifouling behaviour. Because the liquid gating strategy enables efficient long-term operation and can be applied to a variety of pore structures and membrane materials, and to micro- as well as macroscale fluid systems, we expect it to prove useful in a wide range of applications.

  3. SU-E-J-159: Analysis of Total Imaging Uncertainty in Respiratory-Gated Radiotherapy

    SciTech Connect

    Suzuki, J; Okuda, T; Sakaino, S; Yokota, N

    2015-06-15

    Purpose: In respiratory-gated radiotherapy, the gating phase during treatment delivery needs to coincide with the corresponding phase determined during the treatment plan. However, because radiotherapy is performed based on the image obtained for the treatment plan, the time delay, motion artifact, volume effect, and resolution in the images are uncertain. Thus, imaging uncertainty is the most basic factor that affects the localization accuracy. Therefore, these uncertainties should be analyzed. This study aims to analyze the total imaging uncertainty in respiratory-gated radiotherapy. Methods: Two factors of imaging uncertainties related to respiratory-gated radiotherapy were analyzed. First, CT image was used to determine the target volume and 4D treatment planning for the Varian Realtime Position Management (RPM) system. Second, an X-ray image was acquired for image-guided radiotherapy (IGRT) for the BrainLAB ExacTrac system. These factors were measured using a respiratory gating phantom. The conditions applied during phantom operation were as follows: respiratory wave form, sine curve; respiratory cycle, 4 s; phantom target motion amplitude, 10, 20, and 29 mm (which is maximum phantom longitudinal motion). The target and cylindrical marker implanted in the phantom coverage of the CT images was measured and compared with the theoretically calculated coverage from the phantom motion. The theoretical position of the cylindrical marker implanted in the phantom was compared with that acquired from the X-ray image. The total imaging uncertainty was analyzed from these two factors. Results: In the CT image, the uncertainty between the target and cylindrical marker’s actual coverage and the coverage of CT images was 1.19 mm and 2.50mm, respectively. In the Xray image, the uncertainty was 0.39 mm. The total imaging uncertainty from the two factors was 1.62mm. Conclusion: The total imaging uncertainty in respiratory-gated radiotherapy was clinically acceptable. However

  4. Liquid-based gating mechanism with tunable multiphase selectivity and antifouling behaviour

    SciTech Connect

    Hou, Xu; Hu, Yuhang; Grinthal, Alison; Khan, Mughees; Aizenberg, Joanna

    2015-03-04

    Living organisms make extensive use of micro- and nanometre-sized pores as gatekeepers for controlling the movement of fluids, vapours and solids between complex environments. In addition, the ability of such pores to coordinate multiphase transport, in a highly selective and subtly triggered fashion and without clogging, has inspired interest in synthetic gated pores for applications ranging from fluid processing to 3D printing and lab-on-chip systems1-10.But although specific gating and transport behaviours have been realized by precisely tailoring pore surface chemistries and pore geometries6,1117, a single system capable of controlling complex, selective multiphase transport has remained a distant prospect, and fouling is nearly inevitable.Here we introduce a gating mechanism that uses a capillary-stabilized liquid as a reversible, reconfigurable gate that fills and seals pores in the closed state, and creates a non-fouling, liquid-lined pore in the open state.Theoretical modelling and experiments demonstrate that for each transport substance, the gating thresholdthe pressure needed to open the porescan be rationally tuned over a wide pressure range. This enables us to realize in one system differential response profiles for a variety of liquids and gases, even letting liquids flow through the pore while preventing gas from escaping.These capabilities allow us to dynamically modulate gasliquid sorting in a microfluidic flow and to separate a three-phase air wateroil mixture, with the liquid lining ensuring sustained antifouling behaviour. Because the liquid gating strategy enables efficient long-term operation and can be applied to a variety of pore structures and membrane materials, and to micro- as well as macroscale fluid systems, we expect it to prove useful in a wide range of applications.

  5. Single-Phase Self-Oscillating Jets for Enhanced Heat Transfer: Preprint

    SciTech Connect

    Narumanchi, S.; Kelly, K.; Mihalic, M.; Gopalan, S.; Hester, R.; Vlahinos, A.

    2008-06-01

    Self-oscillating jets have potential to cool insulated gate bipolar transistors in vehicle power electronics modules.

  6. ARPA-E Announces 2012 Energy Innovation Summit Featuring Bill Gates, Fred

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Smith and Lee Scott | Department of Energy 2012 Energy Innovation Summit Featuring Bill Gates, Fred Smith and Lee Scott ARPA-E Announces 2012 Energy Innovation Summit Featuring Bill Gates, Fred Smith and Lee Scott September 9, 2011 - 9:25am Addthis New York, NY - The U.S. Department of Energy's Advanced Research Projects Agency - Energy (ARPA-E) Director, Arun Majumdar, announced yesterday that the Agency will hold its third annual ARPA-E Energy Innovation Summit from February 27 - 29, 2012

  7. DOE Tour of Zero: Row Homes at RidgeGate by Thrive Home Builders |

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Department of Energy Row Homes at RidgeGate by Thrive Home Builders DOE Tour of Zero: Row Homes at RidgeGate by Thrive Home Builders 1 of 14 Thrive Home Builders constructed this multifamily building in Denver, Colorado, to the performance criteria of the DOE Energy Zero Energy Ready Home (ZERH) program. 2 of 14 Each 1,815-square-foot unit is estimated to have average utility costs of less than $45 a month from the combined energy-efficiency measures and a 2.6-kW solar electric generation

  8. A spin-wave logic gate based on a width-modulated dynamic magnonic crystal

    SciTech Connect

    Nikitin, Andrey A.; Ustinov, Alexey B.; Semenov, Alexander A.; Kalinikos, Boris A.; Chumak, Andrii V.; Serga, Alexander A.; Vasyuchka, Vitaliy I.; Hillebrands, Burkard; Lhderanta, Erkki

    2015-03-09

    An electric current controlled spin-wave logic gate based on a width-modulated dynamic magnonic crystal is realized. The device utilizes a spin-wave waveguide fabricated from a single-crystal Yttrium Iron Garnet film and two conducting wires attached to the film surface. Application of electric currents to the wires provides a means for dynamic control of the effective geometry of waveguide and results in a suppression of the magnonic band gap. The performance of the magnonic crystal as an AND logic gate is demonstrated.

  9. DOE Tour of Zero: Row Homes at RidgeGate by Thrive Home Builders |

    Office of Energy Efficiency and Renewable Energy (EERE) (indexed site)

    Department of Energy Row Homes at RidgeGate by Thrive Home Builders DOE Tour of Zero: Row Homes at RidgeGate by Thrive Home Builders Addthis 1 of 14 Thrive Home Builders constructed this multifamily building in Denver, Colorado, to the performance criteria of the DOE Energy Zero Energy Ready Home (ZERH) program. 2 of 14 Each 1,815-square-foot unit is estimated to have average utility costs of less than $45 a month from the combined energy-efficiency measures and a 2.6-kW solar electric

  10. Photo-oxidation catalysts

    DOEpatents

    Pitts, J. Roland; Liu, Ping; Smith, R. Davis

    2009-07-14

    Photo-oxidation catalysts and methods for cleaning a metal-based catalyst are disclosed. An exemplary catalyst system implementing a photo-oxidation catalyst may comprise a metal-based catalyst, and a photo-oxidation catalyst for cleaning the metal-based catalyst in the presence of light. The exposure to light enables the photo-oxidation catalyst to substantially oxidize absorbed contaminants and reduce accumulation of the contaminants on the metal-based catalyst. Applications are also disclosed.

  11. Single shot spin readout with a cryogenic high-electron-mobility transistor amplifier at sub-Kelvin temperatures

    DOE PAGES [OSTI]

    Tracy, Lisa A.; Luhman, Dwight R.; Carr, Stephen M.; Bishop, Nathaniel C.; Ten Eyck, Gregory A.; Pluym, Tammy; Wendt, Joel R.; Lilly, Michael P.; Carroll, Malcolm S.

    2016-02-08

    We use a cryogenic high-electron-mobility transistor circuit to amplify the current from a single electron transistor, allowing for demonstration of single shot readout of an electron spin on a single P donor in Si with 100 kHz bandwidth and a signal to noise ratio of ~9. In order to reduce the impact of cable capacitance, the amplifier is located adjacent to the Si sample, at the mixing chamber stage of a dilution refrigerator. For a current gain of ~2.7 x 103 the power dissipation of the amplifier is 13 μW, the bandwidth is ~1.3 MHz, and for frequencies above 300more » kHz the current noise referred to input is ≤ 70 fA/√Hz. Furthermore, with this amplification scheme, we are able to observe coherent oscillations of a P donor electron spin in isotopically enriched 28Si with 96% visibility.« less

  12. SU-E-J-126: Respiratory Gating Quality Assurance: A Simple Method to Achieve Millisecond Temporal Resolution

    SciTech Connect

    McCabe, B; Wiersma, R

    2014-06-01

    Purpose: Low temporal latency between a gating on/off signal and a linac beam on/off during respiratory gating is critical for patient safety. Although, a measurement of temporal lag is recommended by AAPM Task Group 142 for commissioning and annual quality assurance, there currently exists no published method. Here we describe a simple, inexpensive, and reliable method to precisely measure gating lag at millisecond resolutions. Methods: A Varian Real-time Position Management™ (RPM) gating simulator with rotating disk was modified with a resistive flex sensor (Spectra Symbol) attached to the gating box platform. A photon diode was placed at machine isocenter. Output signals of the flex sensor and diode were monitored with a multichannel oscilloscope (Tektronix™ DPO3014). Qualitative inspection of the gating window/beam on synchronicity were made by setting the linac to beam on/off at end-expiration, and the oscilloscope's temporal window to 100 ms to visually examine if the on/off timing was within the recommended 100-ms tolerance. Quantitative measurements were made by saving the signal traces and analyzing in MatLab™. The on and off of the beam signal were located and compared to the expected gating window (e.g. 40% to 60%). Four gating cycles were measured and compared. Results: On a Varian TrueBeam™ STx linac with RPM gating software, the average difference in synchronicity at beam on and off for four cycles was 14 ms (3 to 30 ms) and 11 ms (2 to 32 ms), respectively. For a Varian Clinac™ 21EX the average difference at beam on and off was 127 ms (122 to 133 ms) and 46 ms (42 to 49 ms), respectively. The uncertainty in the synchrony difference was estimated at ±6 ms. Conclusion: This new gating QA method is easy to implement and allows for fast qualitative inspection and quantitative measurements for commissioning and TG-142 annual QA measurements.

  13. Studies on supported metal oxide-oxide support interactions ...

    Office of Scientific and Technical Information (OSTI)

    Subject: 36 MATERIALS SCIENCE; 66 PHYSICS; CERIUM OXIDES; SURFACE PROPERTIES; ALUMINIUM OXIDES; COPPER OXIDES; BINDING ENERGY; X-RAY DIFFRACTION; INFRARED SPECTRA; VALENCE; ZINC ...

  14. Phase Discrimination through Oxidant Selection for Iron Oxide...

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    Phase Discrimination through Oxidant Selection for Iron Oxide Ultrathin Films Home > Research > ANSER Research Highlights > Phase Discrimination through Oxidant Selection for Iron...

  15. Performance of a 512 x 512 Gated CMOS Imager with a 250 ps Exposure Time

    SciTech Connect

    Teruya, A T; Moody, J D; Hsing, W W; Brown, C G; Griffin, M; Mead, A S

    2012-10-01

    We describe the performance of a 512x512 gated CMOS read out integrated circuit (ROIC) with a 250 ps exposure time. A low-skew, H-tree trigger distribution system is used to locally generate individual pixel gates in each 8x8 neighborhood of the ROIC. The temporal width of the gate is voltage controlled and user selectable via a precision potentiometer. The gating implementation was first validated in optical tests of a 64x64 pixel prototype ROIC developed as a proof-of-concept during the early phases of the development program. The layout of the H-Tree addresses each quadrant of the ROIC independently and admits operation of the ROIC in two modes. If common mode triggering is used, the camera provides a single 512x512 image. If independent triggers are used, the camera can provide up to four 256x256 images with a frame separation set by the trigger intervals. The ROIC design includes small (sub-pixel) optical photodiode structures to allow test and characterization of the ROIC using optical sources prior to bump bonding. Reported test results were obtained using short pulse, second harmonic Ti:Sapphire laser systems operating at ?~ 400 nm at sub-ps pulse widths.

  16. Multiqubit gates protected by adiabaticity and dynamical decoupling applicable to donor qubits in silicon

    SciTech Connect

    Witzel, Wayne M.; Montaño, Inès; Muller, Richard P.; Carroll, Malcolm S.

    2015-08-19

    In this study, we present a strategy for producing multiqubit gates that promise high fidelity with minimal tuning requirements. Our strategy combines gap protection from the adiabatic theorem with dynamical decoupling in a complementary manner. Energy-level transition errors are protected by adiabaticity and remaining phase errors are mitigated via dynamical decoupling. This is a powerful way to divide and conquer the various error channels. In order to accomplish this without violating a no-go theorem regarding black-box dynamically corrected gates [Phys. Rev. A 80, 032314 (2009)], we require a robust operating point (sweet spot) in control space where the qubits interact with little sensitivity to noise. There are also energy gap requirements for effective adiabaticity. We apply our strategy to an architecture in Si with P donors where we assume we can shuttle electrons between different donors. Electron spins act as mobile ancillary qubits and P nuclear spins act as long-lived data qubits. This system can have a very robust operating point where the electron spin is bound to a donor in the quadratic Stark shift regime. High fidelity single qubit gates may be performed using well-established global magnetic resonance pulse sequences. Single electron-spin preparation and measurement has also been demonstrated. Putting this all together, we present a robust universal gate set for quantum computation.

  17. Multiqubit gates protected by adiabaticity and dynamical decoupling applicable to donor qubits in silicon

    DOE PAGES [OSTI]

    Witzel, Wayne M.; Montaño, Inès; Muller, Richard P.; Carroll, Malcolm S.

    2015-08-19

    In this study, we present a strategy for producing multiqubit gates that promise high fidelity with minimal tuning requirements. Our strategy combines gap protection from the adiabatic theorem with dynamical decoupling in a complementary manner. Energy-level transition errors are protected by adiabaticity and remaining phase errors are mitigated via dynamical decoupling. This is a powerful way to divide and conquer the various error channels. In order to accomplish this without violating a no-go theorem regarding black-box dynamically corrected gates [Phys. Rev. A 80, 032314 (2009)], we require a robust operating point (sweet spot) in control space where the qubits interactmore » with little sensitivity to noise. There are also energy gap requirements for effective adiabaticity. We apply our strategy to an architecture in Si with P donors where we assume we can shuttle electrons between different donors. Electron spins act as mobile ancillary qubits and P nuclear spins act as long-lived data qubits. This system can have a very robust operating point where the electron spin is bound to a donor in the quadratic Stark shift regime. High fidelity single qubit gates may be performed using well-established global magnetic resonance pulse sequences. Single electron-spin preparation and measurement has also been demonstrated. Putting this all together, we present a robust universal gate set for quantum computation.« less

  18. Method and system for measuring gate valve clearances and seating force

    DOEpatents

    Casada, D.A.; Haynes, H.D.; Moyers, J.C.; Stewart, B.K.

    1996-01-30

    Valve clearances and seating force, as well as other valve operational parameters, are determined by measuring valve stem rotation during opening and closing operations of a translatable gate valve. The magnitude of the stem rotation, and the relative difference between the stem rotation on opening and closing provides valuable data on the valve internals in a non-intrusive manner. 8 figs.

  19. Multi-qubit gates protected by adiabaticity and dynamical decoupling applicable to donor qubits in silicon

    DOE PAGES [OSTI]

    Witzel, Wayne; Montano, Ines; Muller, Richard P.; Carroll, Malcolm S.

    2015-08-19

    In this paper, we present a strategy for producing multiqubit gates that promise high fidelity with minimal tuning requirements. Our strategy combines gap protection from the adiabatic theorem with dynamical decoupling in a complementary manner. Energy-level transition errors are protected by adiabaticity and remaining phase errors are mitigated via dynamical decoupling. This is a powerful way to divide and conquer the various error channels. In order to accomplish this without violating a no-go theorem regarding black-box dynamically corrected gates [Phys. Rev. A 80, 032314 (2009)], we require a robust operating point (sweet spot) in control space where the qubits interactmore » with little sensitivity to noise. There are also energy gap requirements for effective adiabaticity. We apply our strategy to an architecture in Si with P donors where we assume we can shuttle electrons between different donors. Electron spins act as mobile ancillary qubits and P nuclear spins act as long-lived data qubits. Furthermore, this system can have a very robust operating point where the electron spin is bound to a donor in the quadratic Stark shift regime. High fidelity single qubit gates may be performed using well-established global magnetic resonance pulse sequences. Single electron-spin preparation and measurement has also been demonstrated. Thus, putting this all together, we present a robust universal gate set for quantum computation.« less

  20. Multi-qubit gates protected by adiabaticity and dynamical decoupling applicable to donor qubits in silicon

    SciTech Connect

    Witzel, Wayne; Montano, Ines; Muller, Richard P.; Carroll, Malcolm S.

    2015-08-19

    In this paper, we present a strategy for producing multiqubit gates that promise high fidelity with minimal tuning requirements. Our strategy combines gap protection from the adiabatic theorem with dynamical decoupling in a complementary manner. Energy-level transition errors are protected by adiabaticity and remaining phase errors are mitigated via dynamical decoupling. This is a powerful way to divide and conquer the various error channels. In order to accomplish this without violating a no-go theorem regarding black-box dynamically corrected gates [Phys. Rev. A 80, 032314 (2009)], we require a robust operating point (sweet spot) in control space where the qubits interact with little sensitivity to noise. There are also energy gap requirements for effective adiabaticity. We apply our strategy to an architecture in Si with P donors where we assume we can shuttle electrons between different donors. Electron spins act as mobile ancillary qubits and P nuclear spins act as long-lived data qubits. Furthermore, this system can have a very robust operating point where the electron spin is bound to a donor in the quadratic Stark shift regime. High fidelity single qubit gates may be performed using well-established global magnetic resonance pulse sequences. Single electron-spin preparation and measurement has also been demonstrated. Thus, putting this all together, we present a robust universal gate set for quantum computation.

  1. Design and performance of a respiratory amplitude gating device for PET/CT imaging

    SciTech Connect

    Chang Guoping; Chang Tingting; Clark, John W. Jr.; Mawlawi, Osama R.

    2010-04-15

    Purpose: Recently, the authors proposed a free-breathing amplitude gating (FBAG) technique for PET/CT scanners. The implementation of this technique required specialized hardware and software components that were specifically designed to interface with commercial respiratory gating devices to generate the necessary triggers required for the FBAG technique. The objective of this technical note is to introduce an in-house device that integrates all the necessary hardware and software components as well as tracks the patient's respiratory motion to realize amplitude gating on PET/CT scanners. Methods: The in-house device is composed of a piezoelectric transducer coupled to a data-acquisition system in order to monitor the respiratory waveform. A LABVIEW program was designed to control the data-acquisition device and inject triggers into the PET list stream whenever the detected respiratory amplitude crossed a predetermined amplitude range. A timer was also programmed to stop the scan when the accumulated time within the selected amplitude range reached a user-set interval. This device was tested using a volunteer and a phantom study. Results: The results from the volunteer and phantom studies showed that the in-house device can detect similar respiratory signals as commercially available respiratory gating systems and is able to generate the necessary triggers to suppress respiratory motion artifacts. Conclusions: The proposed in-house device can be used to implement the FBAG technique in current PET/CT scanners.

  2. Method and system for measuring gate valve clearances and seating force

    DOEpatents

    Casada, Donald A.; Haynes, Howard D.; Moyers, John C.; Stewart, Brian K.

    1996-01-01

    Valve clearances and seating force, as well as other valve operational parameters, are determined by measuring valve stem rotation during opening and closing operations of a translatable gate valve. The magnitude of the stem rotation, and the relative difference between the stem rotation on opening and closing provides valuable data on the valve internals in a non-intrusive manner.

  3. Mixed Acid Oxidation

    SciTech Connect

    Pierce, R.A.

    1999-10-26

    Several non-thermal processes have been developed to destroy organic waste compounds using chemicals with high oxidation potentials. These efforts have focused on developing technologies that work at low temperatures, relative to incineration, to overcome many of the regulatory issues associated with obtaining permits for waste incinerators. One such technique with great flexibility is mixed acid oxidation. Mixed acid oxidation, developed at the Savannah River Site, uses a mixture of an oxidant (nitric acid) and a carrier acid (phosphoric acid). The carrier acid acts as a non-volatile holding medium for the somewhat volatile oxidant. The combination of acids allows appreciable amounts of the concentrated oxidant to remain in the carrier acid well above the oxidant''s normal boiling point.

  4. Growth control of the oxidation state in vanadium oxide thin...

    Office of Scientific and Technical Information (OSTI)

    Growth control of the oxidation state in vanadium oxide thin films Citation Details In-Document Search Title: Growth control of the oxidation state in vanadium oxide thin films ...

  5. Hybrid quantum dot-tin disulfide field-effect transistors with improved photocurrent and spectral responsivity

    DOE PAGES [OSTI]

    Cotlet, Mircea; Huang, Yuan Zang; Chen, Jia -Shiang; Huidong Zang; Sutter, Eli A.; Sutter, Peter W.; Nam, Chang -Yong

    2016-03-24

    We report an improved photosensitivity in few-layer tin disulfide (SnS2) field-effect transistors(FETs) following doping with CdSe/ZnS core/shell quantum dots(QDs). The hybrid QD-SnS2 FET devices achieve more than 500% increase in the photocurrent response compared with the starting SnS2-only FET device and a spectral responsivity reaching over 650 A/W at 400 nm wavelength. The negligible electrical conductance in a control QD-only FET device suggests that the energy transfer between QDs and SnS2 is the main mechanism responsible for the sensitization effect, which is consistent with the strong spectral overlap between QDphotoluminescence and SnS2 optical absorption as well as the large nominalmore » donor-acceptor interspacing between QD core and SnS2. Furthermore, we also find enhanced charge carrier mobility in hybrid QD-SnS2 FETs which we attribute to a reduced contact Schottky barrier width due to an elevated background charge carrier density.« less

  6. Method for manufacturing compound semiconductor field-effect transistors with improved DC and high frequency performance

    DOEpatents

    Zolper, John C.; Sherwin, Marc E.; Baca, Albert G.

    2000-01-01

    A method for making compound semiconductor devices including the use of a p-type dopant is disclosed wherein the dopant is co-implanted with an n-type donor species at the time the n-channel is formed and a single anneal at moderate temperature is then performed. Also disclosed are devices manufactured using the method. In the preferred embodiment n-MESFETs and other similar field effect transistor devices are manufactured using C ions co-implanted with Si atoms in GaAs to form an n-channel. C exhibits a unique characteristic in the context of the invention in that it exhibits a low activation efficiency (typically, 50% or less) as a p-type dopant, and consequently, it acts to sharpen the Si n-channel by compensating Si donors in the region of the Si-channel tail, but does not contribute substantially to the acceptor concentration in the buried p region. As a result, the invention provides for improved field effect semiconductor and related devices with enhancement of both DC and high-frequency performance.

  7. Resonant plasmonic terahertz detection in vertical graphene-base hot-electron transistors

    SciTech Connect

    Ryzhii, V.; Otsuji, T.; Ryzhii, M.; Mitin, V.; Shur, M. S.

    2015-11-28

    We analyze dynamic properties of vertical graphene-base hot-electron transistors (GB-HETs) and consider their operation as detectors of terahertz (THz) radiation using the developed device model. The GB-HET model accounts for the tunneling electron injection from the emitter, electron propagation across the barrier layers with the partial capture into the GB, and the self-consistent oscillations of the electric potential and the hole density in the GB (plasma oscillations), as well as the quantum capacitance and the electron transit-time effects. Using the proposed device model, we calculate the responsivity of GB-HETs operating as THz detectors as a function of the signal frequency, applied bias voltages, and the structural parameters. The inclusion of the plasmonic effect leads to the possibility of the GB-HET operation at the frequencies significantly exceeding those limited by the characteristic RC-time. It is found that the responsivity of GB-HETs with a sufficiently perfect GB exhibits sharp resonant maxima in the THz range of frequencies associated with the excitation of plasma oscillations. The positions of these maxima are controlled by the applied bias voltages. The GB-HETs can compete with and even surpass other plasmonic THz detectors.

  8. Current fluctuation of electron and hole carriers in multilayer WSe{sub 2} field effect transistors

    SciTech Connect

    Ko, Seung-Pil; Shin, Jong Mok; Jang, Ho-Kyun; Jin, Jun Eon; Kim, Gyu-Tae; Kim, Yong Jin; Kim, Young Keun; Shin, Minju

    2015-12-14

    Two-dimensional materials have outstanding scalability due to their structural and electrical properties for the logic devices. Here, we report the current fluctuation in multilayer WSe{sub 2} field effect transistors (FETs). In order to demonstrate the impact on carrier types, n-type and p-type WSe{sub 2} FETs are fabricated with different work function metals. Each device has similar electrical characteristics except for the threshold voltage. In the low frequency noise analysis, drain current power spectral density (S{sub I}) is inversely proportional to frequency, indicating typical 1/f noise behaviors. The curves of the normalized drain current power spectral density (NS{sub I}) as a function of drain current at the 10 Hz of frequency indicate that our devices follow the carrier number fluctuation with correlated mobility fluctuation model. This means that current fluctuation depends on the trapping-detrapping motion of the charge carriers near the channel interface. No significant difference is observed in the current fluctuation according to the charge carrier type, electrons and holes that occurred in the junction and channel region.

  9. Direct wafer bonding technology for large-scale InGaAs-on-insulator transistors

    SciTech Connect

    Kim, SangHyeon E-mail: sh-kim@kist.re.kr; Ikku, Yuki; Takenaka, Mitsuru; Takagi, Shinichi; Yokoyama, Masafumi; Nakane, Ryosho; Li, Jian; Kao, Yung-Chung

    2014-07-28

    Heterogeneous integration of III-V devices on Si wafers have been explored for realizing high device performance as well as merging electrical and photonic applications on the Si platform. Existing methodologies have unavoidable drawbacks such as inferior device quality or high cost in comparison with the current Si-based technology. In this paper, we present InGaAs-on-insulator (-OI) fabrication from an InGaAs layer grown on a Si donor wafer with a III-V buffer layer instead of growth on a InP donor wafer. This technology allows us to yield large wafer size scalability of III-V-OI layers up to the Si wafer size of 300 mm with a high film quality and low cost. The high film quality has been confirmed by Raman and photoluminescence spectra. In addition, the fabricated InGaAs-OI transistors exhibit the high electron mobility of 1700 cm{sup 2}/V s and uniform distribution of the leakage current, indicating high layer quality with low defect density.

  10. Sensitivity of the threshold voltage of organic thin-film transistors to light and water

    SciTech Connect

    Feng, Cong; Marinov, Ognian; Deen, M. Jamal; Selvaganapathy, Ponnambalam Ravi; Wu, Yiliang

    2015-05-14

    Analyses of extensive experiments with organic thin-film transistors (OTFTs) indicate that the threshold voltage V{sub T} of an OTFT has a temporal differential sensitivity. In particular, V{sub T} changes initially by changing the light illumination intensity or making/removing a contact of water with the organic semiconductor. Keeping the conditions stationary, then the initial shift of V{sub T} diminishes, since the time dependence of V{sub T} gradually recovers the OTFT to the state before applying the change in the environmental conditions. While still causing a differential and time-variant shift of V{sub T}, the deionized water does not have a dramatic impact on OTFTs that use the polymer DKPP-?T (diketopyrrolopyrrole ?-unsubstituted quaterthiophene) as the active semiconductor material. Observations for the impact of water are made from experiments with an OTFT that has a microfluidic channel on the top the electrical channel, with the water in the microfluidic channel in direct contact with the electrical channel of the OTFT. This arrangement of electrical and microfluidic channels is a novel structure of the microfluidic OTFT, suitable for sensing applications of liquid analytes by means of organic electronics.

  11. Electrical control of second-harmonic generation in a WSe2 monolayer transistor

    SciTech Connect

    Seyler, Kyle L.; Schaibley, John R.; Gong, Pu; Rivera, Pasqual; Jones, Aaron M.; Wu, Sanfeng; Yan, Jiaqiang; Mandrus, David G.; Yao, Wang; Xu, Xiaodong

    2015-04-20

    Nonlinear optical frequency conversion, in which optical fields interact with a nonlinear medium to produce new field frequencies, is ubiquitous in modern photonic systems. However, the nonlinear electric susceptibilities that give rise to such phenomena are often challenging to tune in a given material and, so far, dynamical control of optical nonlinearities remains confined to research laboratories as a spectroscopic tool. In this paper, we report a mechanism to electrically control second-order optical nonlinearities in monolayer WSe2, an atomically thin semiconductor. We show that the intensity of second-harmonic generation at the A-exciton resonance is tunable by over an order of magnitude at low temperature and nearly a factor of four at room temperature through electrostatic doping in a field-effect transistor. Such tunability arises from the strong exciton charging effects in monolayer semiconductors, which allow for exceptional control over the oscillator strengths at the exciton and trion resonances. The exciton-enhanced second-harmonic generation is counter-circularly polarized to the excitation laser due to the combination of the two-photon and one-photon valley selection rules, which have opposite helicity in the monolayer. Finally, our study paves the way towards a new platform for chip-scale, electrically tunable nonlinear optical devices based on two-dimensional semiconductors.

  12. Electrical control of second-harmonic generation in a WSe2 monolayer transistor

    DOE PAGES [OSTI]

    Seyler, Kyle L.; Schaibley, John R.; Gong, Pu; Rivera, Pasqual; Jones, Aaron M.; Wu, Sanfeng; Yan, Jiaqiang; Mandrus, David G.; Yao, Wang; Xu, Xiaodong

    2015-04-20

    Nonlinear optical frequency conversion, in which optical fields interact with a nonlinear medium to produce new field frequencies, is ubiquitous in modern photonic systems. However, the nonlinear electric susceptibilities that give rise to such phenomena are often challenging to tune in a given material and, so far, dynamical control of optical nonlinearities remains confined to research laboratories as a spectroscopic tool. In this paper, we report a mechanism to electrically control second-order optical nonlinearities in monolayer WSe2, an atomically thin semiconductor. We show that the intensity of second-harmonic generation at the A-exciton resonance is tunable by over an order ofmore » magnitude at low temperature and nearly a factor of four at room temperature through electrostatic doping in a field-effect transistor. Such tunability arises from the strong exciton charging effects in monolayer semiconductors, which allow for exceptional control over the oscillator strengths at the exciton and trion resonances. The exciton-enhanced second-harmonic generation is counter-circularly polarized to the excitation laser due to the combination of the two-photon and one-photon valley selection rules, which have opposite helicity in the monolayer. Finally, our study paves the way towards a new platform for chip-scale, electrically tunable nonlinear optical devices based on two-dimensional semiconductors.« less

  13. Improved source design for p-type tunnel field-effect transistors: Towards truly complementary logic

    SciTech Connect

    Verreck, Devin Groeseneken, Guido; Verhulst, Anne S.; Collaert, Nadine; Mocuta, Anda; Thean, Aaron; Sore, Bart

    2014-12-15

    Complementary logic based on tunnel field-effect transistors (TFETs) would drastically reduce power consumption thanks to the TFET's potential to obtain a sub-60?mV/dec subthreshold swing (SS). However, p-type TFETs typically do not meet the performance of n-TFETs for direct bandgap III-V configurations. The p-TFET SS stays well above 60?mV/dec, due to the low density of states in the conduction band. We therefore propose a source configuration in which a highly doped region is maintained only near the tunnel junction. In the remaining part of the source, the hot carriers in the exponential tail of the Fermi-Dirac distribution are blocked by reducing the doping degeneracy, either with a source section with a lower doping concentration or with a heterostructure. We apply this concept to n-p-i-p configurations consisting of In{sub 0.53}Ga{sub 0.47}As and an InP-InAs heterostructure. 15-band quantum mechanical simulations predict that the configurations with our source design can obtain sub-60?mV/dec SS, with an on-current comparable to the conventional source design.

  14. Improvement of graphene field-effect transistors by hexamethyldisilazane surface treatment

    SciTech Connect

    Chowdhury, Sk. Fahad; Sonde, Sushant; Rahimi, Somayyeh; Tao, Li; Banerjee, Sanjay; Akinwande, Deji, E-mail: deji@ece.utexas.edu [Microelectronics Research Center, The University of Texas at Austin, Austin, Texas 78758 (United States)

    2014-07-21

    We report the improvement of the electrical characteristics of graphene field-effect transistors (FETs) by hexamethyldisilazane (HMDS) treatment. Both electron and hole field-effect mobilities are increased by 1.5??2, accompanied by effective residual carrier concentration reduction. Dirac point also moves closer to zero Volt. Time evolution of mobility data shows that mobility improvement saturates after a few hours of HMDS treatment. Temperature-dependent transport measurements show small mobility variation between 77 K and room temperature (295?K) before HMDS application. But mobility at 77 K is almost 2 times higher than mobility at 295?K after HMDS application, indicating reduced carrier scattering. Performance improvement is also observed for FETs made on hydrophobic substratean HMDS-graphene-HMDS sandwich structure. Raman spectroscopic analysis shows that G peak width is increased, G peak position is down shifted, and intensity ratio between 2D and G peaks is increased after HMDS application. We attribute the improvements in electronic transport mainly to enhanced screening and mitigation of adsorbed impurities from graphene surface upon HMDS treatment.

  15. As you prepare for your upcoming beam time, please be aware that construction is planned to update SLAC Gate 17 with RFID proximity card access hardware and to change the stairs next to the Security hut to an ADA compliant ramp. Please forward this to your proposal collaborators (and ensure that all users have registered and completed training before they arrive). This construction is scheduled to begin Tuesday 5/28 and be completed by 6/28. During this construction, access to the LCLS and SSRL buildings and experimental facilities will be provided as follows: VEHICLES ONLY THROUGH GATE 17 5/28-6/28 0600-1530 (6 am-3:30 pm) Construction Zone. Only VEHICLE traffic will be allowed access through Gate 17 and flagman will provide traffic control. 1530-1800 (3:30-6:00 pm) Assumes construction will have stopped for the day; both traffic lanes will be open for vehicles. 1800-0600 (6 pm-6 am) As now, Gate 17 will be closed or barricaded overnight. PEDESTRIANS ONLY THROUGH GATE 16 5/28-6/28 The pedestrian turnstile at Gate 16A will not change. The turnstile is available for pedestrian use 24/7 as long as the individual has a valid SLAC ID badge (and there is a guard at Gate 30 to 'buzz' them through). 0700-1600 (6 am-4 pm) Pedestrians who would normally walk through Gate 17 will instead follow the detour to Gate 16 swing gate which will be unlocked and staffed by Security. A valid SLAC ID badge is needed to enter; new users without IDs will be allowed to proceed for check-in and badging after confirmation with the User Research Administration Office (see detour map attached). FYI - After the construction is completed and proximity card readers are fully functional, users and staff will enter Gates 17 and 30 using an activated RFID proximity card. More details to follow.

    U.S. Department of Energy (DOE) - all webpages (Extended Search)

    Building 137 Bldg. 270 CONSTRUCTION IMPACTS PEDESTRIAN AND VEHICLE ACCESS THROUGH SLAC SECURITY GATE 17 ~ May 28-June 28, 2013 The stairs next to the Gate 17 Guard House will be replaced with an ADA compliant ramp; the turnstile and fence at SLAC Gate 17 will be updated with RFID proximity card access hardware. During this construction, access beyond the fence, including the SSRL and LCLS buildings and user facilities will be provided as follows: VEHICLES ONLY THROUGH GATE 17 Security will

  16. SU-E-CAMPUS-J-01: TG142 Complied Comprehensive Commissioning and Quality Assurance Procedure for Respiratory Gating

    SciTech Connect

    Woods, K; Rong, Y; Weldon, M; Gupta, N

    2014-06-15

    Purpose: To develop and establish a comprehensive gating commissioning and quality assurance procedure in compliance with TG142. Methods: Quality assurance tests on three Varian LINACs included beam output and energy constancy, calibration of surrogate, as well as phase and amplitude gating temporal accuracy. A diode array (MapCHECK 2) and film (Gafchromic EBT2) were used to measure the temporal accuracy of phase and amplitude gating windows. A motion simulation device (MotionSim) was used to simulate respiratory motion for both detectors. An end-to-end test was also performed on all three machines. The overall accuracy and uncertainty was analyzed and compared. Results: The end-to-end test using an anthropomorphic lung phantom (CIRS) results in an OSL dose difference reading within 5% (within measurement uncertainty) for both phase and amplitude gated treatment. Film results showed < 1% agreement between profiles for gated delivery and predicted dose. The diode array demonstrated an 80% passing rate for gamma criteria of 2%/0.2 mm, which results in a 111 msec temporal accuracy. However, the diode array is limited by its spatial resolution of measurements, due to its 7.07 mm diode spacing. Film provided higher measuring resolution, thus demonstrated a temporal accuracy of <100 msec. Conclusion: Results showed consistent respiratory gating stability and accuracy. MapCHECK 2 may not be sufficient for the temporal accuracy test in the respiratory gating treatment in order to meet the corresponding tolerance in TG142. One would need to decrease respiratory motion speed from the surrogate or tighten the gating window in order to be within tolerance of 100 msec temporal accuracy per TG-142. The end-to-end test offers insight to the overall accuracy and uncertainties with a gated protocol. Compared to static delivery, respiratory motion increases the overall uncertainty of treatment delivery from 3% to 5% dose difference.

  17. SU-E-J-185: Gated CBCT Imaging for Positioning Moving Lung Tumor in Lung SBRT Treatment

    SciTech Connect

    Li, X; Li, T; Zhang, Y; Burton, S; Karlovits, B; Clump, D; Heron, D; Huq, M

    2014-06-01

    Purpose: Lung stereo-tactic body radiotherapy(SBRT) treatment requires high accuracy of lung tumor positioning during treatment, which is usually accomplished by free breathing Cone-Beam computerized tomography (CBCT) scan. However, respiratory motion induced image artifacts in free breathing CBCT may degrade such positioning accuracy. The purpose of this study is to investigate the feasibility of gated CBCT imaging for lung SBRT treatment. Methods: Six Lung SBRT patients were selected for this study. The respiratory motion of the tumors ranged from 1.2cm to 3.5cm, and the gating windows for all patients were set between 35% and 65% of the respiratory phases. Each Lung SBRT patient underwent free-breathing CBCT scan using half-fan scan technique. The acquired projection images were transferred out for off-line analyses. An In-house semi-automatic algorithm was developed to trace the diaphragm movement from those projection images to acquire a patient's specific respiratory motion curve, which was used to correlate respiratory phases with each projection image. Afterwards, a filtered back-projection algorithm was utilized to reconstruct the gated CBCT images based on the projection images only within the gating window. Results: Target volumes determined by free breathing CBCT images were 71.9%±72% bigger than the volume shown in gated CBCT image. On the contrary, the target volume differences between gated CBCT and planning CT images at exhale stage were 5.8%±2.4%. The center to center distance of the targets shown in free breathing CBCT and gated CBCT images were 9.2±8.1mm. For one particular case, the superior boundary of the target was shifted 15mm between free breathing CBCT and gated CBCT. Conclusion: Gated CBCT imaging provides better representation of the moving lung tumor with less motion artifacts, and has the potential to improve the positioning accuracy in lung SBRT treatment.

  18. Magneto-transport study of top- and back-gated LaAlO{sub 3}/SrTiO{sub 3} heterostructures

    SciTech Connect

    Liu, W. Gariglio, S.; Fête, A.; Li, D.; Boselli, M.; Stornaiuolo, D.; Triscone, J.-M.

    2015-06-01

    We report a detailed analysis of magneto-transport properties of top- and back-gated LaAlO{sub 3}/SrTiO{sub 3} heterostructures. Efficient modulation in magneto-resistance, carrier density, and mobility of the two-dimensional electron liquid present at the interface is achieved by sweeping top and back gate voltages. Analyzing those changes with respect to the carrier density tuning, we observe that the back gate strongly modifies the electron mobility while the top gate mainly varies the carrier density. The evolution of the spin-orbit interaction is also followed as a function of top and back gating.

  19. Evolution of interfacial Fermi level in In{sub 0.53}Ga{sub 0.47}As/high-κ/TiN gate stacks

    SciTech Connect

    Carr, Adra; Rozen, John; Frank, Martin M.; Ando, Takashi; Cartier, Eduard A.; Kerber, Pranita; Narayanan, Vijay; Haight, Richard

    2015-07-06

    The net charge state was probed of metal-oxide-semiconductor gate stacks consisting of In{sub 0.53}Ga{sub 0.47}As /high-κ dielectric/5 nm TiN, for both Al{sub 2}O{sub 3} and HfO{sub 2} dielectrics, via investigation of band bending at the InGaAs/high-κ interface. Using pump-probe photoelectron spectroscopy, changes to band bending were studied for each sequential layer deposited onto the InGaAs substrate and subsequent annealing up to 600 °C. Two behavioral regions were observed in annealing studies: (1) a lower temperature (<350 °C) region, attributed to changes at the high-κ/TiN interface, and (2) a higher temperature region (> 350 °C), associated with a net positive charge increase within the oxide. These band bending measurements delineate the impact of processing steps inherently inaccessible via capacitance-voltage electrical characterization.

  20. Observation of localized states in atomically thin MoS{sub 2} field effect transistor

    SciTech Connect

    Ghatak, Subhamoy; Pal, Atindra Nath; Ghosh, Arindam

    2013-12-04

    We present electrical transport and low frequency (1/f) noise measurements on mechanically exfoliated single, bi and trilayer MoS{sub 2}-based FET devices on Si/SiO{sub 2} substrate. We find that the electronic states in MoS{sub 2} are localized at low temperatures (T) and conduction happens through variable range hopping (VRH). A steep increase of 1/f noise with decreasing T, typical for localized regime was observed in all of our devices. From gate voltage dependence of noise, we find that the noise power is inversely proportional to square of the number density (? 1/n{sup 2}) for a wide range of T, indicating number density fluctuations to be the dominant source of 1/f noise in these MoS{sub 2} FETs.

  1. Kondo physics in the single-electron transistor with ac driving

    SciTech Connect

    Nordlander, Peter; Wingreen, Ned S.; Meir, Yigal; Langreth, David C.

    2000-01-15

    Using a time-dependent Anderson Hamiltonian, a quantum dot with an ac voltage applied to a nearby gate is investigated. A rich dependence of the linear response conductance on the external frequency and driving amplitude is demonstrated. At low frequencies a sufficiently strong ac potential produces sidebands of the Kondo peak in the spectral density of the dot, and a slow, roughly logarithmic decrease in conductance over several decades of frequency. At intermediate frequencies, the conductance of the dot displays an oscillatory behavior due to the appearance of Kondo resonances of the satellites of the dot level. At high frequencies, the conductance of the dot can vary rapidly due to the interplay between photon-assisted tunneling and the Kondo resonance. (c) 2000 The American Physical Society.

  2. A planning study investigating dual-gated volumetric arc stereotactic treatment of primary renal cell carcinoma

    SciTech Connect

    Devereux, Thomas; Pham, Daniel; Kron, Tomas; Foroudi, Farshad; Supple, Jeremy; Siva, Shankar

    2015-04-01

    This is a planning study investigating the dosimetric advantages of gated volumetric-modulated arc therapy (VMAT) to the end-exhale and end-inhale breathing phases for patients undergoing stereotactic treatment of primary renal cell carcinoma. VMAT plans were developed from the end-inhale (VMATinh) and the end-exhale (VMATexh) phases of the breathing cycle as well as a VMAT plan and 3-dimensional conformal radiation therapy plan based on an internal target volume (ITV) (VMATitv). An additional VMAT plan was created by giving the respective gated VMAT plan a 50% weighting and summing the inhale and exhale plans together to create a summed gated plan. Dose to organs at risk (OARs) as well as comparison of intermediate and low-dose conformity was evaluated. There was no difference in the volume of healthy tissue receiving the prescribed dose for the planned target volume (PTV) (CI100%) for all the VMAT plans; however, the mean volume of healthy tissue receiving 50% of the prescribed dose for the PTV (CI50%) values were 4.7 (± 0.2), 4.6 (± 0.2), and 4.7 (± 0.6) for the VMATitv, VMATinh, and VMATexh plans, respectively. The VMAT plans based on the exhale and inhale breathing phases showed a 4.8% and 2.4% reduction in dose to 30 cm{sup 3} of the small bowel, respectively, compared with that of the ITV-based VMAT plan. The summed gated VMAT plans showed a 6.2% reduction in dose to 30 cm{sup 3} of the small bowel compared with that of the VMAT plans based on the ITV. Additionally, when compared with the inhale and the exhale VMAT plans, a 4% and 1.5%, respectively, reduction was observed. Gating VMAT was able to reduce the amount of prescribed, intermediate, and integral dose to healthy tissue when compared with VMAT plans based on an ITV. When summing the inhale and exhale plans together, dose to healthy tissue and OARs was optimized. However, gating VMAT plans would take longer to treat and is a factor that needs to be considered.

  3. Partial oxidation catalyst

    DOEpatents

    Krumpelt, Michael; Ahmed, Shabbir; Kumar, Romesh; Doshi, Rajiv

    2000-01-01

    A two-part catalyst comprising a dehydrogenation portion and an oxide-ion conducting portion. The dehydrogenation portion is a group VIII metal and the oxide-ion conducting portion is selected from a ceramic oxide crystallizing in the fluorite or perovskite structure. There is also disclosed a method of forming a hydrogen rich gas from a source of hydrocarbon fuel in which the hydrocarbon fuel contacts a two-part catalyst comprising a dehydrogenation portion and an oxide-ion conducting portion at a temperature not less than about 400.degree. C. for a time sufficient to generate the hydrogen rich gas while maintaining CO content less than about 5 volume percent. There is also disclosed a method of forming partially oxidized hydrocarbons from ethanes in which ethane gas contacts a two-part catalyst comprising a dehydrogenation portion and an oxide-ion conducting portion for a time and at a temperature sufficient to form an oxide.

  4. Passivation of Oxide Layers on 4H-SiC Using Sequential Anneals in Nitric Oxide and Hydrogen

    SciTech Connect

    Williams, J. R.; Isaacs-Smith, T.; Wang, S.; Ahyi, C.; Lawless, R. M.; Tin, C. C.; Dhar, S.; Franceschetti, Alberto G; Pantelides, Sokrates T; Feldman, Leonard C; Chung, G.; Chisholm, Matthew F

    2004-01-01

    The interface passivation process based on post-oxidation, high temperature anneals in nitric oxide (NO) is well established for SiO{sub 2} on (0001) 4H-SiC. The NO process results in an order of magnitude or more reduction in the interface state density near the 4H conduction band edge. However, trap densities are still high compared to those measured for Si/SiO{sub 2} passivated with post-oxidation anneals in hydrogen. Herein, we report the results of studies for 4H-SiC/SiO{sub 2} undertaken to determine the effects of additional passivation anneals in hydrogen when these anneals are carried out following a standard NO anneal. After NO passivation and Pt deposition to form gate contacts, post-metallization anneals in hydrogen further reduced the trap density from approximately 1.5 x 10{sup 12} cm{sup -2}eV{sup -1} to about 6 x 10{sup 11} cm{sup -2}eV{sup -1} at a trap energy of 0.1 eV below the band edge for dry thermal oxides on both (0001) and (11-20) 4H-SiC.

  5. ZIRCONIUM OXIDE NANOSTRUCTURES PREPARED BY ANODIC OXIDATION

    SciTech Connect

    Dang, Y. Y.; Bhuiyan, M.S.; Paranthaman, M. P.

    2008-01-01

    Zirconium oxide is an advanced ceramic material highly useful for structural and electrical applications because of its high strength, fracture toughness, chemical and thermal stability, and biocompatibility. If highly-ordered porous zirconium oxide membranes can be successfully formed, this will expand its real-world applications, such as further enhancing solid-oxide fuel cell technology. Recent studies have achieved various morphologies of porous zirconium oxide via anodization, but they have yet to create a porous layer where nanoholes are formed in a highly ordered array. In this study, electrochemical methods were used for zirconium oxide synthesis due to its advantages over other coating techniques, and because the thickness and morphology of the ceramic fi lms can be easily tuned by the electrochemical parameters, such as electrolyte solutions and processing conditions, such as pH, voltage, and duration. The effects of additional steps such as pre-annealing and post-annealing were also examined. Results demonstrate the formation of anodic porous zirconium oxide with diverse morphologies, such as sponge-like layers, porous arrays with nanoholes ranging from 40 to 75 nm, and nanotube layers. X-ray powder diffraction analysis indicates a cubic crystallographic structure in the zirconium oxide. It was noted that increased voltage improved the ability of the membrane to stay adhered to the zirconium substrate, whereas lower voltages caused a propensity for the oxide fi lm to fl ake off. Further studies are needed to defi ne the parameters windows that create these morphologies and to investigate other important characteristics such as ionic conductivity.

  6. Vehicle Technologies Office Merit Review 2014: GATE Center for Electric Drive Transportation at the University of Michigan- Dearborn

    Energy.gov [DOE]

    Presentation given by Regents University of Michigan at 2014 DOE Hydrogen and Fuel Cells Program and Vehicle Technologies Office Annual Merit Review and Peer Evaluation Meeting about GATE Center...

  7. A review of the use and potential of the GATE Monte Carlo simulation code for radiation therapy and dosimetry applications

    SciTech Connect

    Sarrut, David; Universit Lyon 1; Centre Lon Brard ; Bardis, Manuel; Marcatili, Sara; Mauxion, Thibault; Boussion, Nicolas; Freud, Nicolas; Ltang, Jean-Michel; Jan, Sbastien; Maigne, Lydia; Perrot, Yann; Pietrzyk, Uwe; Robert, Charlotte; and others

    2014-06-15

    In this paper, the authors' review the applicability of the open-source GATE Monte Carlo simulation platform based on the GEANT4 toolkit for radiation therapy and dosimetry applications. The many applications of GATE for state-of-the-art radiotherapy simulations are described including external beam radiotherapy, brachytherapy, intraoperative radiotherapy, hadrontherapy, molecular radiotherapy, and in vivo dose monitoring. Investigations that have been performed using GEANT4 only are also mentioned to illustrate the potential of GATE. The very practical feature of GATE making it easy to model both a treatment and an imaging acquisition within the same frameworkis emphasized. The computational times associated with several applications are provided to illustrate the practical feasibility of the simulations using current computing facilities.

  8. Magnetic roller gas gate employing transonic sweep gas flow to isolate regions of differing gaseous composition or pressure

    DOEpatents

    Doehler, Joachim

    1994-12-20

    Disclosed herein is an improved gas gate for interconnecting regions of differing gaseous composition and/or pressure. The gas gate includes a narrow, elongated passageway through which substrate material is adapted to move between said regions and inlet means for introducing a flow of non-contaminating sweep gas into a central portion of said passageway. The gas gate is characterized in that the height of the passageway and the flow rate of the sweep gas therethrough provides for transonic flow of the sweep gas between the inlet means and at least one of the two interconnected regions, thereby effectively isolating one region, characterized by one composition and pressure, from another region, having a differing composition and/or pressure, by decreasing the mean-free-path length between collisions of diffusing species within the transonic flow region. The gas gate preferably includes a manifold at the juncture point where the gas inlet means and the passageway interconnect.

  9. A reconfigurable gate architecture for Si/SiGe quantum dots

    SciTech Connect

    Zajac, D. M.; Hazard, T. M.; Mi, X.; Wang, K.; Petta, J. R.

    2015-06-01

    We demonstrate a reconfigurable quantum dot gate architecture that incorporates two interchangeable transport channels. One channel is used to form quantum dots, and the other is used for charge sensing. The quantum dot transport channel can support either a single or a double quantum dot. We demonstrate few-electron occupation in a single quantum dot and extract charging energies as large as 6.6 meV. Magnetospectroscopy is used to measure valley splittings in the range of 35–70 μeV. By energizing two additional gates, we form a few-electron double quantum dot and demonstrate tunable tunnel coupling at the (1,0) to (0,1) interdot charge transition.

  10. A method for evaluating pressure locking and thermal binding of gate valves

    SciTech Connect

    Dogan, T.

    1996-12-01

    A method is described to evaluate the susceptibility of gate valves to pressure locking and thermal binding. Binding of the valve disc in the closed position due to high pressure water trapped in the bonnet cavity (pressure locking) or differential thermal expansion of the disk in the seat (thermal binding) represents a potential mechanism that can prevent safety-related systems from functioning when called upon. The method described here provides a general equation that can be applied to a given gate valve design and set of operating conditions to determine the susceptibility of the valve to fail due to disc binding. The paper is organized into three parts. The first part discusses the physical mechanisms that cause disc binding. The second part describes the mathematical equations. The third part discusses the conclusions.

  11. Memory effect in silicon time-gated single-photon avalanche diodes

    SciTech Connect

    Dalla Mora, A.; Contini, D. Di Sieno, L.; Tosi, A.; Boso, G.; Villa, F.; Pifferi, A.

    2015-03-21

    We present a comprehensive characterization of the memory effect arising in thin-junction silicon Single-Photon Avalanche Diodes (SPADs) when exposed to strong illumination. This partially unknown afterpulsing-like noise represents the main limiting factor when time-gated acquisitions are exploited to increase the measurement dynamic range of very fast (picosecond scale) and faint (single-photon) optical signals following a strong stray one. We report the dependences of this unwelcome signal-related noise on photon wavelength, detector temperature, and biasing conditions. Our results suggest that this so-called “memory effect” is generated in the deep regions of the detector, well below the depleted region, and its contribution on detector response is visible only when time-gated SPADs are exploited to reject a strong burst of photons.

  12. Attosecond x-ray source generation from two-color polarized gating plasmonic field enhancement

    SciTech Connect

    Feng, Liqiang; State Key Laboratory of Molecular Reaction Dynamics, Dalian Institute of Chemical Physics, Chinese Academy of Sciences, Dalian 116023 ; Yuan, Minghu; Chu, Tianshu; Institute for Computational Sciences and Engineering, Laboratory of New Fiber Materials and Modern Textile, The Growing Base for State Key Laboratory, Qingdao University, Qingdao 266071

    2013-12-15

    The plasmonic field enhancement from the vicinity of metallic nanostructures as well as the polarization gating technique has been utilized to the generation of the high order harmonic and the single attosecond x-ray source. Through numerical solution of the time-dependent Schrödinger equation, for moderate the inhomogeneity and the polarized angle of the two fields, we find that not only the harmonic plateau has been extended and enhanced but also the single short quantum path has been selected to contribute to the harmonic. As a result, a series of 50 as pulses around the extreme ultraviolet and the x-ray regions have been obtained. Furthermore, by investigating the other parameters effects on the harmonic emission, we find that this two-color polarized gating plasmonic field enhancement scheme can also be achieved by the multi-cycle pulses, which is much better for experimental realization.

  13. 2012 ARPA-E Energy Innovation Summit: Fireside Chat with Steven Chu and Bill Gates

    SciTech Connect

    Chu, Steven; Gates, Bill; Podesta, John

    2012-02-28

    The third annual ARPA-E Energy Innovation Summit was held in Washington D.C. in February, 2012. The event brought together key players from across the energy ecosystem - researchers, entrepreneurs, investors, corporate executives, and government officials - to share ideas for developing and deploying the next generation of energy technologies. This video captures a session called 'Fireside Chat' that featured Steven Chu, the Secretary of Energy, and Bill Gates, Chairman of Microsoft Corporation. The session is moderated by John Podesta, Chair of the Center for American Progress. Energy Secretary Steven Chu and Microsoft Founder and Chairman Bill Gates exchanged ideas about how small businesses and innovators can overcome the challenges that face many startups.

  14. 2012 ARPA-E Energy Innovation Summit: Fireside Chat with Steven Chu and Bill Gates

    ScienceCinema

    Chu, Steven (U.S. Department of Energy Secretary); Gates, Bill (Microsoft, Chairman); Podesta, John (Center for American Progress, Chair and Counselor)

    2016-07-12

    The third annual ARPA-E Energy Innovation Summit was held in Washington D.C. in February, 2012. The event brought together key players from across the energy ecosystem - researchers, entrepreneurs, investors, corporate executives, and government officials - to share ideas for developing and deploying the next generation of energy technologies. This video captures a session called 'Fireside Chat' that featured Steven Chu, the Secretary of Energy, and Bill Gates, Chairman of Microsoft Corporation. The session is moderated by John Podesta, Chair of the Center for American Progress. Energy Secretary Steven Chu and Microsoft Founder and Chairman Bill Gates exchanged ideas about how small businesses and innovators can overcome the challenges that face many startups.

  15. Oxidation Resistant Graphite Studies

    SciTech Connect

    W. Windes; R. Smith

    2014-07-01

    The Very High Temperature Reactor (VHTR) Graphite Research and Development Program is investigating doped nuclear graphite grades exhibiting oxidation resistance. During a oxygen ingress accident the oxidation rates of the high temperature graphite core region would be extremely high resulting in significant structural damage to the core. Reducing the oxidation rate of the graphite core material would reduce the structural effects and keep the core integrity intact during any air-ingress accident. Oxidation testing of graphite doped with oxidation resistant material is being conducted to determine the extent of oxidation rate reduction. Nuclear grade graphite doped with varying levels of Boron-Carbide (B4C) was oxidized in air at nominal 740°C at 10/90% (air/He) and 100% air. The oxidation rates of the boronated and unboronated graphite grade were compared. With increasing boron-carbide content (up to 6 vol%) the oxidation rate was observed to have a 20 fold reduction from unboronated graphite. Visual inspection and uniformity of oxidation across the surface of the specimens were conducted. Future work to determine the remaining mechanical strength as well as graphite grades with SiC doped material are discussed.

  16. Poster — Thur Eve — 37: Respiratory gating with an Elekta flattening filter free photon beam

    SciTech Connect

    Péloquin, S; Furstoss, C; Munger, P; Wierzbicki, W; Carrier, J-F

    2014-08-15

    In cases where surgery is not possible for lung cancer treatment, stereotactic body radiation therapy (SBRT) may be an option. One problem when treating this type of cancer is the motion of the lungs caused by the patient's respiration. It is possible to reduce the impact of this movement with the use of respiratory gating. By combining respiratory gating with a flattening filter free (FFF) photon beam linac, the increased treatment time caused by a reduced beam-on time of respiratory gating methods can be compensated by the inherent increased dose rate of FFF beams. This project's aim is to create hardware and software interfaces allowing free respiration gating on an Elekta Synergy-S linac specially modified to deliver 6 MV FFF photon beams. First, a printed circuit board was created for reading the signal from a Bellows Belt from Philips (a respiration monitor belt) and transmitting an On/Off signal to the accelerator. A software was also developed to visualize patient respiration. Secondly, a FFF model was created with the Pinnacle treatment planning system from Philips. Gamma (Γ) analysis (2%, 2 mm) was used to evaluate model. For fields going from 5.6 × 5.6 to 12 × 12 cm{sup 2}, central axis depth dose model fitting shows an average gamma value of 0.2 and 100% of gamma values remain under the Γ = 1 limit. For smaller fields (0.8 × 0.8 and 1.6 × 1.6 cm{sup 2}), Pinnacle has more trouble trying to fit the measurements, overestimating dose in penumbra and buildup regions.

  17. Crystal structure of a two-subunit TrkA octameric gating ring assembly

    DOE PAGES [OSTI]

    Deller, Marc C.; Johnson, Hope A.; Miller, Mitchell D.; Spraggon, Glen; Elsliger, Marc -André; Wilson, Ian A.; Lesley, Scott A.; Ye, Sheng

    2015-03-31

    The TM1088 locus of T. maritima codes for two proteins designated TM1088A and TM1088B, which combine to form the cytosolic portion of a putative Trk K⁺ transporter. We report the crystal structure of this assembly to a resolution of 3.45 Å. The high resolution crystal structures of the components of the assembly, TM1088A and TM1088B, were also determined independently to 1.50 Å and 1.55 Å, respectively. The TM1088 proteins are structurally homologous to each other and to other K⁺ transporter proteins, such as TrkA. These proteins form a cytosolic gating ring assembly that controls the flow of K⁺ ions acrossmore » the membrane. TM1088 represents the first structure of a two-subunit Trk assembly. Despite the atypical genetics and chain organization of the TM1088 assembly, it shares significant structural homology and an overall quaternary organization with other single-subunit K⁺ gating ring assemblies. This structure provides the first structural insights into what may be an evolutionary ancestor of more modern single-subunit K⁺ gating ring assemblies.« less

  18. Crystal structure of a two-subunit TrkA octameric gating ring assembly

    SciTech Connect

    Deller, Marc C.; Johnson, Hope A.; Miller, Mitchell D.; Spraggon, Glen; Elsliger, Marc -André; Wilson, Ian A.; Lesley, Scott A.; Ye, Sheng

    2015-03-31

    The TM1088 locus of T. maritima codes for two proteins designated TM1088A and TM1088B, which combine to form the cytosolic portion of a putative Trk K⁺ transporter. We report the crystal structure of this assembly to a resolution of 3.45 Å. The high resolution crystal structures of the components of the assembly, TM1088A and TM1088B, were also determined independently to 1.50 Å and 1.55 Å, respectively. The TM1088 proteins are structurally homologous to each other and to other K⁺ transporter proteins, such as TrkA. These proteins form a cytosolic gating ring assembly that controls the flow of K⁺ ions across the membrane. TM1088 represents the first structure of a two-subunit Trk assembly. Despite the atypical genetics and chain organization of the TM1088 assembly, it shares significant structural homology and an overall quaternary organization with other single-subunit K⁺ gating ring assemblies. This structure provides the first structural insights into what may be an evolutionary ancestor of more modern single-subunit K⁺ gating ring assemblies.

  19. Laser measurement of H{sup -} ions in a field-effect-transistor based radio frequency ion source

    SciTech Connect

    Tanaka, N.; Matsuno, T.; Funaoi, T.; Ando, A.; Tauchi, Y.; Nakano, H.; Tsumori, K.; Takeiri, Y.

    2012-02-15

    Hydrogen negative ion density measurements are required to clarify the characteristics of negative ion production and ion source performance. Both of laser photodetachment and cavity ring down (CRD) measurements have been implemented to a field-effect-transistor based radio-frequency ion source. The density ratio of negative hydrogen ions to electrons was successfully measured by laser photodetachment and effect of magnetic filter field on negative ion density was confirmed. The calculated CRD signal showed that CRD mirrors with >99.990% reflectivity are required and loss of reflectivity due to cesium contamination should be minimized.

  20. H{sup -} beam extraction from a cesium seeded field effect transistor based radio frequency negative hydrogen ion source

    SciTech Connect

    Ando, A.; Matsuno, T.; Funaoi, T.; Tanaka, N.; Tsumori, K.; Takeiri, Y.

    2012-02-15

    H{sup -} beam was successfully extracted from a cesium seeded ion source operated using a field effect transistor inverter power supply as a radio frequency (RF) wave source. High density hydrogen plasma more than 10{sup 19} m{sup -3} was obtained using an external type antenna with RF frequency of lower than 0.5 MHz. The source was isolated by an isolation transformer and H{sup -} ion beam was extracted from a single aperture. Acceleration current and extraction current increased with the increase of extraction voltage. Addition of a small amount of cesium vapor into the source enhanced the currents.