An algorithm for two-dimensional convolution is proposed to be highly efficient and suitable for parallel processing, and a hardware of pipeline architecture is implemented to realize the algorithm. The implemented hardware is built on an IBM personal computer and acts as an auxiliary processor of the personal computer. This makes the dream come true that high speed, low-cost image processing is feasible on personal computers. The hardware executes two operations of two-dimensional convolution concurrently on an 256 x 256 image frame in less than 500 miniseconds. Several functions are available to users, and parameters such as weighting coefficients and threshold value are programmable. Various processing results of the image frame can be obtained by changing these parameters. Besides, horizontal and vertical edge detection can also be executed concurrently, with results available at the same time.