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Parallel computation for distributed parameter system-from vector processors to Adena computer

Journal Article:

Abstract

Research on advanced parallel hardware and software architectures for very high-speed computation deserves and needs more support and attention to fulfil its promise. Novel architectures for parallel processing are being made ready. Architectures for parallel processing can be roughly divided into two groups. One is a vector processor in which a single central processing unit involves multiple vector-arithmetic registers. The other is a processor array in which slave processors are connected to a host processor to perform parallel computation. In this review, the concept and data structure of the Adena (alternating-direction edition nexus array) architecture, which is conformable to distributed-parameter simulation algorithms, are described. 5 references.
Authors:
Publication Date:
Apr 01, 1983
Product Type:
Journal Article
Reference Number:
EDB-85-161786
Resource Relation:
Journal Name: Keisoku To Seigyo; (Japan); Journal Volume: 4
Subject:
99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE; COMPUTERS; PARALLEL PROCESSING; ARCHITECTURE; PROGRAMMING; VECTOR PROCESSING; 990200* - Mathematics & Computers
OSTI ID:
5304184
Country of Origin:
Japan
Language:
Japanese
Other Identifying Numbers:
Journal ID: CODEN: KESEA
Submitting Site:
HEDB
Size:
Pages: 340-348
Announcement Date:

Journal Article:

Citation Formats

Nogi, T. Parallel computation for distributed parameter system-from vector processors to Adena computer. Japan: N. p., 1983. Web.
Nogi, T. Parallel computation for distributed parameter system-from vector processors to Adena computer. Japan.
Nogi, T. 1983. "Parallel computation for distributed parameter system-from vector processors to Adena computer." Japan.
@misc{etde_5304184,
title = {Parallel computation for distributed parameter system-from vector processors to Adena computer}
author = {Nogi, T}
abstractNote = {Research on advanced parallel hardware and software architectures for very high-speed computation deserves and needs more support and attention to fulfil its promise. Novel architectures for parallel processing are being made ready. Architectures for parallel processing can be roughly divided into two groups. One is a vector processor in which a single central processing unit involves multiple vector-arithmetic registers. The other is a processor array in which slave processors are connected to a host processor to perform parallel computation. In this review, the concept and data structure of the Adena (alternating-direction edition nexus array) architecture, which is conformable to distributed-parameter simulation algorithms, are described. 5 references.}
journal = {Keisoku To Seigyo; (Japan)}
volume = {4}
journal type = {AC}
place = {Japan}
year = {1983}
month = {Apr}
}