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Simulated annealing method for electronic circuits design: adaptation and comparison with other optimization methods; La methode du recuit simule pour la conception des circuits electroniques: adaptation et comparaison avec d`autres methodes d`optimisation

Abstract

The circuit design problem consists in determining acceptable parameter values (resistors, capacitors, transistors geometries ...) which allow the circuit to meet various user given operational criteria (DC consumption, AC bandwidth, transient times ...). This task is equivalent to a multidimensional and/or multi objective optimization problem: n-variables functions have to be minimized in an hyper-rectangular domain ; equality constraints can be eventually specified. A similar problem consists in fitting component models. In this way, the optimization variables are the model parameters and one aims at minimizing a cost function built on the error between the model response and the data measured on the component. The chosen optimization method for this kind of problem is the simulated annealing method. This method, provided by the combinatorial optimization domain, has been adapted and compared with other global optimization methods for the continuous variables problems. An efficient strategy of variables discretization and a set of complementary stopping criteria have been proposed. The different parameters of the method have been adjusted with analytical functions of which minima are known, classically used in the literature. Our simulated annealing algorithm has been coupled with an open electrical simulator SPICE-PAC of which the modular structure allows the chaining of  More>>
Authors:
Publication Date:
Oct 01, 1995
Product Type:
Thesis/Dissertation
Report Number:
CEA-R-5707
Reference Number:
SCA: 990200; 440104; 661300; PA: AIX-27:071335; EDB-96:162977; NTS-97:002877; SN: 96001684360
Resource Relation:
Other Information: TH: These (D. es Sc.).; PBD: Oct 1995
Subject:
99 MATHEMATICS, COMPUTERS, INFORMATION SCIENCE, MANAGEMENT, LAW, MISCELLANEOUS; 44 INSTRUMENTATION, INCLUDING NUCLEAR AND PARTICLE DETECTORS; 66 PHYSICS; COMPUTER-AIDED DESIGN; ELECTRONIC CIRCUITS; ANNEALING; CALCULATION METHODS; COMPUTERIZED SIMULATION; MARKOV PROCESS; MINIMIZATION; NEUTRON DETECTORS; BACKGROUND NOISE; DISTRIBUTION FUNCTIONS; ELECTRIC GENERATORS; FIELD EFFECT TRANSISTORS; KNOWLEDGE BASE; LTE; MOS TRANSISTORS; MULTI-PARAMETER ANALYSIS; NEURAL NETWORKS; PARAMETRIC ANALYSIS; PARTITION FUNCTIONS; RESPONSE FUNCTIONS; SIMULATORS; STATISTICAL MECHANICS
OSTI ID:
385204
Research Organizations:
CEA Centre d`Etudes de Saclay, 91 - Gif-sur-Yvette (France). Dept. d`Electronique et d`Instrumentation Nucleaire
Country of Origin:
France
Language:
French
Other Identifying Numbers:
Other: ON: DE97603321; TRN: FR9602912071335
Availability:
INIS; OSTI as DE97603321
Submitting Site:
FRN
Size:
128 p.
Announcement Date:

Citation Formats

Berthiau, G. Simulated annealing method for electronic circuits design: adaptation and comparison with other optimization methods; La methode du recuit simule pour la conception des circuits electroniques: adaptation et comparaison avec d`autres methodes d`optimisation. France: N. p., 1995. Web.
Berthiau, G. Simulated annealing method for electronic circuits design: adaptation and comparison with other optimization methods; La methode du recuit simule pour la conception des circuits electroniques: adaptation et comparaison avec d`autres methodes d`optimisation. France.
Berthiau, G. 1995. "Simulated annealing method for electronic circuits design: adaptation and comparison with other optimization methods; La methode du recuit simule pour la conception des circuits electroniques: adaptation et comparaison avec d`autres methodes d`optimisation." France.
@misc{etde_385204,
title = {Simulated annealing method for electronic circuits design: adaptation and comparison with other optimization methods; La methode du recuit simule pour la conception des circuits electroniques: adaptation et comparaison avec d`autres methodes d`optimisation}
author = {Berthiau, G}
abstractNote = {The circuit design problem consists in determining acceptable parameter values (resistors, capacitors, transistors geometries ...) which allow the circuit to meet various user given operational criteria (DC consumption, AC bandwidth, transient times ...). This task is equivalent to a multidimensional and/or multi objective optimization problem: n-variables functions have to be minimized in an hyper-rectangular domain ; equality constraints can be eventually specified. A similar problem consists in fitting component models. In this way, the optimization variables are the model parameters and one aims at minimizing a cost function built on the error between the model response and the data measured on the component. The chosen optimization method for this kind of problem is the simulated annealing method. This method, provided by the combinatorial optimization domain, has been adapted and compared with other global optimization methods for the continuous variables problems. An efficient strategy of variables discretization and a set of complementary stopping criteria have been proposed. The different parameters of the method have been adjusted with analytical functions of which minima are known, classically used in the literature. Our simulated annealing algorithm has been coupled with an open electrical simulator SPICE-PAC of which the modular structure allows the chaining of simulations required by the circuit optimization process. We proposed, for high-dimensional problems, a partitioning technique which ensures proportionality between CPU-time and variables number. To compare our method with others, we have adapted three other methods coming from combinatorial optimization domain - the threshold method, a genetic algorithm and the Tabu search method - The tests have been performed on the same set of test functions and the results allow a first comparison between these methods applied to continuous optimization variables. (Abstract Truncated)}
place = {France}
year = {1995}
month = {Oct}
}