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Intermediate arithmetic memory; Memoire arithmetique intermediaire; Promezhutochnoe arifmeticheskoe zapominayushchee ustrojstvo; Memoria aritmetica intermediaria

Conference:

Abstract

This memory is designed to smooth the random flow of previously coded information, in preparation for recording on magnetic tape. It is made up of ten registers with 16 binary digits and two ten-position switches, one controlling writing and the other reading; auxiliary circuits ensure the correct position of each of the switches with respect to the other. As a result of the very small capacity and low persistence required, the memory elements selected are condensers insulated by silicon diodes. The main characteristics are as follows: access time less than 10{mu}s; output rate: 0.25, 0.5, 1 or 2 ms. Only the switch circuits are fitted with standard electronic tubes and trochotrons. The logical transistor circuits and the memory elements are mounted on printed cards 10 by 10 cm. The instrument appears as a rack of five units, 50 cm deep. (author) [French] Cette memoire est destinee a regulariser l'arrivee d'informations prealablement codees, en vue de les enregistrer sur bande magnetique. Elle comporte dix registres a seize chiffres binaires et deux commutateurs a dix positions, l'un commandant l'ecriture, l'autre la lecture; des circuits auxiliaires assurent l'avancement correct de chacun des commutateurs par rapport a l'autre. En raison de la capacite minime  More>>
Authors:
Amram, Y; Guillon, H; Tandardini, D [1] 
  1. Centre d'Etudes Nucleaires de Saclay (France)
Publication Date:
Apr 15, 1962
Product Type:
Conference
Resource Relation:
Conference: Conference on Nuclear Electronics, Belgrade, Yugoslavia (Serbia), 15-20 May 1961; Other Information: 6 figs, 4 refs; Related Information: In: Nuclear Electronics II. Proceedings of the Conference on Nuclear Electronics. V. II| 473 p.
Subject:
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY; COUNTING TUBES; INFORMATION; MAGNETIC TAPES; SILICON DIODES; SWITCHES; TRANSISTORS
OSTI ID:
22028370
Research Organizations:
International Atomic Energy Agency, Vienna (Austria)
Country of Origin:
IAEA
Language:
French
Other Identifying Numbers:
Other: ISSN 0074-1884; TRN: XA12N1993116636
Submitting Site:
INIS
Size:
page(s) 91-100
Announcement Date:
Jan 24, 2013

Conference:

Citation Formats

Amram, Y, Guillon, H, and Tandardini, D. Intermediate arithmetic memory; Memoire arithmetique intermediaire; Promezhutochnoe arifmeticheskoe zapominayushchee ustrojstvo; Memoria aritmetica intermediaria. IAEA: N. p., 1962. Web.
Amram, Y, Guillon, H, & Tandardini, D. Intermediate arithmetic memory; Memoire arithmetique intermediaire; Promezhutochnoe arifmeticheskoe zapominayushchee ustrojstvo; Memoria aritmetica intermediaria. IAEA.
Amram, Y, Guillon, H, and Tandardini, D. 1962. "Intermediate arithmetic memory; Memoire arithmetique intermediaire; Promezhutochnoe arifmeticheskoe zapominayushchee ustrojstvo; Memoria aritmetica intermediaria." IAEA.
@misc{etde_22028370,
title = {Intermediate arithmetic memory; Memoire arithmetique intermediaire; Promezhutochnoe arifmeticheskoe zapominayushchee ustrojstvo; Memoria aritmetica intermediaria}
author = {Amram, Y, Guillon, H, and Tandardini, D}
abstractNote = {This memory is designed to smooth the random flow of previously coded information, in preparation for recording on magnetic tape. It is made up of ten registers with 16 binary digits and two ten-position switches, one controlling writing and the other reading; auxiliary circuits ensure the correct position of each of the switches with respect to the other. As a result of the very small capacity and low persistence required, the memory elements selected are condensers insulated by silicon diodes. The main characteristics are as follows: access time less than 10{mu}s; output rate: 0.25, 0.5, 1 or 2 ms. Only the switch circuits are fitted with standard electronic tubes and trochotrons. The logical transistor circuits and the memory elements are mounted on printed cards 10 by 10 cm. The instrument appears as a rack of five units, 50 cm deep. (author) [French] Cette memoire est destinee a regulariser l'arrivee d'informations prealablement codees, en vue de les enregistrer sur bande magnetique. Elle comporte dix registres a seize chiffres binaires et deux commutateurs a dix positions, l'un commandant l'ecriture, l'autre la lecture; des circuits auxiliaires assurent l'avancement correct de chacun des commutateurs par rapport a l'autre. En raison de la capacite minime demandee et de la faible persistance necessaire, les elements de memoire choisis sont des condensateurs isoles par des diodes au silicium. Les principales caracteristiques sont les suivantes: temps d'acces inferieur a 10 {mu}s; cadence de sortie: 0,25 - 0,5 - 1 ou 2 ms. Seuls les circuits de commutation sont equipes de tubes electroniques classiques et de trochotrons. Les circuits logiques a transistors et les elements de memoire sont montes sur des cartes imprimees de 10 x 10 cm. L'appareil se presente sous la forme d'un rack de cinq unites d'une profondeur de 50 cm. (author) [Spanish] La ''memoria'' que describen los autores sirve para regularizar la recepcion de informaciones previamente codificadas, a fin de inscribirlas sobre una cinta magnetica. Esta integrada por diez registros de dieciseis cifras binarias y dos conmutadores de diez posiciones, que gobiernan, uno la escritura y el otro la lectura; ademas hay circuitos auxiliares que aseguran el avance correcto de cada conmutador con respecto al otro. Debido al reducido valor de la capacidad minima exigida y de la persistencia necesaria, se han adoptado como elementos de memoria condensadores aislados mediante diodos de silicio. He aqui sus principales caracteristicas: tiempo de acceso inferior a 10 {mu}s; cadencia de salida: 0,25 - 0,5 - 1 o 2 ms. Solamente los circuitos de conmutacion estan provistos de tubos electronicos de tipo corriente y de trocotrones. Los circuitos logicos a base de transistores y los elementos de la memoria vienen montados sobre cartones impresos de 10 x 10 cm. El aparato adopta la forma de un estante (rack) de cinco unidades, de 50 cm de profundidad. (author) [Russian] Ehto zapominayushchee ustrojstvo prednaznacheno dlya regulirovaniya postupleniya predvaritel'no kodirovannoj informatsii dlya zaneseniya ee na magnitnuyu lentu. Ono sostoit iz 10 registrov s 16-t'yu dvoichnymi tsiframi i dvukh kommutatorov s 10 pozitsiyami, odin iz kotorykh upravlyaet pishushchim, a drugoj chitayushchim prisposobleniyami. Vspomogatel'nye tsepi obespechivayut pravil'noe polozhenie kazhdogo kommutatora po otnosheniyu k drugomu. Vvidu neznachitel'noj trebuemoj emkosti i neprodolzhitel'nosti uderzhaniya informatsii v kachestve ehlementov zapominayushchego ustrojstva byli vybrany kondensatory, izolirovannye kremnievymi diodami. Osnovnymi kharakteristikami yavlyayutsya: vremya podkhoda men'she 10 {mu}s; chastota vykhoda: 0,25 - 0,5 - 1 ili 2 ms. Tol'ko tsepi pereklyucheniya oborudovany obychnymi ehlektronnymi i trokhotronnymi lampami. Tranzistornye logicheskie tsepi i ehlementy zapominayushchego ustrojstva smontirovany na pechatnykh skhemakh razmerom 10 x 10 cm. Ustrojstvo vyglyadit v vide sostoyashchej iz 5 blokov ehtazherki glubinoj v 50 cm. (author)}
place = {IAEA}
year = {1962}
month = {Apr}
}