Unaligned instruction relocation
Abstract
In one embodiment, a computer-implemented method includes receiving source code to be compiled into an executable file for an unaligned instruction set architecture (ISA). Aligned assembled code is generated, by a computer processor. The aligned assembled code complies with an aligned ISA and includes aligned processor code for a processor and aligned accelerator code for an accelerator. A first linking pass is performed on the aligned assembled code, including relocating a first relocation target in the aligned accelerator code that refers to a first object outside the aligned accelerator code. Unaligned assembled code is generated in accordance with the unaligned ISA and includes unaligned accelerator code for the accelerator and unaligned processor code for the processor. A second linking pass is performed on the unaligned assembled code, including relocating a second relocation target outside the unaligned accelerator code that refers to an object in the unaligned accelerator code.
- Inventors:
- Issue Date:
- Research Org.:
- International Business Machines Corp., Armonk, NY (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1525022
- Patent Number(s):
- 10223091
- Application Number:
- 15/654,991
- Assignee:
- International Business Machines Corporation (Armonk, NY)
- Patent Classifications (CPCs):
-
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
- DOE Contract Number:
- B599858
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 2017-07-20
- Country of Publication:
- United States
- Language:
- English
Citation Formats
Bertolli, Carlo, O'Brien, John K., Sallenave, Olivier H., and Sura, Zehra N. Unaligned instruction relocation. United States: N. p., 2019.
Web.
Bertolli, Carlo, O'Brien, John K., Sallenave, Olivier H., & Sura, Zehra N. Unaligned instruction relocation. United States.
Bertolli, Carlo, O'Brien, John K., Sallenave, Olivier H., and Sura, Zehra N. Tue .
"Unaligned instruction relocation". United States. https://www.osti.gov/servlets/purl/1525022.
@article{osti_1525022,
title = {Unaligned instruction relocation},
author = {Bertolli, Carlo and O'Brien, John K. and Sallenave, Olivier H. and Sura, Zehra N.},
abstractNote = {In one embodiment, a computer-implemented method includes receiving source code to be compiled into an executable file for an unaligned instruction set architecture (ISA). Aligned assembled code is generated, by a computer processor. The aligned assembled code complies with an aligned ISA and includes aligned processor code for a processor and aligned accelerator code for an accelerator. A first linking pass is performed on the aligned assembled code, including relocating a first relocation target in the aligned accelerator code that refers to a first object outside the aligned accelerator code. Unaligned assembled code is generated in accordance with the unaligned ISA and includes unaligned accelerator code for the accelerator and unaligned processor code for the processor. A second linking pass is performed on the unaligned assembled code, including relocating a second relocation target outside the unaligned accelerator code that refers to an object in the unaligned accelerator code.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Mar 05 00:00:00 EST 2019},
month = {Tue Mar 05 00:00:00 EST 2019}
}
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