Title: Implementing inverted master-slave 3D semiconductor stack

Abstract

A method and apparatus are provided for implementing an enhanced three dimensional (3D) semiconductor stack. A chip carrier has an aperture of a first length and first width. A first chip has at least one of a second length greater than the first length or a second width greater than the first width; a second chip attached to the first chip, the second chip having at least one of a third length less than the first length or a third width less than the first width; the first chip attached to the chip carrier by connections in an overlap region defined by at least one of the first and second lengths or the first and second widths; the second chip extending into the aperture; and a heat spreader attached to the chip carrier and in thermal contact with the first chip for dissipating heat from both the first chip and second chip.

Inventors:

Coteus, Paul W.; Hall, Shawn A.; Takken, Todd E.

Issue Date:

Tue Sep 04 00:00:00 EDT 2018

Research Org.:

International Business Machines Corp., Armonk, NY (United States)

Sponsoring Org.:

USDOE

OSTI Identifier:

1473665

Patent Number(s):

10068886

Application Number:

14/699,988

Assignee:

International Business Machines Corporation (Armonk, NY)

Patent Classifications (CPCs):

H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

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H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

H01L2224/04026 - Bonding areas specifically adapted for layer connectors
H01L2224/05553 - being rectangular
H01L2224/0603 - Bonding areas having different sizes, e.g. different heights or widths
H01L2224/291 - with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
H01L2224/32145 - the bodies being stacked
H01L2224/32225 - the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L2225/06513 - Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
H01L2225/06517 - Bump or bump-like direct electrical connections from device to substrate
H01L2225/06541 - Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
H01L2225/06589 - Thermal management, e.g. cooling
H01L23/13 - characterised by the shape
H01L23/367 - Cooling facilitated by shape of device {
H01L23/3675 - {characterised by the shape of the housing}
H01L23/49827 - {Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
H01L23/50 - for integrated circuit devices, {e.g. power bus, number of leads}
H01L24/05 - {of an individual bonding area}
H01L24/06 - {of a plurality of bonding areas}
H01L24/29 - {of an individual layer connector}
H01L24/32 - {of an individual layer connector}
H01L24/83 - {using a layer connector}
H01L25/0657 - {Stacked arrangements of devices}
H01L25/18 - the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L51/00 {
H01L25/50 - {Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
H01L2924/00014 - the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
H01L2924/014 - Solder alloys
H01L2924/1431 - Logic devices
H01L2924/1436 - Dynamic random-access memory [DRAM]
H01L2924/15151 - the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
H01L2924/15313 - being a land array, e.g. LGA
H01L2924/16251 - Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate
H01L2924/19041 - being a capacitor
H01L2924/19105 - in a side-by-side arrangement on a common die mounting substrate

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DOE Contract Number:  

B601996

Resource Type:

Patent

Resource Relation:

Patent File Date: 2015 Apr 29

Country of Publication:

United States

Language:

English