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Title: Method of making photovoltaic cell

Abstract

A photovoltaic solar cell comprises a nano-patterned substrate layer. A plurality of nano-windows are etched into an intermediate substrate layer to form the nano-patterned substrate layer. The nano-patterned substrate layer is positioned between an n-type semiconductor layer composed of an n-type semiconductor material and a p-type semiconductor layer composed of a p-type semiconductor material. Semiconductor material accumulates in the plurality of nano-windows, causing a plurality of heterojunctions to form between the n-type semiconductor layer and the p-type semiconductor layer.

Inventors:
; ;
Issue Date:
Research Org.:
Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1364427
Patent Number(s):
9685580
Application Number:
15/265,374
Assignee:
National Technology & Engineering Solutions of Sandia, LLC
Patent Classifications (CPCs):
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
Y - NEW / CROSS SECTIONAL TECHNOLOGIES Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE Y02E - REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
DOE Contract Number:  
AC04-94AL85000
Resource Type:
Patent
Resource Relation:
Patent File Date: 2016 Sep 14
Country of Publication:
United States
Language:
English
Subject:
14 SOLAR ENERGY

Citation Formats

Cruz-Campa, Jose Luis, Zhou, Xiaowang, and Zubia, David. Method of making photovoltaic cell. United States: N. p., 2017. Web.
Cruz-Campa, Jose Luis, Zhou, Xiaowang, & Zubia, David. Method of making photovoltaic cell. United States.
Cruz-Campa, Jose Luis, Zhou, Xiaowang, and Zubia, David. Tue . "Method of making photovoltaic cell". United States. https://www.osti.gov/servlets/purl/1364427.
@article{osti_1364427,
title = {Method of making photovoltaic cell},
author = {Cruz-Campa, Jose Luis and Zhou, Xiaowang and Zubia, David},
abstractNote = {A photovoltaic solar cell comprises a nano-patterned substrate layer. A plurality of nano-windows are etched into an intermediate substrate layer to form the nano-patterned substrate layer. The nano-patterned substrate layer is positioned between an n-type semiconductor layer composed of an n-type semiconductor material and a p-type semiconductor layer composed of a p-type semiconductor material. Semiconductor material accumulates in the plurality of nano-windows, causing a plurality of heterojunctions to form between the n-type semiconductor layer and the p-type semiconductor layer.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Jun 20 00:00:00 EDT 2017},
month = {Tue Jun 20 00:00:00 EDT 2017}
}

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