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Title: Method to control artifacts of microstructural fabrication

Abstract

New methods for fabrication of silicon microstructures have been developed. In these methods, an etching delay layer is deposited and patterned so as to provide differential control on the depth of features being etched into a substrate material. Compensation for etching-related structural artifacts can be accomplished by proper use of such an etching delay layer.

Inventors:
; ; ; ; ;
Issue Date:
Research Org.:
Sandia National Lab. (SNL-CA), Livermore, CA (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1175909
Patent Number(s):
7105098
Application Number:
10/165,356
Assignee:
Sandia Corporation
Patent Classifications (CPCs):
B - PERFORMING OPERATIONS B81 - MICROSTRUCTURAL TECHNOLOGY B81C - PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
DOE Contract Number:  
AC04-94AL85000
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
77 NANOSCIENCE AND NANOTECHNOLOGY

Citation Formats

Shul, Randy J., Willison, Christi G., Schubert, W. Kent, Manginell, Ronald P., Mitchell, Mary-Anne, and Galambos, Paul C. Method to control artifacts of microstructural fabrication. United States: N. p., 2006. Web.
Shul, Randy J., Willison, Christi G., Schubert, W. Kent, Manginell, Ronald P., Mitchell, Mary-Anne, & Galambos, Paul C. Method to control artifacts of microstructural fabrication. United States.
Shul, Randy J., Willison, Christi G., Schubert, W. Kent, Manginell, Ronald P., Mitchell, Mary-Anne, and Galambos, Paul C. Tue . "Method to control artifacts of microstructural fabrication". United States. https://www.osti.gov/servlets/purl/1175909.
@article{osti_1175909,
title = {Method to control artifacts of microstructural fabrication},
author = {Shul, Randy J. and Willison, Christi G. and Schubert, W. Kent and Manginell, Ronald P. and Mitchell, Mary-Anne and Galambos, Paul C.},
abstractNote = {New methods for fabrication of silicon microstructures have been developed. In these methods, an etching delay layer is deposited and patterned so as to provide differential control on the depth of features being etched into a substrate material. Compensation for etching-related structural artifacts can be accomplished by proper use of such an etching delay layer.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Sep 12 00:00:00 EDT 2006},
month = {Tue Sep 12 00:00:00 EDT 2006}
}