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Title: All diamond self-aligned thin film transistor

Abstract

A substantially all diamond transistor with an electrically insulating substrate, an electrically conductive diamond layer on the substrate, and a source and a drain contact on the electrically conductive diamond layer. An electrically insulating diamond layer is in contact with the electrically conductive diamond layer, and a gate contact is on the electrically insulating diamond layer. The diamond layers may be homoepitaxial, polycrystalline, nanocrystalline or ultrananocrystalline in various combinations.A method of making a substantially all diamond self-aligned gate transistor is disclosed in which seeding and patterning can be avoided or minimized, if desired.

Inventors:
 [1]
  1. Champaign, IL
Issue Date:
Research Org.:
Argonne National Lab. (ANL), Argonne, IL (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
984484
Patent Number(s):
7394103
Application Number:
11/226,703
Assignee:
UChicago Argonne, LLC (Chicago, IL)
Patent Classifications (CPCs):
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
DOE Contract Number:  
W-31109-ENG-38
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
36 MATERIALS SCIENCE

Citation Formats

Gerbi, Jennifer. All diamond self-aligned thin film transistor. United States: N. p., 2008. Web.
Gerbi, Jennifer. All diamond self-aligned thin film transistor. United States.
Gerbi, Jennifer. Tue . "All diamond self-aligned thin film transistor". United States. https://www.osti.gov/servlets/purl/984484.
@article{osti_984484,
title = {All diamond self-aligned thin film transistor},
author = {Gerbi, Jennifer},
abstractNote = {A substantially all diamond transistor with an electrically insulating substrate, an electrically conductive diamond layer on the substrate, and a source and a drain contact on the electrically conductive diamond layer. An electrically insulating diamond layer is in contact with the electrically conductive diamond layer, and a gate contact is on the electrically insulating diamond layer. The diamond layers may be homoepitaxial, polycrystalline, nanocrystalline or ultrananocrystalline in various combinations.A method of making a substantially all diamond self-aligned gate transistor is disclosed in which seeding and patterning can be avoided or minimized, if desired.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2008},
month = {7}
}

Patent:

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