Digital intermediate frequency QAM modulator using parallel processing
Abstract
The digital Intermediate Frequency (IF) modulator applies to various modulation types and offers a simple and low cost method to implement a high-speed digital IF modulator using field programmable gate arrays (FPGAs). The architecture eliminates multipliers and sequential processing by storing the pre-computed modulated cosine and sine carriers in ROM look-up-tables (LUTs). The high-speed input data stream is parallel processed using the corresponding LUTs, which reduces the main processing speed, allowing the use of low cost FPGAs.
- Inventors:
-
- Livermore, CA
- San Ramon, CA
- Issue Date:
- Research Org.:
- Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 981822
- Patent Number(s):
- 7379509
- Application Number:
- US Patent application 10/644,561
- Assignee:
- Lawrence Livermore National Security, LLC (Livermore, CA)
- Patent Classifications (CPCs):
-
H - ELECTRICITY H03 - BASIC ELECTRONIC CIRCUITRY H03C - MODULATION
H - ELECTRICITY H04 - ELECTRIC COMMUNICATION TECHNIQUE H04L - TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- DOE Contract Number:
- W-7405-ENG-48
- Resource Type:
- Patent
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 97 MATHEMATICS AND COMPUTING
Citation Formats
Pao, Hsueh-Yuan, and Tran, Binh-Nien. Digital intermediate frequency QAM modulator using parallel processing. United States: N. p., 2008.
Web.
Pao, Hsueh-Yuan, & Tran, Binh-Nien. Digital intermediate frequency QAM modulator using parallel processing. United States.
Pao, Hsueh-Yuan, and Tran, Binh-Nien. Tue .
"Digital intermediate frequency QAM modulator using parallel processing". United States. https://www.osti.gov/servlets/purl/981822.
@article{osti_981822,
title = {Digital intermediate frequency QAM modulator using parallel processing},
author = {Pao, Hsueh-Yuan and Tran, Binh-Nien},
abstractNote = {The digital Intermediate Frequency (IF) modulator applies to various modulation types and offers a simple and low cost method to implement a high-speed digital IF modulator using field programmable gate arrays (FPGAs). The architecture eliminates multipliers and sequential processing by storing the pre-computed modulated cosine and sine carriers in ROM look-up-tables (LUTs). The high-speed input data stream is parallel processed using the corresponding LUTs, which reduces the main processing speed, allowing the use of low cost FPGAs.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2008},
month = {5}
}
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Works referenced in this record:
FPGA implementation of multiplierless M-QAM modulator
journal, January 2002
- Klymyshyn, D. M.; Haluzan, D. T.
- Electronics Letters, Vol. 38, Issue 10