System and method for floating-substrate passive voltage contrast
Abstract
A passive voltage contrast (PVC) system and method are disclosed for analyzing ICs to locate defects and failure mechanisms. During analysis a device side of a semiconductor die containing the IC is maintained in an electrically-floating condition without any ground electrical connection while a charged particle beam is scanned over the device side. Secondary particle emission from the device side of the IC is detected to form an image of device features, including electrical vias connected to transistor gates or to other structures in the IC. A difference in image contrast allows the defects or failure mechanisms be pinpointed. Varying the scan rate can, in some instances, produce an image reversal to facilitate precisely locating the defects or failure mechanisms in the IC. The system and method are useful for failure analysis of ICs formed on substrates (e.g. bulk semiconductor substrates and SOI substrates) and other types of structures.
- Inventors:
-
- Albuquerque, NM
- (Albuquerque, NM)
- Placitas, NM
- Issue Date:
- Research Org.:
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 963794
- Patent Number(s):
- 7525325
- Application Number:
- 11/640,720
- Assignee:
- Sandia Corporation (Alburquerque, NM)
- Patent Classifications (CPCs):
-
G - PHYSICS G01 - MEASURING G01R - MEASURING ELECTRIC VARIABLES
- DOE Contract Number:
- AC04-94AL85000
- Resource Type:
- Patent
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 47 OTHER INSTRUMENTATION
Citation Formats
Jenkins, Mark W, Cole, Jr., Edward I., Tangyunyong, Paiboon, Soden, Jerry M, Walraven, Jeremy A, and Pimentel, Alejandro A. System and method for floating-substrate passive voltage contrast. United States: N. p., 2009.
Web.
Jenkins, Mark W, Cole, Jr., Edward I., Tangyunyong, Paiboon, Soden, Jerry M, Walraven, Jeremy A, & Pimentel, Alejandro A. System and method for floating-substrate passive voltage contrast. United States.
Jenkins, Mark W, Cole, Jr., Edward I., Tangyunyong, Paiboon, Soden, Jerry M, Walraven, Jeremy A, and Pimentel, Alejandro A. Tue .
"System and method for floating-substrate passive voltage contrast". United States. https://www.osti.gov/servlets/purl/963794.
@article{osti_963794,
title = {System and method for floating-substrate passive voltage contrast},
author = {Jenkins, Mark W and Cole, Jr., Edward I. and Tangyunyong, Paiboon and Soden, Jerry M and Walraven, Jeremy A and Pimentel, Alejandro A},
abstractNote = {A passive voltage contrast (PVC) system and method are disclosed for analyzing ICs to locate defects and failure mechanisms. During analysis a device side of a semiconductor die containing the IC is maintained in an electrically-floating condition without any ground electrical connection while a charged particle beam is scanned over the device side. Secondary particle emission from the device side of the IC is detected to form an image of device features, including electrical vias connected to transistor gates or to other structures in the IC. A difference in image contrast allows the defects or failure mechanisms be pinpointed. Varying the scan rate can, in some instances, produce an image reversal to facilitate precisely locating the defects or failure mechanisms in the IC. The system and method are useful for failure analysis of ICs formed on substrates (e.g. bulk semiconductor substrates and SOI substrates) and other types of structures.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2009},
month = {4}
}
Works referenced in this record:
The identification and analysis of latent ESD damage on CMOS input gates
journal, October 1994
- Colvin, Jim
- Journal of Electrostatics, Vol. 33, Issue 3
Investigation of Sensitivity Improvement on Passive Voltage Contrast for Defect Isolation
journal, September 2002
- Lee, Jon C.; Chen, C. H.; Su, David
- Microelectronics Reliability, Vol. 42, Issue 9-11