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Title: Arithmetic functions in torus and tree networks

Abstract

Methods and systems for performing arithmetic functions. In accordance with a first aspect of the invention, methods and apparatus are provided, working in conjunction of software algorithms and hardware implementation of class network routing, to achieve a very significant reduction in the time required for global arithmetic operation on the torus. Therefore, it leads to greater scalability of applications running on large parallel machines. The invention involves three steps in improving the efficiency and accuracy of global operations: (1) Ensuring, when necessary, that all the nodes do the global operation on the data in the same order and so obtain a unique answer, independent of roundoff error; (2) Using the topology of the torus to minimize the number of hops and the bidirectional capabilities of the network to reduce the number of time steps in the data transfer operation to an absolute minimum; and (3) Using class function routing to reduce latency in the data transfer. With the method of this invention, every single element is injected into the network only once and it will be stored and forwarded without any further software overhead. In accordance with a second aspect of the invention, methods and systems are provided to efficientlymore » implement global arithmetic operations on a network that supports the global combining operations. The latency of doing such global operations are greatly reduced by using these methods.« less

Inventors:
 [1];  [2];  [3];  [4];  [5];  [6];  [4];  [7]
  1. Princeton, NJ
  2. Ridgefield, CT
  3. Croton On Hudson, NY
  4. Mount Kisco, NY
  5. Irvington, NY
  6. Cortlandt Manor, NY
  7. Bedford Hills, NY
Issue Date:
Research Org.:
Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
921478
Patent Number(s):
7313582
Application Number:
10/468,991
Assignee:
International Business Machines Corporation (Armonk, NY)
Patent Classifications (CPCs):
H - ELECTRICITY H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR H05K - PRINTED CIRCUITS
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
DOE Contract Number:  
W-7405-ENG-48
Resource Type:
Patent
Country of Publication:
United States
Language:
English

Citation Formats

Bhanot, Gyan, Blumrich, Matthias A, Chen, Dong, Gara, Alan G, Giampapa, Mark E, Heidelberger, Philip, Steinmacher-Burow, Burkhard D, and Vranas, Pavlos M. Arithmetic functions in torus and tree networks. United States: N. p., 2007. Web.
Bhanot, Gyan, Blumrich, Matthias A, Chen, Dong, Gara, Alan G, Giampapa, Mark E, Heidelberger, Philip, Steinmacher-Burow, Burkhard D, & Vranas, Pavlos M. Arithmetic functions in torus and tree networks. United States.
Bhanot, Gyan, Blumrich, Matthias A, Chen, Dong, Gara, Alan G, Giampapa, Mark E, Heidelberger, Philip, Steinmacher-Burow, Burkhard D, and Vranas, Pavlos M. Tue . "Arithmetic functions in torus and tree networks". United States. https://www.osti.gov/servlets/purl/921478.
@article{osti_921478,
title = {Arithmetic functions in torus and tree networks},
author = {Bhanot, Gyan and Blumrich, Matthias A and Chen, Dong and Gara, Alan G and Giampapa, Mark E and Heidelberger, Philip and Steinmacher-Burow, Burkhard D and Vranas, Pavlos M},
abstractNote = {Methods and systems for performing arithmetic functions. In accordance with a first aspect of the invention, methods and apparatus are provided, working in conjunction of software algorithms and hardware implementation of class network routing, to achieve a very significant reduction in the time required for global arithmetic operation on the torus. Therefore, it leads to greater scalability of applications running on large parallel machines. The invention involves three steps in improving the efficiency and accuracy of global operations: (1) Ensuring, when necessary, that all the nodes do the global operation on the data in the same order and so obtain a unique answer, independent of roundoff error; (2) Using the topology of the torus to minimize the number of hops and the bidirectional capabilities of the network to reduce the number of time steps in the data transfer operation to an absolute minimum; and (3) Using class function routing to reduce latency in the data transfer. With the method of this invention, every single element is injected into the network only once and it will be stored and forwarded without any further software overhead. In accordance with a second aspect of the invention, methods and systems are provided to efficiently implement global arithmetic operations on a network that supports the global combining operations. The latency of doing such global operations are greatly reduced by using these methods.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2007},
month = {12}
}

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Works referenced in this record:

A communication model based on an n-dimensional torus architecture using deadlock-free wormhole routing
conference, January 2003

  • Holzenspies, P.; Schepers, E.; Bach, W.
  • Proceedings. Euromicro Symposium on Digital System Design, Euromicro Symposium on Digital System Design, 2003. Proceedings.
  • https://doi.org/10.1109/DSD.2003.1231920

Network decontamination with local immunization
conference, January 2006


Parallel image analysis on recursive Torus architecture
conference, January 1993


The P-Mesh-a commodity-based scalable network architecture for clusters
conference, January 1999

  • Nitzberg, B.; Kuszmaul, C.; Stockdale, I.
  • HICSS 32 - 32nd Annual Hawaii International Conference on System Sciences, Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences. 1999. HICSS-32. Abstracts and CD-ROM of Full Papers
  • https://doi.org/10.1109/HICSS.1999.773070

Exploiting multiple degrees of BP parallelism on the highly parallel computer AP1000
conference, January 1995


Polymorphic-torus architecture for computer vision
journal, March 1989


A Scalable Distributed Parallel Breadth-First Search Algorithm on BlueGene/L
conference, January 2005


Data level parallel processing for object recognition on Recursive Torus Architecture
conference, January 1995


A peer-to-peer network based on multi-mesh architecture
conference, January 2003


Image analysis and computer vision: 1988
journal, May 1989


Efficient mapping algorithm of multilayer neural network on torus architecture
journal, September 2003