Triple inverter pierce oscillator circuit suitable for CMOS
Abstract
An oscillator circuit is disclosed which can be formed using discrete field-effect transistors (FETs), or as a complementary metal-oxide-semiconductor (CMOS) integrated circuit. The oscillator circuit utilizes a Pierce oscillator design with three inverter stages connected in series. A feedback resistor provided in a feedback loop about a second inverter stage provides an almost ideal inverting transconductance thereby allowing high-Q operation at the resonator-controlled frequency while suppressing a parasitic oscillation frequency that is inherent in a Pierce configuration using a "standard" triple inverter for the sustaining amplifier. The oscillator circuit, which operates in a range of 10 50 MHz, has applications for use as a clock in a microprocessor and can also be used for sensor applications.
- Inventors:
-
- Albuquerque, NM
- Issue Date:
- Research Org.:
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 902643
- Patent Number(s):
- 7183868
- Application Number:
- 10/937,163
- Assignee:
- Sandia Corporation (Albuquerque, NM)
- Patent Classifications (CPCs):
-
H - ELECTRICITY H03 - BASIC ELECTRONIC CIRCUITRY H03K - PULSE TECHNIQUE
- DOE Contract Number:
- AC04-94AL85000
- Resource Type:
- Patent
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 42 ENGINEERING
Citation Formats
Wessendorf,, and Kurt, O. Triple inverter pierce oscillator circuit suitable for CMOS. United States: N. p., 2007.
Web.
Wessendorf,, & Kurt, O. Triple inverter pierce oscillator circuit suitable for CMOS. United States.
Wessendorf,, and Kurt, O. Tue .
"Triple inverter pierce oscillator circuit suitable for CMOS". United States. https://www.osti.gov/servlets/purl/902643.
@article{osti_902643,
title = {Triple inverter pierce oscillator circuit suitable for CMOS},
author = {Wessendorf, and Kurt, O},
abstractNote = {An oscillator circuit is disclosed which can be formed using discrete field-effect transistors (FETs), or as a complementary metal-oxide-semiconductor (CMOS) integrated circuit. The oscillator circuit utilizes a Pierce oscillator design with three inverter stages connected in series. A feedback resistor provided in a feedback loop about a second inverter stage provides an almost ideal inverting transconductance thereby allowing high-Q operation at the resonator-controlled frequency while suppressing a parasitic oscillation frequency that is inherent in a Pierce configuration using a "standard" triple inverter for the sustaining amplifier. The oscillator circuit, which operates in a range of 10 50 MHz, has applications for use as a clock in a microprocessor and can also be used for sensor applications.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2007},
month = {2}
}